Datasheet 74ACT541SCX, 74ACT541SC, 74ACT541PC, 74ACT541MTCX, 74ACT541MTC Datasheet (Fairchild Semiconductor)

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November 1988 Revised October 1999

74AC541 • 74ACT541 Octal Buffer/Line Driver with 3-STATE Outputs

General Description

The 74AC541 and 74 ACT541 are octal buffer/l ine drivers designed to be em ployed as mem ory a nd ad dress d rive rs, clock drivers and bus oriented transmitter/receivers.

These devices are similar in fu nction to the 74AC244 a nd 74ACTC244 while providing flow-through architecture (inputs on opposite side from outputs). This pinout arrangement makes these devices esp ecially useful as an outp ut port for microprocessors, allowing ease of layout and greater PC board density.

Features

■ ICC and IOZ reduced by 50%

■ 3-STATE outputs

■ Inputs and outputs opposite side of package, allowing

easier interface to microprocessors

■ Output source/sink 24 mA

■ 74AC541 is a non-inverting option of the 74AC540

■ 74ACT541 has TTL-compatible inputs

Ordering Code:

Order Number Package Number Package Description

74AC541SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74AC541SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC541PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 74ACT541SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74ACT541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT541PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Device also available in Tape and Reel. Specify by appending s uffix let te r “X” to the ordering code .

Logic Symbol

IEEE/IEC

Connection Diagram

Truth Table

Inputs

L L HH H X XZ X H XZ

FACT is a trade m ark of F airchild Semicondu ctor Corporation.

H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level Z = High Impedance

L L LL

Outputs

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Absolute Maximum Ratings(Note 1) Recommended Operating

Supply Voltage (VCC) −0.5V to +7.0V DC Input Diode Current (I

= −0.5V −20 mA

= VCC + 0.5V +20 mA

DC Input Voltage (V DC Output Diode Current (I

= −0.5V −20 mA

= VCC + 0.5V +20 mA

74AC541 • 74ACT541

DC Output Voltage (V

)

) −0.5V to VCC + 0.5V

)

) −0.5V to VCC + 0.5V

DC Output Source or Sink Current (I DC V

or Ground Current

per Output Pin (I Storage Temperature (T Junction Temperature (T

) ± 50 mA

or I

) ± 50 mA

GND

) −65°C to +150°C

STG

)

PDIP 140°C

Conditions

Supply Voltage (V

AC 2.0V to 6.0V

ACT 4.5V to 5.5V Input Voltage (V Output Voltage (VO) 0V to V Operating Temperature (TA) −40°C to +85°C Minimum Input Edge Rate (∆V/∆t) 125 mV/ns

from 30% to 70% of V

AC: V

VCC @ 3.3V, 4.5V, 5.5V

ACT:V

Note 1: Absolute maximum ratings are those values beyond which damage to the device may occu r. The databook specificati ons should be met, without exception, t o ensure that the system design is reliab le over its power supply, temperature, an d output/input loading variables. Fairc hild does not recommend operation of FACT circuits outside databook specifications.

)

) 0V to V

from 0.8V to 2.0V @ 4.5V, 5.5V

DC Electrical Characteristics for AC

CC CC

Symbol Parameter

IIN (Note 4) Maximum Input Leakage Current 5.5 ± 0.1 ± 1.0 µA VI = V I

OLD

OHD

ICC (Note 4) Maximum Quiescent Supply Current 5.5 4.0 40.0 µAVIN = VCC or GND

Note 2: All outputs loaded; thresholds on input associated wit h output under test. Note 3: Maximum te st duration 2.0 ms, one ou t put loaded at a time. Note 4: I

Minimum HIGH Level 3.0 1.5 2.1 2.1 Input Voltage 4.5 2.25 3.15 3.15 or VCC − 0.1V

Maximum LOW Level 3.0 1.5 0.9 0.9 Input Voltage 4.5 2.25 1.35 1.35 or VCC − 0.1V

Minimum HIGH Level 3.0 2.99 2.9 2.9

Maximum LOW Level 3.0 0.002 0.1 0.1 Output Voltage 4.5 0.001 0.1 0.1 I

Maximum 3-STATE Leakage Current 5.5 ±0.25 ±2.5 VI = VCC, GND

Minimum Dynamic 5.5 75 mA V Output Current (Note 3) 5.5 −75 mA V

and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5. 5V VCC.

(V) Typ Guaranteed Limits

5.5 2.75 3.85 3.85

5.5 2.75 1.65 1.65

5.5 5.49 5.4 5.4

3.0 2.56 2.46 IOH = −12 mA

4.5 3.86 3.76 IOH = −24 mA

5.5 4.86 4.76 IOH = −24 mA (Note 2)

5.5 0.001 0.1 0.1

3.0 0.36 0.44 IOL = 12 mA

4.5 0.36 0.44 IOL = 24 mA

5.5 0.36 0.44 IOL = 24 mA (Note 2)

TA = +25°CTA = −40°C to +85°C

Units Conditions

= 0.1V

OUT

= 0.1V

OUT

VOutput Voltage 4.5 4.49 4.4 4.4 I

µA

= −50 µA

OUT

VIN = VIL or V

= 50 µA

OUT

VIN = VIL or V

, GND

VI (OE) = V

VO = VCC, GND

= 1.65V Max

OLD

= 3.85V Min

OHD

, V

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AC Electrical Characteristics for AC

Symbol Parameter (V)

(Note 5) Min Typ Max Min Max

PLH

Propagation Delay 3.3 2.0 5.5 8.0 1.5 9.0 Data to Output 5.0 1.5 4.0 6.0 1.0 6.5

PHL

Propagation Delay 3.3 2.0 5.5 8.0 1.5 8.5 Data to Output 5.0 1.5 4.0 6.0 1.0 6.5

PZH

Output Enable Time 3.3 3.0 8.0 11.5 3.0 12.5

5.0 2.0 6.0 8.5 1.5 9.5

PZL

Output Enable Time 3.3 2.5 7.0 10.0 2.5 11.5

5.0 1.5 5.5 7.5 1.0 8.5

PHZ

Output Disable Time 3.3 3.5 9.0 12.5 2.5 14.0

5.0 2.0 7.0 9.5 1.0 10.5

PLZ

Output Disable Time 3.3 2.5 6.5 9.5 2.0 10.5

5.0 2.0 5.5 7.5 1.0 8.5

Note 5: Voltage Range 3.3 is 3.3V ± 0.3V

Voltage Range 5.0 is 5.0V ± 0.5V

DC Electrical Characteristics for ACT

TA = +25°CT

= 50 pF CL = 50 pF

= −40°C to +85°C

74AC541 • 74ACT541

Units

Symbol Parameter

Minimum HIGH Level 4.5 1.5 2.0 2.0

(V) Typ Guaranteed Limits

TA = +25°CT

Input Voltage 5.5 1.5 2.0 2.0 or V

Maximum LOW Level 4.5 1.5 0.8 0.8 Input Voltage 5.5 1.5 0.8 0.8 or VCC − 0.1V

Minimum HIGH Level 3.0 2.99 2.9 2.9 Output Voltage 4.5 4.49 4.4 4.4

4.5 3.86 3.76

5.5 4.86 4.76 IOH = −24 mA

Maximum LOW Level 3.0 0.002 0.1 0.1 Output Voltage 4.5 0.001 0.1 0.1

4.5 0.36 0.44

5.5 0.36 0.44 IOH = 24 mA

CCT

OLD

OHD

Note 6: All outputs loaded; thresholds on input associated with ou t put under test. Note 7: Maximum test duration 2.0 ms, one output loaded at a time.

Maximum Input Leakage Current Maximum 3-STATE Leakage Current VO = VCC, GND

5.5 ± 0.1 ± 1.0 µA VI = V

5.5 ±0.25 ±2.5 µA

Maximum ICC/Input 5.5 0.6 1.5 mA VI = VCC − 2.1V Minimum Dynamic 5.5 75 mA V Output Current (Note 7) 5.5 −75 mA V Maximum Quiescent Supply Current

5.5 4.0 40.0 µAVIN = VCC or GND

= −40°C to +85°C

Units Conditions

= 0.1V

OUT

− 0.1V

= 0.1V

OUT

= −50 µA

OUT

VIN = VIL or V

IOH = −24 mA (Note 6)

= 50 µA

OUT

VIN = VIL or V

IOH = 24 mA (Note 6)

, GND

VI = V

, V

= 1.65V Max

OLD

= 3.85V Min

OHD

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AC Electrical Characteristics for ACT

Symbol Parameter (V)

PLH

PHL

PZH

PZL

PHZ

74AC541 • 74ACT541

PLZ

Note 8: Voltage Range 5.0 is 5. 0V ± 0.5V

Propagation Delay Data to Output 2.0 5.5 7.0 2.0 7.5 Output Enable Time

Output Disable Time

(Note 8) Min Typ Max Min Max

5.0

TA = +25°CT

= 50 pF CL = 50 pF

2.04.57.02.07.5

2.05.09.02.09.5

2.06.59.02.09.5

1.55.57.51.58.0

Capacitance

Symbol Parameter Typ Units Conditions

Input Capacitance 4.5 pF VCC = OPEN Power Dissipation Capacitance for AC 30.0 Power Dissipation Capacitance for ACT 70.0

pF VCC = 5.0V

= −40°C to +85°C

Units

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Physical Dimensions inches (millimeters) unless otherwise noted

74AC541 • 74ACT541

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body

Package Number M20B

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

74AC541 • 74ACT541

20-Lead Small Outline Package ( SOP), EIAJ TYPE II, 5.3mm Wide

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Package Number M20D

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

74AC541 • 74ACT541

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Package Number N20A

74AC541 • 74ACT541 Octal Buffer/Line Driver with 3-STATE Outputs

Fairchild does not assume any responsibility for us e of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support de vices o r syste ms are devices or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significan t injury to the user.

2. A critical com ponent in any com ponen t of a life supp ort device or system whose failu re to perform can be reasonably expected to ca use the fa i lure of the li fe su pp ort device or system, or to affect its safety or effectiveness.

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