Datasheet 74ACT158SJX, 74ACT158SJ, 74ACT158SCX, 74ACT158SC, 74ACT158PC Datasheet (Fairchild Semiconductor)

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© 1999 Fairchild Semiconductor Corporation DS009930 www.fairchildsemi.com
November 1988 Revised November 1999
74ACT158 Quad 2-Input Multiplexer
74ACT158 Quad 2-Input Multiplexer
General Description
The ACT158 is a high-sp eed quad 2-input multiplexer. It selects four bits of data from two sources using the com­mon Select and Enable inputs. The four buffered outputs present the selected data in the inverted form. The ACT158 can also be used as a function generator.
Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending su ffix le tter “X” to the ordering code.
Logic Symbols
IEE/IEC
Connection Diagram
Pin Descriptions
FACT is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74ACT158SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74ACT158PC M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACT158MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT158SJ N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Pin Names Description
I
0a–I0d
Source 0 Data Inputs
I
1a–I1d
Source 1 Data Inputs
E
Enable Input S Select Input Z
a–Zd
Inverted Outputs
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74ACT158
Functional Description
The ACT158 quad 2 -input multiplexer selects four bits of data from two sources under the control of a common Select input (S) and pr esents the data in invert ed form at the four outputs. The Enable input (E
) is active-LOW. When
E
is HIGH, all of the outputs (Z) are force d HIGH regard­less of all other i np uts. Th e ACT 15 8 is th e l o gic im pl em en ­tation of a 4-pole, 2-position switch where the position of the switch is determined by the logi c levels supplied t o the Select input.
Tr uth Table
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs Outputs
E
SI0I
1
Z
HX X X H LL L X H LLH X L LH X L H LH X H L
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74ACT158
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute max imum ratings are those values beyond w hich damage
to the device may occu r. The databook spe cificatio ns shou ld be met, wit h­out exception, to ensure that the system de sign is relia ble over its p ower supply, temperature, and output/input loading variable. Fairchild does not recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics
Note 2: All outputs loaded; thres holds on input associate d w it h output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Supply Voltage (VCC) −0.5V to +7.0V DC Input Diode Current (I
IK
)
V
I
= −0.5V −20 mA
V
I
= VCC + 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to VCC + 0.5V
DC Output Diode Current (I
OK
)
V
O
= −0.5V −20 mA
V
O
= VCC + 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC + 0.5V
DC Output Source
or Sink Current (I
O
) ±50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
) ±50 mA
Storage Temperature (T
STG
) −65°C to +150°C
Junction Temperature (T
J
) 140°C
Supply Voltage (V
CC
) 4.5V to 5.5V
Input Voltage (V
I
)0V to V
CC
Output Voltage (VO)0V to V
CC
Operating Temperature (TA) −40°C to +85°C Minimum Input Edge Rate (∆V/∆t)
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V 125 mV/ns
Symbol Parameter
V
CC
TA = +25°C TA = −40°C to +85°C
Units Conditions
(V) Typ Guaranteed Limits
V
IH
Minimum HIGH Level 4.5 1.5 2.0 2.0
V
V
OUT
= 0.1V
Input Voltage 5.5 1.5 2.0 2.0 or VCC − 0.1V
V
IL
Maximum LOW Level 4.5 1.5 0.8 0.8
V
V
OUT
= 0.1V
Input Voltage 5.5 1.5 0.8 0.8 or VCC − 0.1V
V
OH
Minimum HIGH Level 4.5 4.49 4.4 4.4
VI
OUT
= −50 µA
Output Voltage 5.5 5.49 5.4 5.4
VIN = V
IL
or V
IH
4.5 3.86 3.76 V IOH = −24 mA
5.5 4.86 4.76 IOH = −24 mA (Note 2)
V
OL
Maximum LOW Level 4.5 0.001 0.1 0.1
VI
OUT
= 50 µA
Output Voltage 5.5 0.001 0.1 0.1
VIN = VIL or V
IH
4.5 0.36 0.44 V IOL = 24 mA
5.5 0.36 0.44 I
OL
= 24 mA (Note 2)
I
IN
Maximum Input
5.5 ±0.1 ±1.0 µAVI = VCC, GND
Leakage Current
I
CCT
Maximum
5.5 0.6 1.5 mA VI = VCC − 2.1V
ICC/Input
I
OLD
Minimum Dynamic 5.5 75 mA V
OLD
= 1.65V Max
I
OHD
Output Current (Note 3) 5.5 −75 mA V
OHD
= 3.85V Min
I
CC
Maximum Quiescent
5.5 4.0 40.0 µA
VIN = V
CC
Supply Current or GND
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74ACT158
AC Electrical Characteristics
Note 4: Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol Parameter
V
CC
(V)
(Note 4)
T
A
= +25°C
C
L
= 50 pF
T
A
= −40°C to +85°C
C
L
= 50 pF
Units
Min Typ Max Min Max
t
PLH
Propagation Delay
5.0 2.5 6.0 9.5 2.0 11.0 ns
S to Z
n
t
PHL
Propagation Delay
5.0 1.5 5.5 9.0 1.5 10.0 ns
S to Z
n
t
PLH
Propagation Delay
5.0 1.5 5.5 9.5 1.5 10.5 ns
E to Z
n
t
PHL
Propagation Delay
5.0 1.5 5.5 9.5 1.5 10.5 ns
E
to Z
n
t
PLH
Propagation Delay
5.0 1.5 4.5 8.0 1.0 8.5 ns
I
n
to Z
n
t
PHL
Propagation Delay
5.0 1.5 4.0 6.5 1.0 7.5 ns
In to Z
n
Symbol Parameter Typ Units Conditions
C
IN
Input Capacitance 4.5 pF VCC = OPEN
C
PD
Power Dissipation Capacitance 45.0 pF VCC = 5.0V
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74ACT158
Physical Dimensions inches (millimeters) unless otherwise noted
16- Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
Package Number M16A
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74ACT158
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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74ACT158
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Sm all Ou tline Pa ck age (TS SO P), JE DE C MO-153, 4.4mm Wide
Package Number MTC16
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74ACT158 Quad 2-Input Multiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16- Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or syste ms
which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the user.
2. A critical component in any compon ent of a lif e supp ort device or system whose failure t o perform can be rea­sonably expected to ca use the failure of the life supp ort device or system, or to affect its safety or effectiveness.
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