Datasheet 74ACT14SCX, 74ACT14SC, 74ACT14PC, 74ACT14MTCX, 74ACT14MTC Datasheet (Fairchild Semiconductor)

74AC14 • 74ACT14
Hex Inverter with Schmitt Trigger Input

74AC14 • 74ACT14 Hex Inverter with Schmitt Trigger Input

November 1988
Revised December 1999

General Description

The 74AC14 and 74ACT14 co ntain six invert er gates ea ch
with a Schmitt trigger input. They are capable of transform­ing slowly changing input signals into sharply defined, jitter­free output signals. In ad dition, they have a great er noise
margin than conventional inverters.

The 74AC14 and 74ACT14 have hysteresis between the
positive-going and negative-going input thresholds (typi­cally 1.0V) which is determined internally by transistor
ratios and is essentially insensitive to temperature and sup­ply voltage variations.

Features

■ ICC reduced by 50%

■ Outputs source/sink 24 mA

■ 74ACT14 has TTL-compatible inputs

Ordering Code:

Order Number Package Number Package Description

74AC14SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74AC14SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MS-153, 4.4mm Wide
74AC14PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
74ACT14SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
74ACT14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MS-153, 4.4mm Wide
74ACT14PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the or dering code.

Logic Symbol

IEEE/IEC

Connection Diagram

Function Table

Pin Descriptions

Pin Names Description

I

n

O

n

FACT is a trademark of Fairchild Semiconductor Corporation.

© 1999 Fairchild Semiconductor Corporation DS009917 www.fairchildsemi.com

Inputs
Outputs

Input Output

AO

LH
HL

Absolute Maximum Ratings(Note 1) Recommended Operating

Supply Voltage (VCC) −0.5V to +7.0V
DC Input Diode Current (I

V

= −0.5V −20 mA

I

= VCC + 0.5V +20 mA

V

I

DC Input Voltage (V
DC Output Diode Current (I

= −0.5V −20 mA

V

74AC14 • 74ACT14

O

V

= VCC + 0.5V +20 mA

O

DC Output Voltage (V

)

IK

) −0.5V to VCC + 0.5V

I

)

OK

) −0.5V to VCC + 0.5V

O

DC Output Source

or Sink Current (I

DC V

or Ground Current

CC

per Output Pin (I
Storage Temperature (T
Junction Temperature (T

) ±50 mA

O

or I

CC

) ±50 mA

GND

) −65°C to +150°C

STG

)

J

PDIP 140°C

Conditions

Supply Voltage ( V

AC 2.0V to 6.0V

ACT 4.5V to 5.5V
Input Voltage (V
Output Voltage (VO) 0V to V
Operating Temperature (TA) −40°C to +85°C

Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with­out exception, to ensure that the system design is reliable over its power
supply, temperature, and ou tput/inp ut loadi ng varia bles. Fairchild does no t
recommend operat ion of FACT circuits outsid e databook specificat ions.

)

CC

) 0V to V

I

DC Electrical Characteristics for AC

V

Symbol Parameter

V

OH

V

OL

IIN (Note 4) Maximum Input Leakage Current 5.5 ±0.1 ±1.0 µAVI = VCC, GND
V

t+

V

t−

V

H(MAX)

V

H(MIN)

I

OLD

I

OHD

I

CC

(Note 4) Supply Current or GND

Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test dura tio n 2. 0 ms, one output loaded at a time.
Note 4: I

Minimum HIGH Level 3.0 2.99 2.9 2.9

Maximum LOW Level 3.0 0.002 0.1 0.1

Maximum Positive 3.0 2.2 2.2

Minimum Negative 3.0 0.5 0.5

Maximum Hysteresis 3.0 1.2 1.2

Minimum Hysteresis 3.0 0.3 0.3

Minimum Dynamic 5.5 75 mA V
Output Current (Note 3) 5.5 −75 mA V
Maximum Quiescent

and ICC @ 3.0V are guaranteed to be less than or eq ual to the respective lim it @ 5. 5V VCC.

IN

CC

(V) Typ Guaranteed Limits

5.55.495.4 5.4

3.0 2.56 2.46

4.5 3.86 3.76 IOH = 24 mA

5.5 4.86 4.76 IOH = 24 mA (Note 2)

5.5 0.001 0.1 0.1

3.0 0.36 0.44

4.5 0.36 0.44 I

5.5 0.36 0.44 I

5.5 3.9 3.9

5.5 1.1 1.1

5.5 1.6 1.6

5.5 0.5 0.5

5.5 2.0 20.0 µA

TA = +25°C

TA = −40°C to +85°C

Units Conditions

VI

V

VI

V

= −50 µAOutput Voltage 4.5 4.49 4.4 4.4

OUT

IOH = 12

= 50 µAOutput Voltage 4.5 0.001 0.1 0.1

OUT

IOL = 12

24 mA

OL

= 24 mA (Note 2)

OL

= Worst CaseThreshold 4.5 3.2 3.2 V

T

A

TA = Worst CaseThreshold 4.5 0.9 0.9 V

TA = Worst Case4.5 1.4 1.4 V

TA = Worst Case4.5 0.4 0.4 V

OLD
OHD

VIN = V

CC
CC

= 1.65V Max

= 3.85V Min

CC

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AC Electrical Characteristics for AC

T

V

Symbol Parameter

CC

(V)

(Note 5) Min Typ Max Min Max

t

PLH

Propagation Delay 3.3 1.5 9.5 13.5 1.5 15.0

5.0 1.5 7.0 10.0 1.5 11.0

t

PHL

Propagation Delay 3.3 1.5 7.5 11.5 1.5 13.0

5.0 1.5 6.0 8.5 1.5 9.5

Note 5: Voltage Range 3.3 is 3.3V ± 0.3V

Voltage Range 5.0 is 5.0V ± 0.5V

DC Electrical Characteristics for ACT

V

Symbol Parameter

V

Minimum HIGH Level 4.5 1.5 2.0 2.0

IH

CC

(V) Typ Guaranteed Limits

Input Voltage 5.5 1.5 2.0 2.0 or V

V

Maximum LOW Level 4.5 1.5 0.8 0.8

IL

Output Voltage 5.5 1.5 0.8 0.8 or V

V

Minimum HIGH Level 4.5 4.49 434 4.4

OH

Output Voltage 5.5 5.4 9 5.4 5.4

4.5 3.86 3.76 IOH = −24 mA

5.5 4.86 4.76 IOH = −24 mA (Note 6)

V

Maximum LOW Level 4.5 0.001 0.1 0.1

OL

Output Voltage 5.5 0.001 0.1 0.1

4.5 0.36 0.44 IOL = 24 mA

5.5 0.36 0.44 I

I

IN

V

Maximum Input Leakage Current 5.5 ±0.1 ±1.0 µAVI = VCC, GND
Maximum Hysteresis 4.5 1.4 1.4

H(MAX)

5.5 1.6 1.6

V

Minimum Hysteresis 4.5 0.4 0.4

H(MIN)

5.5 0.5 0.5

V

Maximum Positive 4.5 2.0 2.0

t+

Threshold 5.5 2.0 2.0

V

Minimum Negative 4.5 0.8 0.8

t−

Threshold 5.5 0.8 0.8

I

CCT

I

OLD

I

OHD

I

CC

Note 6: All outputs loaded; thres holds on input associated with output under test.
Note 7: Maximum test duration 2.0 ms, one output loaded at a time.

Maximum ICC/Input 5.5 0.6 1.5 mA VI = VCC − 2.1V
Minimum Dynamic 5.5 75 mA V
Output Current (Note 7) 5.5 −75 mA V
Maximum Quiescent
Supply Current or GND

5.5 2.0 20.0 µA

TA = +25°C

= +25°CT

A

C

= 50 pF CL = 50 pF

L

= −40°C to +85°C

T

A

= −40°C to +85°C

A

Units Conditions

V

OUT

V

V

OUT

V

VI

OUT

VIN = VIL or V

V

VI

OUT

VIN = VIL or V

V

= 24 mA (Note 6)

OL

VTA = Worst Case

VTA = Worst Case

VTA = Worst Case

VTA = Worst Case

OLD
OHD

VIN = V

= 0.1V

− 0.1V

CC

= 0.1V

− 0.1V

CC

= −50µA

= 50 µA

= 1.65V Max
= 3.85V Min

CC

74AC14 • 74ACT14

Units

ns

ns

IH

IH

3 www.fairchildsemi.com

AC Electrical Characteristics for ACT

Symbol Parameter

t

PLH

t

PHL

74AC14 • 74ACT14

Note 8: Voltage Range 5.0 is 5.0V ± 0.5V

Propagation Delay
Data to Output
Propagation Delay
Data to Output

T

V

CC

(V)

(Note 8) Min Typ Max Min Max

5.0 3.0 8.0 10.0 3.0 11.0 ns

5.0 3.0 8.0 10.0 3.0 11.0 ns

= +25°CT

A

C

= 50 pF CL = 50 pF

L

Capacitance

Symbol Parameter Typ Units Conditions

C

IN

C

PD

Input Capacitance 4.5 pF VCC = OPEN
Power Dissipation Capacitance for AC 25.0

for ACT 80

pF V

CC

= 5.0V

= −40°C to +85°C

A

Units

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Physical Dimensions inches (millimeters) unless otherwise noted

74AC14 • 74ACT14

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body

Package Number M14A

5 www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

74AC14 • 74ACT14

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

www.fairchildsemi.com 6

Package Number M14D

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

74AC14 • 74ACT14

14-Lead Thin Shrin k Small Ou tlin e Pack age (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC14

7 www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

74AC14 • 74ACT14 Hex Inverter with Schmitt Trigger Input

Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied a nd
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are device s or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the
user.

Package Number N14A

2. A critical component in any compon ent of a l ife supp ort
device or system whose failu re to perform can be rea­sonably expected to cause the failure of the li fe su pp ort
device or system, or to affect its safety or effectiveness.

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