Datasheet 74AC240 Datasheet (Fairchild)

74AC240, 74ACT240 Octal Buffer/Line Driver with 3-STATE Outputs

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

January 2008

Features

ICC and IOZ reduced by 50%

■

Inverting 3-STATE outputs drive bus lines or buffer memory address registers

Outputs source/sink 24mA

■

ACT240 has TTL-compatible inputs

General Description

The AC/ACT240 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density.

Ordering Information

Package

Order Number

74AC240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74AC240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

74AC240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 74ACT240SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ACT240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACT240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

74ACT240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

Number Package Description

Wide

All packages are lead free per JEDEC: J-STD-020B standard.

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

Connection Diagram

1

OE

1

2

I

0

3

O

4

I

1

5

O

5

6

I

2

7

O

6

8

I

3

9

O

7

10

GND

Pin Description

Pin Names Description

OE1, OE I0–I

7

O

0–O7

2

3-STATE Output Enable Inputs Inputs Outputs

Logic Symbol

I I I I

1

0

1

2

3

2

4

5

6

7

IEEE/IEC

EN

O

0

O

1

O

2

O

3

O

4

O

5

O

6

O

7

20

V

CC

19

OE

2

18

O

0

17

I

4

16

O

1

15

I

5

14

O

2

13

I

6

12

O

3

11

I

7

OE

Truth Tables

Inputs

1

LL H LH L

HX Z

I

n

Outputs

(Pins 12, 14, 16, 18)OE

Inputs

2

I

n

Outputs

(Pins 3, 5, 7, 9)OE

LL H LH L

HX Z

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Symbol Parameter Rating

V

CC

I

IK

V

I

OK

V

O

I

O

or I

I

CC

T

STG

T

Supply Voltage DC Input Diode Current

VI = −0.5V VI = VCC + 0.5

DC Input Voltage

I

−

0.5V to VCC + 0.5V

DC Output Diode Current

VO = −0.5V VO = VCC + 0.5V

DC Output Voltage

−

0.5V to VCC + 0.5V DC Output Source or Sink Current DC VCC or Ground Current per Output Pin

GND

Storage Temperature Junction Temperature 140°C

J

−65°

−

0.5V to +7.0V

−

20mA

+

20mA

−

20mA

+

20mA

±

50mA

±

50mA

C to +150°C

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.

Symbol Parameter Rating

V

∆

V / ∆

∆

V

CC

V

O

T

A

/

Supply Voltage

AC 2.0V to 6.0V ACT 4.5V to 5.5V

Input Voltage 0V to V

I

Output Voltage 0V to V Operating Temperature

t Minimum Input Edge Rate, AC Devices:

from 30% to 70% of VCC, VCC @ 3.3V, 4.5V, 5.5V

V

IN

∆

t Minimum Input Edge Rate, ACT Devices:

from 0.8V to 2.0V, VCC @ 4.5V, 5.5V

V

IN

−40°

C to +85°C

125mV/ns

CC

DC Electrical Characteristics for AC

TA = +25°CTA = −40°C to +85°C

Symbol Parameter V

V

I

IN

I

OLD

I

OHD

I

CC

Notes:

1. All outputs loaded; thresholds on input associated with output under test.

2. I

IN

3. Maximum test duration 2.0ms, one output loaded at a time.

Minimum HIGH Level

IH

Input Voltage

Maximum LOW Level

IL

Input Voltage

Minimum HIGH Level

OH

Output Voltage

Maximum LOW Level

OL

Output Voltage

(2)

Maximum Input Leakage Current

Maximum 3-STATE

OZ

Leakage Current

Minimum Dynamic Output Current

5.5 V

(2)

Maximum Quiescent

(3)

Supply Current

and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.

(V) Conditions

CC

3.0 V

4.5 2.25 3.15 3.15

= 0.1V or

OUT

VCC – 0.1V

1.5 2.1 2.1 V

5.5 2.75 3.85 3.85

3.0 V

4.5 2.25 1.35 1.35

= 0.1V or

OUT

VCC – 0.1V

1.5 0.9 0.9 V

5.5 2.75 1.65 1.65

3.0 I

= –50µA 2.99 2.9 2.9 V

OUT

4.5 4.49 4.4 4.4

5.5 5.49 5.4 5.4

3.0 V

4.5 V

5.5 V

3.0 I

= VIL or V

IN

= –12mA

I

OH

= VIL or VIH,

IN

= –24mA

I

OH

= VIL or VIH,

IN

= –24mA

I

OH

= 50µA 0.002 0.1 0.1 V

OUT

IH

(1)

,

2.56 2.46

3.86 3.76

4.86 4.76

4.5 0.001 0.1 0.1

5.5 0.001 0.1 0.1

3.0 V

4.5 V

5.5 V

= VIL or VIH,

IN

= 12mA

I

OL

= VIL or VIH,

IN

= 24mA

I

OL

= VIL or VIH,

IN

= 24mA

I

OL

(1)

0.36 0.44

5.5 VI = VCC, GND ±0.1 ±1.0 µA

5.5 VI (OE) = VIL, VIH; V

= VCC, GND;

I

V

= VCC, GND

O

5.5 V

= 1.65V Max. 75 mA

OLD

= 3.85V Min. -75 mA

OHD

±0.25 ±2.5 µA

5.5 VIN = VCC or GND 4.0 40.0 µA

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

UnitsTyp. Guaranteed Limits

DC Electrical Characteristics for ACT

TA = +25°CTA = −40°C to +85°C

Symbol Parameter V

V

I

CCT

I

OLD

I

OHD

I

Notes:

4. All outputs loaded; thresholds on input associated with output under test.

5. Maximum test duration 2.0ms, one output loaded at a time.

Minimum HIGH Level

IH

Input Voltage

Maximum LOW

IL

Level Input Voltage

Minimum HIGH Level

OH

Output Voltage

Maximum LOW

OL

Level Output Voltage

Maximum Input

IN

Leakage Current Maximum 3-STATE

OZ

Leakage Current Maximum ICC/Input 5.5 VI = VCC − 2.1V 0.6 1.5 mA Minimum Dynamic

Output Current

5.5 V Maximum Quiescent

CC

(5)

Supply Current

(V) Conditions

CC

4.5 V

5.5 1.5 2.0 2.0

4.5 V

5.5 1.5 0.8 0.8

4.5 I

= 0.1V or

OUT

V

− 0.1V

CC

= 0.1V or

OUT

V

− 0.1V

CC

= −50µA 4.49 4.4 4.4 V

OUT

1.5 2.0 2.0 V

1.5 0.8 0.8 V

5.5 5.49 5.4 5.4

4.5 V

5.5 V

4.5 I

= VIL or VIH,

IN

= −24mA

I

OH

= VIL or VIH,

IN

= −24mA

I

OH

= 50µA 0.001 0.1 0.1 V

OUT

(4)

5.5 0.001 0.1 0.1

4.5 V

5.5 V

= VIL or VIH,

IN

= 24mA

I

OL

= VIL or VIH,

IN

= 24mA

I

OL

(4)

5.5 VI = VCC, GND ±0.1 ±1.0 µA

5.5 VI = VIL, VIH; V

= VCC, GND

O

5.5 V

= 1.65V Max. 75 mA

OLD

= 3.85V Min. −75 mA

OHD

5.5 VIN = VCC or GND 4.0 40.0 µA

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

UnitsTyp. Guaranteed Limits

3.86 3.76

4.86 4.76

0.36 0.44

±0.25 ±2.5 µA

AC Electrical Characteristics for AC

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

TA = +25°C,

CL = 50pF

Symbol Parameter V

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Note:

6. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V.

Propagation Delay Data to Output

Output Enable Time 3.3 1.5 6.0 10.5 1.0 11.0 ns

Output Enable Time 3.3 1.5 7.0 10.0 1.0 11.0 ns

Output Disable Time 3.3 1.5 7.0 10.0 1.0 10.5 ns

Output Disable Time 3.3 1.5 7.5 10.5 1.0 11.5 ns

(6)

(V)

CC

3.3 1.5 6.0 8.0 1.0 9.0 ns

5.0 1.5 4.5 6.5 1.0 7.0

3.3 1.5 5.5 8.0 1.0 8.5 ns

5.0 1.5 4.5 6.0 1.0 6.5

5.0 1.5 5.0 7.0 1.0 8.0

5.0 1.5 5.5 8.0 1.0 8.5

5.0 1.5 6.5 9.0 1.0 9.5

AC Electrical Characteristics for ACT

TA = +25°C,

CL = 50pF

Symbol Parameter V

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Note:

7. Voltage range 5.0 is 5.0V ± 0.5V.

Propagation Delay, Data to Output

Output Enable Time 5.0 1.5 7.0 8.5 1.0 9.5 ns Output Enable Time 5.0 2.0 7.0 9.5 1.5 10.5 ns Output Disable Time 5.0 2.0 8.0 9.5 2.0 10.5 ns Output Disable Time 5.0 2.5 6.5 10.0 2.0 10.5 ns

(7)

(V)

CC

5.0 1.5 6.0 8.5 1.5 9.5 ns

5.0 1.5 5.5 7.5 1.5 8.5 ns

TA = −40°C to +85°C,

CL = 50pF

UnitsMin. Typ. Max. Min. Max.

TA = −40°C to +85°C,

CL = 50pF

UnitsMin. Typ. Max. Min. Max.

Capacitance

Symbol Parameter Conditions Typ. Units

C

IN

C

PD

Input Capacitance VCC = OPEN 4.5 pF Power Dissipation Capacitance VCC = 5.0V 45.0 pF

Physical Dimensions

20 11

B

7.60

10.65

7.40

10.00

13.00

12.60

11.43

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

A

9.50

2.25

PIN ONE

INDICATOR

(R0.10)

8° 0°

1 10

0.51

0.35

M

0.25

BC A

2.65 MAX

0.75

X45°

0.25

GAGE PLANE

0.25

1.27

LAND PATTERN RECOMMENDATION

C

0.30

0.10

0.10 C

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC

MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD

SEE DETAIL A

0.65

SEATING PLANE

FLASH OR BURRS.

1.27

0.40 (1.40)

SEATING PLANE

DETAIL A

SCALE: 2:1

D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P1030X265-20L F) DRAWING FILENAME: MKT-M20BREV3

Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

0.33

0.20

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package speciﬁcations do not expand the terms of Fairchild’s worldwide terms and conditions, speciﬁcally the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www

.fairchildsemi.com/packaging/

Physical Dimensions (Continued)

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package speciﬁcations do not expand the terms of Fairchild’s worldwide terms and conditions, speciﬁcally the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www

.fairchildsemi.com/packaging/

Physical Dimensions (Continued)

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package speciﬁcations do not expand the terms of Fairchild’s worldwide terms and conditions, speciﬁcally the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www

.fairchildsemi.com/packaging/

Physical Dimensions (Continued)

26.92

24.89

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

(0.97)

2.54

.001[.025] C

NOTES:

PIN #1

0.36

0.56

1.78

1.14

7° TYP

3.55

3.17

0.38 MIN

7.11

6.09

3.43

3.17

5.33 MAX

10.92 MAX

7.87

7° TYP

7.62

0.20

0.35

Figure 4. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package speciﬁcations do not expand the terms of Fairchild’s worldwide terms and conditions, speciﬁcally the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www

.fairchildsemi.com/packaging/

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are trademarks of System General Corporation, used under license by Fairchild Semiconductor.

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TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ µSerDes™

®

UHC Ultra FRFET™ UniFET™ VCX™

74AC240, 74ACT240 — Octal Buffer/Line Driver with 3-STATE Outputs

®

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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use

2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

provided in the labeling, can be reasonably expected to result in a significant injury of the user.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Form

ative or In Design

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data; supplementary data will be

Preliminary

First Production

published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.

This datasheet contains final specifications. Fairchild Semiconductor

No Identification Needed Full Production

reserves the right to make changes at any time without notice to improve the design.

This datasheet contains specifications on a product that has been

Obsolete Not In Production

discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only.

Rev. I32