TheAC161isahigh-speedCMOS
SYNCRONOUSPRESETTABLECOUNTER
fabricated with sub-micron silicon gate and
double-layermetal wiring C
ideal for low power applications mantaining high
speed operation similar to eqivalent Bipolar
Schottky TTL. It is a 4 bit binary counter with
AsynchronousClear.
The circuit have four fundamental modes of
operation, in order of preference: synchronous
=28%VCC(MIN.)
PHL
2
MOS technology.It is
74AC161
B
(PlasticPackage)
(Micro Package)
ORDERCODES :
74AC161B74AC161M
reset, parallel load, count-up and hold. Four
control inputs, Master Reset (CLEAR), Parallel
Enable Input (LOAD), Count Enable Input (PE)
and Count Enable Carry Input (TE), determine
the mode of operation as shown in the Truth
Table. A LOW signal on CLEAR overrides
counting and parallel loading and sets all outputs
on LOW state. A LOW signal on LOAD overrides
counting and allows information on Parallel Data
Qn inputs to be loaded into the flip-flops on the
next rising edge of CLOCK. With LOAD and
CLEAR, PE and TE permit counting when both
are HIGH. Conversely, a LOW signal on either
PE and TE inhibitscounting.
All inputs andoutputs areequipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
M
PIN CONNECTION AND IECLOGIC SYMBOLS
December 1998
1/12
Page 2
74AC161
INPUT AND OUTPUTEQUIVALENTCIRCUIT
PIN DESCRIPTION
PI N NoSYM BO LNAM E AND FU NCTION
1CLEARMasterReset
2CLOCKClockInput(LOW-to-HIGH,
Edge-Triggered)
3, 4, 5, 6A, B, C, D Data Inputs
7PECountEnable Input
10TECountEnable CarryInput
9LOADParallelEnableInput
14, 13,12,11QA to QDFlip-Flop Outpus
15CARRY
OUT
8GNDGround(0V)
16V
CC
Terminal CountOutput
PositiveSupply Voltage
TRUTH TABLE
INPUTSOUTPUTSFUNCTION
CLEAR LOADPETECLOCKQAQBQCQD
LXXXXLLLLRESET TO ”0”
HLXXABCDPRESET DATA
HHXLNO CHANGENO COUNT
HHLXNO CHANGENO COUNT
HHHHCOUNT UPCOUNT
HXXXNO CHANGENO COUNT
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