Datasheet 74AC151 Datasheet (Fairchild)

Page 1
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74AC151 • 74ACT151 8-Input Multiplexer
74AC151 • 74ACT151 8-Input Multiplexer
November 1988 Revised November 1999
General Description
The AC/ACT151 is a high-speed 8-input digi t al multiplexer. It provides, in one package, the ability to select o ne line of data from up to eight sources. The AC/ACT151 can be used as a universal function generator to generate any logic function of four variable s. Both true and compl emen­tary outputs are provided.
Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ACT151 has TTL-compatible inputs
Ordering Code:
Order Number Package Number Package Description
74AC151SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74AC151SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC151MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC151PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 74ACT151SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74ACT151SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACT151PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the or dering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names Description
I
0–I7
S
0–S2
E Z Data Output Z
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS009927 www.fairchildsemi.com
Data Inputs Select Inputs Enable Input
Inverted Data Output
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Truth Table
Inputs Outputs
S
E
S
2
S
1
0
Z Z
H X X X H L L L L L I L L L H I1 I L L H L I2 I
74AC151 • 74ACT151
L L H H I3 I L H L L I4 I L H L H I5 I L H H L I6 I L H H H I7 I
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
Logic Diagram
Functional Description
The AC/ACT151 is a logic imple mentat ion of a sing le pole, 8-position switch with the switch pos ition controlle d by the state of three Select inp uts, S
plementary outputs are provided. The En able input (E active LOW. When it is not activa ted, the complementary output is HIGH and the true output is LOW regardless of all
I
0
0
other inputs. The logic function provided at the output is:
1 2 3 4 5 6 7
Z = E
• (I0 • S0 • S1 • S2 + I1 • S0 • S1 • S2 +
• S0 • S1 • S2 + I3 • S0 • S1 • S2 + I4 • S0 • S1 • S2 + I5 •
I
2
• S1 • S2 + I6 • S0 • S1 • S2 + I 7 • S0 • S1 • S2)
S
0
The AC/ACT151 provides the ability, in one package, to select from eight sources of data or con trol info rmatio n. By proper manipulation of the inputs, the AC/ACT151 can pro­vide any logic function of four variables and its comple­ment.
, S1, S2. Both true and com-
0
) is
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Absolute Maximum Ratings(Note 1) Recommended Operating
Supply Voltage (VCC) −0.5V to +7.0V DC Input Diode Current (I
V
= −0.5V −20 mA
I
= VCC + 0.5V +20 mA
V
I
DC Input Voltage (V DC Output Diode Current (I
= −0.5V −20 mA
V
O
V
= VCC + 0.5V +20 mA
O
DC Output Voltage (V
)
IK
) −0.5V to VCC + 0.5V
I
)
OK
) −0.5V to VCC + 0.5V
O
DC Output Source
or Sink Current (I
DC V
or Ground Current
CC
per Output Pin (I Storage Temperature (T Junction Temperature (T
) ±50 mA
O
or I
CC
) ±50 mA
GND
) −65°C to +150°C
STG
)
J
PDIP 140°C
Conditions
Supply Voltage (V
AC 2.0V to 6.0V
ACT 4.5V to 5.5V Input Voltage (V Output Voltage (VO) 0V to V Operating Temperature (TA) −40°C to +85°C Minimum Input Edge Rate (∆V/∆t)
AC Devices
V
from 30% to 70% of V
IN
VCC @ 3.3V, 4.5V, 5.5V 125 mV/ns Minimum Input Edge Rate (∆V/∆t)
ACT Devices
V
from 0.8V to 2.0V
IN
@ 4.5V, 5.5V 125 mV/ns
V
CC
Note 1: Absolute max imum ratings are those va lues beyond which damage to the device may occu r. The databook spe cificatio ns shou ld be met, w ith­out exception, to ensure that the system de sign is relia ble over its p ower supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specif ic at ions.
)
CC
) 0V to V
I
CC
DC Electrical Characteristics for AC
V
Symbol Parameter
V
V
V
V
I
IN
(Note 4) I
OLD
I
OHD
I
CC
(Note 4)
Note 2: All outputs loaded; thres holds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: I
Minimum HIGH Level 3.0 1.5 2.1 2.1 V
IH
Input Voltage 4.5 2.25 3.15 3.15 V or VCC − 0.1V
Maximum LOW Level 3.0 1.5 0.9 0.9 V
IL
Input Voltage 4.5 2.25 1.35 1.35 V or VCC − 0.1V
Minimum HIGH Level 3.0 2.99 2.9 2.9
OH
Output Voltage 4.5 4.49 4.4 4.4 V I
Maximum LOW Level 3.0 0.002 0.1 0.1
OL
Output Voltage 4.5 0.001 0.1 0.1 V I
Maximum Input Leakage Current
Minimum Dynamic 5.5 75 mA V Output Current (Note 3) 5.5 −75 mA V Maximum Quiescent
Supply Current
and ICC @ 3.0V are guaranteed to be less than or e qual to the respective lim it @ 5. 5V VCC.
IN
CC
(V) Typ Guaranteed Limits
5.5 2.75 3.85 3.85
5.5 2.75 1.65 1.65
5.5 5.49 5.4 5.4
3.0 2.56 2.46 IOH = −12 mA
4.5 3.86 3.76 V I
5.5 4.86 4.76 I
5.5 0.001 0.1 0.1
3.0 0.36 0.44 IOL = 12 mA
4.5 0.36 0.44 V IOL = 24 mA
5.5 0.36 0.44 IOL = 24 mA (Note 2)
5.5 ±0.1 ±1.0 µA VI = VCC, GND
5.5 4.0 40.0 µAVIN = VCC or GND
TA = +25°C T
= −40°C to +85°C
A
Units Conditions
= 0.1V
OUT
= 0.1V
OUT
= −50 µA
OUT
VIN = V
or V
IL
= −24 mA
OH
= −24 mA(Note 2)
OH
= 50 µA
OUT
VIN = VIL or V
= 1.65V Max
OLD
= 3.85V Min
OHD
74AC151 • 74ACT151
CC CC
IH
IH
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DC Electrical Characteristics for ACT
V
Symbol Parameter
V
Minimum HIGH Level 4.5 1.5 2.0 2.0 V V
IH
CC
(V) Typ Guaranteed Limits
Input Voltage 5.5 1.5 2.0 2.0 or VCC − 0.1V
V
Maximum LOW Level 4.5 1.5 0.8 0.8 V V
IL
Input Voltage 5.5 1.5 0.8 0.8 or V
V
74AC151 • 74ACT151
Minimum HIGH Level 4.5 4.49 4.4 4.4
OH
Output Voltage 5.5 5.49 5.4 5.4
4.5 3.86 3.76 V IOH = −24 mA
5.5 4.86 4.76 I
V
Maximum LOW Level 4.5 0.001 0.1 0.1
OL
Output Voltage 5.5 0.001 0.1 0.1
4.5 0.36 0.44 V IOL = 24 mA
5.5 0.36 0.44 IOL = 24 mA (Note 5)
I
IN
I
CCT
I
OLD
I
OHD
I
CC
Note 5: All outputs loaded; thresholds on input associated with output under test. Note 6: Maximum test dura tio n 2. 0 ms, one output loaded at a time.
Maximum Input Leakage Current Maximum ICC/Input
5.5 ±0.1 ±1.0 µA VI = VCC, GND
5.5 0.6 1.5 mA VI = VCC − 2.1V
Minimum Dynamic 5.5 75 mA V Output Current (Note 6) 5.5 −75 mA V Maximum Quiescent Supply Current or GND
5.5 4.0 40.0 µA
AC Electrical Characteristics for AC
V
CC
Symbol Parameter (V)
(Note 7) Min Typ Max Min Max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Note 7: Voltage Range 3.3 is 3.3V ± 0.3V
Propagation Delay 3.3 3.0 11.5 18.0 3.0 20.0 Sn to Z or Z 5.0 2.5 8.5 13.0 2.0 15.0 Propagation Delay 3.3 2.5 12.0 18.0 2.5 20.0 Sn to Z or Z 5.0 2.0 8.5 13.0 1.5 15.0 Propagation Delay 3.3 2.5 8.0 13.0 2.0 14.0 E to Z or Z 5.0 2.0 6.0 10.0 1.5 11.0 Propagation Delay 3.3 1.5 8.5 13.0 1.5 14.0 E to Z or Z 5.0 1.5 6.5 10.0 1.5 11.0 Propagation Delay 3.3 2.5 9.5 14.0 2.0 15.5 In to Z or Z 5.0 1.5 7.0 10.5 1.5 11.0 Propagation Delay 3.3 2.5 9.5 15.0 2.0 16.0 In to Z or Z 5.0 1.5 7.0 11.0 1.5 12.0
Voltage Range 5.0 is 5.0V ± 0.5V
TA = +25°C TA = −40°C to +85°C
TA = +25°CT
C
= 50 pF CL = 50 pF
L
Units Conditions
= 0.1V
OUT
= 0.1V
OUT
− 0.1V
CC
V I
V I
= −40°C to +85°C
A
= −50 µA
OUT
VIN = V
or V
IL
= −24 mA (Note 5)
OH
= 50 µA
OUT
VIN = V
or V
IL
= 1.65V Max
OLD
= 3.85V Min
OHD
VIN = V
CC
IH
IH
Units
ns
ns
ns
ns
ns
ns
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AC Electrical Characteristics for ACT
V
CC
Symbol Parameter (V)
t
PLH
t
PHL
t
PLH
Propagation Delay
to Z
S
n
Propagation Delay S
to Z
n
Propagation Delay Sn to Z
t
PHL
t
PLH
t
PHL
Propagation Delay
to Z
S
n
Propagation Delay E
to Z Propagation Delay E to Z
t
PLH
t
PHL
t
PLH
Propagation Delay
to Z
E Propagation Delay E
to Z Propagation Delay In to Z
t
PHL
t
PLH
t
PHL
Propagation Delay
to Z
I
n
Propagation Delay I
to Z
n
Propagation Delay In to Z
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V
(Note 8) Min Typ Max Min Max
5.0 3.5 12.5 15.5 3.0 17.0 ns
5.0 3.5 12.5 15.5 3.0 16.5 ns
5.0 3.5 12.5 15.0 3.0 16.5 ns
5.0 4.0 12.5 16.5 3.5 18.5 ns
5.0 2.5 6.0 9.5 2.5 10.0 ns
5.0 2.5 6.0 9.0 2.5 10.0 ns
5.0 2.5 6.0 8.5 2.5 9.5 ns
5.0 3.0 6.5 10.0 2.5 10.5 ns
5.0 3.5 7.5 11.5 3.0 12.5 ns
5.0 3.5 8.0 12.0 3.0 13.5 ns
5.0 3.5 8.0 12.0 3.0 13.0 ns
5.0 4.0 8.0 12.5 3.0 14.0 ns
TA = +25°CT C
= 50 pF CL = 50 pF
L
= −40°C to +85°C
A
74AC151 • 74ACT151
Units
Capacitance
Symbol Parameter Typ Units Conditions
C
IN
C
PD
Input Capacitance 4.5 pF VCC = OPEN Power Dissipation Capacitance 70.0 pF VCC = 5.0V
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Physical Dimensions inches (millimeters) unless otherwise noted
74AC151 • 74ACT151
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS -012, 0.150” Narrow Body
Package Number M16A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
74AC151 • 74ACT151
16-Lead Small Outline Package (SOIC), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
74AC151 • 74ACT151
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
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Package Number MTC16
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
74AC151 • 74ACT151 8-Input Multiplexer
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provide d in the l abe ling, can be rea­sonably expected to result in a significant injury to the user.
Package Number N16E
2. A critical compo nent in any com ponen t of a life s upp ort device or system whose failure to perform can be rea­sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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