Datasheet 74ABT827PW, 74ABT827DB, 74ABT827D Datasheet (Philips)

INTEGRATED CIRCUITS

74ABT827

10-bit buffer/line driver, non-inverting
(3-State)

Product specification
Supersedes data of 1995 Sep 06

IC23 Data Handbook




1998 Jan 16

Philips Semiconductors Product specification

74ABT82710-bit buffer/line driver, non-inverting (3-State)

FEA TURES

•Ideal where high speed, light loading, or increased fan-in are

required

•Flow through pinout architecture for microprocessor oriented

applications

•Output capability: +64mA/–32mA

•Slim 300 mil-wide plastic 24-pin package

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015

and 200 V per Machine Model

•Power-up 3-State

•Inputs are disabled during 3-State mode

QUICK REFERENCE DATA

SYMBOL PARAMETER

C

t

PLH

t

PHL

C

OUT

I

CCZ

IN

Propagation delay
An to Yn

Input capacitance VI = 0V or V

Output capacitance

Total supply current Outputs disabled; VCC = 5.5V 500 nA

DESCRIPTION

The 74ABT827 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.

The 74ABT827 10-bit buffers provide high performance bus
interface buffering for wide data/address paths or buses carrying
parity. They have NOR Output Enables (OE
control flexibility.

CONDITIONS

T

= 25°C; GND = 0V

amb

CL = 50pF; VCC = 5V 3.0 ns

CC

Outputs disabled;
VO = 0V or V

CC

0, OE1) for maximum

TYPICAL UNIT

4 pF

7 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

24-Pin Plastic DIP –40°C to +85°C 74ABT827 N 74ABT827 N SOT222-1
24-Pin plastic SO –40°C to +85°C 74ABT827 D 74ABT827 D SOT137-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT827 DB 74ABT827 DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT827 PW 74ABT827PW DH SOT355-1

1998 Jan 16 853-1618 18866

2

Philips Semiconductors Product specification

74ABT82710-bit buffer/line driver, non-inverting (3-State)

PIN CONFIGURATION

1

OE0

2

A0

3

A1

4

A2

5

A3

6

A4

7

A5

8

A6

9

A7 Y7

10 15

A8

11 14A9
12 13GND

TOP VIEW

24

V

CC

Y0

23

Y1

22

Y2

21

Y3

20

Y4

19

Y5

18

Y6

17
16

Y8
Y9
OE

1

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

1, 13 OE0, OE1

2, 3, 4, 5, 6,

7, 8, 9, 10, 11

23, 22, 21, 20, 19,

18, 17, 16, 15, 14

A0-A9 Data inputs

Y0-Y9 Data outputs

Output enable input
(active-Low)

10 GND Ground (0V)
20 V

CC

Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

SA00233

LOGIC SYMBOL

234567891011

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9

1

OE0

13

OE1

Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9

23 22 21 20 19 18 17 16 15 14

SA00234

FUNCTION TABLE

INPUTS OUTPUTS OPERATING

OEn An Yn MODE

L L L Transparent
L H H Transparent
H X Z High impedance

H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state

1998 Jan 16

1

&

13

223
322
421
520
619
718
817

916
10 15
11 14

EN1

1

SA00235

3

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

74ABT82710-bit buffer/line driver, non-inverting (3-State)

LOGIC DIAGRAM

A1

3

22

Y1

OE
OE1

A0

2

1

0

13

23

Y0

ABSOLUTE MAXIMUM RA TINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

I

OUT

T

stg

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range –65 to 150 °C

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

A2

4

21

Y2

A3

5

20

Y3

A4

6

19

Y4

A5

7

18

Y5

A6

8

17

Y6

A7

9

16

Y7

A8

10

15

Y8

SA00236

–1.2 to +7.0 V

output in Off or High state –0.5 to +5.5 V

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

A9

11

14

Y9

RECOMMENDED OPERATING CONDITIONS

LIMITS

Min Max

V

CC

V
V
V
I

OH

I

OL

∆t/∆v Input transition rise or fall rate 0 5 ns/V

T

amb

1998 Jan 16

DC supply voltage 4.5 5.5 V
Input voltage 0 V

I

High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature range –40 +85 °C

4

CC

V

Philips Semiconductors Product specification

74ABT82710-bit buffer/line driver, non-inverting (3-State)

DC ELECTRICAL CHARACTERISTICS

LIMITS

T

= –40°C

T

SYMBOL PARAMETER TEST CONDITIONS

amb

= +25°C

Min Typ Max Min Max

V

V

V

I

OFF

IPU/I

I

OZH

I

OZL

I

CEX

I

CCH

I

CCL

I

CCZ

∆I

Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V

IK

VCC = 4.5V; IOH = –3mA; VI = VIL or V

High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V

OH

VCC = 4.5V; IOH = –32mA; VI = VIL or V

Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V

OL

I

Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA

I

IH

IH

IH

IH

2.5 2.9 2.5 V

3.0 3.4 3.0 V

2.0 2.4 2.0 V

0.42 0.55 0.55 V

Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA
Power-up/down 3-State

PD

output current

3

3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V
3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V
Output HIgh leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V

I

O

Output current

1

Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V

Additional supply current per

CC

input pin

2

VCC = 2.0V; VO = 0.5V; VI = GND or VCC;
VOE = V

CC

IH

IH

CC

±5.0 ±50 ±50 µA

5.0 50 50 µA

–5.0 –50 –50 µA

5.0 50 50 µA
VCC = 5.5V; VO = 2.5V –50 –80 –180 –50 –180 mA
VCC = 5.5V; Outputs High, VI = GND or V

CC

CC

VCC = 5.5V; Outputs 3–State;
VI = GND or V

CC

Outputs enabled, one input at 3.4V , other
inputs at VCC or GND; VCC = 5.5V

Outputs 3-State, one data input at 3.4V , other
inputs at VCC or GND; VCC = 5.5V

Outputs 3–State, one enable input at 3.4V ,
other inputs at VCC or GND; VCC = 5.5V

0.5 250 250 µA

25 38 38 mA

0.5 250 250 µA

0.5 1.5 1.5 mA

0.01 50 50 mA

0.5 1.5 1.5 mA

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4V.

3. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. For VCC = 2.1V to VCC = 5V  10%, a
transition time of up to 100µsec is permitted.

amb

to +85°C

UNIT

1998 Jan 16

5

Philips Semiconductors Product specification

74ABT82710-bit buffer/line driver, non-inverting (3-State)

AC CHARACTERISTICS

GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω

LIMITS

T

= -40 to

SYMBOL PARAMETER WAVEFORM

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Propagation delay
An to Yn

Output enable time
to High and Low level

Output disable time
from High and Low level

1

2

2

AC WAVEFORMS

VM = 1.5V, VIN = GND to 3.0V

3 V

INPUT

OUTPUT

1.5V

t

PLH

1.5V 1.5V

Waveform 1. W aveforms Showing the Input (An) to Output (Yn)

Propagation Delays

1.5V

0 V

t

PHL

V

OH

V

OL

SA00028

T

= +25oC

amb

VCC = +5.0V

Min Typ Max Min Max

1.1

1.1

1.6

2.6

2.0

2.5

INPUT

OUTPUT

OUTPUT

OEn

Yn

Yn

3.0

2.9

3.7

4.6

4.8

5.1

V

M

t

PZL

t

PZH

4.4

4.1

5.1

5.9

6.3

6.6

V

M

V

M

Waveform 2. Waveforms Showing the 3-State Output Enable

and Disable Times

amb

o

+85

C

VCC = +5.0V ±0.5V

1.1

1.1

1.6

2.6

2.0

2.5

V

t

t

4.8

4.7

5.9

6.9

6.8

6.9

M

PLZ

PHZ

0V

3.5V

V
V

V

V

UNIT

OL
OL

OH

OH

ns

ns

ns

+ 0.3V

– 0.3V

SA00206

TEST CIRCUIT AND WAVEFORM

From Output
Under Test

C

= 50 pF

L

DEFINITIONS

= Load capacitance includes jig and probe capacitance;

C

L

see AC CHARACTERISTICS for value.

500 Ω

500 Ω

Load Circuit

TEST S1

t

pd

t

PLZ/tPZL

t

PHZ/tPZH

open

7 V

open

7 V

S1

Open

GND

SA00012

1998 Jan 16

6

Philips Semiconductors Product specification

74ABT82710-bit buffer/line driver, non-inverting (3-State)

DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1

1998 Jan 16

7

Philips Semiconductors Product specification

74ABT82710-bit buffer/line driver, non-inverting (3-State)

SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

1998 Jan 16

8

Philips Semiconductors Product specification

74ABT82710-bit buffer/line driver, non-inverting (3-State)

SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1

1998 Jan 16

9

Philips Semiconductors Product specification

74ABT82710-bit buffer/line driver, non-inverting (3-State)

TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1

1998 Jan 16

10

Philips Semiconductors Product specification

10-bit buffer/line driver, non-inverting
(3-State)

74ABT827

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.

LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected

to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.

Philips Semiconductors and Philips Electronics North America Corporation

register eligible circuits under the Semiconductor Chip Protection Act.

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

(print code) Date of release: July 1994
Document order number: 9397-750-03474