Datasheet 74ABT574APW, 74ABT574AN, 74ABT574ADB, 74ABT574AD Datasheet (Philips)

INTEGRATED CIRCUITS

74ABT574A

Octal D-type flip-flop (3-State)

Product specification 1995 May 22
IC23 Data Handbook

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Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

FEA TURES

•74ABT574A is flow-through pinout version of 74ABT374

•Inputs and outputs on opposite side of package allow easy

interface to microprocessors

•3-State outputs for bus interfacing

•Power-up 3-State

•Power-up reset

•Common output enable

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015

and 200 V per Machine Model

•Live insertion/extraction permitted.

QUICK REFERENCE DATA

SYMBOL PARAMETER

C

t

PLH

t

PHL

C

OUT

I

CCZ

IN

Propagation delay
CP to Qn

Input capacitance VI = 0V or V
Output capacitance Outputs disabled; VO = 0V or V
Total supply current Outputs disabled; VCC =5.5V

DESCRIPTION

The 74ABT574A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.

The 74ABT574A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE
gates. The state of each D input (one set-up time before the
Low-to-High clock transition) is transferred to the corresponding
flip-flop’s Q output.

When OE
is High, the outputs are in the High-impedance “off” state, which
means they will neither drive nor load the bus.

The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE
independent of the clock operation.

CONDITIONS
= 25°C; GND = 0V

T

amb

CL = 50pF; VCC = 5V

CC

) control

is Low, the stored data appears at the outputs. When OE

) controls all eight 3-State buffers

TYPICAL UNIT

3.0

3.4

ns

3 pF

CC

6 pF

100

µA

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

20-Pin Plastic DIP –40°C to +85°C 74ABT574A N 74ABT574A N SOT146-1
20-Pin plastic SO –40°C to +85°C 74ABT574A D 74ABT574A D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT574A DB 74ABT574A DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT574A PW 7ABT574APW DH SOT360-1

PIN CONFIGURATION

1OE

D0

2

D1

3

D2

4

D3

5

D4

6

D5

7

D6

8

D7

9

GND

10 11

V

20

CC

19

Q0

18

Q1

17

Q2

16

Q3

15

Q4

14

Q5

13

Q6

12

Q7
CP

SA00103

PIN DESCRIPTION

PIN

NUMBER

1 OE Output enable input (active-Low)

2, 3, 4, 5,

6, 7, 8, 9

19, 18, 17,
16, 15, 14,

13, 12

11 CP Clock pulse input (active rising edge)
10 GND Ground (0V)
20 V

SYMBOL FUNCTION

D0-D7 Data inputs

Q0-Q7 Data outputs

Positive supply voltage

CC

1995 May 22 853-1509 15261

2

Philips Semiconductors Product specification

INTERNAL

OPERATING

74ABT574AOctal D-type flip-flop (3-State)

LOGIC SYMBOL

23456789

D0 D1 D2 D3 D4 D5 D6 D7

11

CP

1

OE

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

19 18 17 16 15 14 13 12

LOGIC SYMBOL (IEEE/IEC)

1

EN

11

C1

2

2D

3

4

5

6

7

8

9

FUNCTION TABLE

INPUTS

OE CP Dn

LL↑

↑lh

INTERNAL
REGISTER

L

H

L ↑ X NC NC Hold

HH↑↑X

Dn

NC

Dn

H = High voltage level
h = High voltage level one set-up time prior to the Low–to–High

clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low–to–High

clock transition
NC= No change
X = Don’t care

SA00104

1

19

18

17

16

15

14

13

12

Z = High impedance “off” state
↑ = Low-to-High clock transition

= not a Low-to-High clock transition

↑

OUTPUTS

Q0 – Q7

L

H

Z
Z

OPERATING

MODE

Load and read
register

Disable outputs

LOGIC DIAGRAM

D0

23456789

11

CP

1

OE

1995 May 22

SA00105

D1

D

CP Q

Q0

D

CP Q

19 18 17 16 15 14 13 12

D2

D

CP Q

Q1 Q2 Q3 Q4 Q5 Q6 Q7

D3

D

CP Q

D4

D

CP Q

D5

D

CP Q

D6

D

CP Q

3

D7

D

CP Q

SA00106

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

74ABT574AOctal D-type flip-flop (3-State)

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

I

OUT

T

stg

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range –65 to 150 °C

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–1.2 to +7.0 V

output in Off or High state –0.5 to +5.5 V

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

LIMITS

Min Max

V

CC

V
V
V
I

OH

I

OL

∆t/∆v Input transition rise or fall rate 0 5 ns/V

T

amb

DC supply voltage 4.5 5.5 V
Input voltage 0 V

I

High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature range –40 +85 °C

CC

V

1995 May 22

4

Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

DC ELECTRICAL CHARACTERISTICS

LIMITS

T

= –40°C

SYMBOL PARAMETER TEST CONDITIONS T

amb

= +25°C

Min Typ Max Min Max

V

V

V

V

I

OFF

IPU/I

I

OZH

I

OZL

I

CEX

I

CCH

I

CCL

I

CCZ

∆I

Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V

IK

VCC = 4.5V; IOH = –3mA; VI = VIL or V

High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V

OH

VCC = 4.5V; IOH = –32mA; VI = VIL or V

Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V

OL

Power-up output low

RST

I

I

3

voltage
Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA

VCC = 5.5V; IO = 1mA; VI = GND or V

IH

IH

IH

IH

CC

2.5 2.9 2.5 V

3.0 3.4 3.0 V

2.0 2.4 2.0 V

0.42 0.55 0.55 V

0.13 0.55 0.55 V

Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA
Power-up/down 3-State

PD

output current

4

VCC = 2.0V; VO = 0.5V; VI = GND or V
VOE = Don’t care

3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V
3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V

I

O

Output current

1

VCC = 5.5V; VO = 2.5V –40 –180 –40 –180 mA
VCC = 5.5V; Outputs High, VI = GND or V

Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V

VCC = 5.5V; Outputs 3-State;

= GND or V

V

Additional supply current per

CC

input pin

2

I

VCC = 5.5V; one input at 3.4V,
other inputs at V

CC

or GND

CC

CC;

IH

IH

CC

CC

CC

±5.0 ±50 ±50 µA

5.0 50 50 µA

–5.0 –50 –50 µA

5.0 50 50 µA

100 250 250 µA

24 30 30 mA

100 250 250 µA

0.5 1.5 1.5 mA

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4V.

3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.

4. This parameter is valid for any V
transition time of up to 100 µsec is permitted.

between 0V and 2.1V , with a transition time of up to 10 msec. From VCC = 2.1V to VCC = 5V 10% a

CC

amb

to +85°C

UNIT

AC CHARACTERISTICS

GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω

SYMBOL PARAMETER WAVEFORM

f

MAX

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

1995 May 22

Maximum clock frequency 1 150 400 150 ns
Propagation delay

CP to Qn
Output enable time

to High and Low level
Output disable time

from High and Low level

1
3

4
3

4

LIMITS

T

amb

V

CC

= +25oC
= +5.0V

T

= -40 to +85oC

amb

= +5.0V ±0.5V

V

CC

Min Typ Min Min Max

1.5

2.0

1.0

2.5

1.8

1.4

3.0

3.4

2.9

3.8

3.1

2.6

4.4

4.7

4.1

5.2

4.3

3.8

1.5

2.0

1.0

2.5

1.8

1.4

5

5.0

5.1

5.0

5.7

5.0

4.0

UNIT

ns

ns

ns

Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

AC SETUP REQUIREMENTS

GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω

LIMITS

T

SYMBOL PARAMETER WAVEFORM

ts(H)

(L)

t

s

th(H)

(L)

t

h

tw(H)

(L)

t

w

Setup time, High or Low
Dn to CP

Hold time, High or Low
Dn to CP

CP pulse width
High or Low

2

2

1

AC WAVEFORMS

VM = 1.5V, VIN = GND to 3.0V

1/f

MAX

= +25oC

amb

= +5.0V

V

CC

Min Typ Min

1.0

1.0

1.0

1.0

2.0

2.0

0.6

0.2

–0.7
–0.4

0.7

0.8

T

= -40 to +85oC

amb

= +5.0V ±0.5V

V

CC

1.0

1.0

1.0

1.0

2.0

2.0

UNIT

ns

ns

ns

CP

Qn

VM VM VM

tw(H) tw(L)

t

PHL

VM VM

t

PLH

SA00056

Waveform 1. Propagation Delay, Clock Input to Output, Clock

Pulse Width, and Maximum Clock Frequency

V

Dn

t

(H) th(H) ts(L) th(L)

s

CP

NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.

V

M

M

V

M

V

V

M

M

V

M

SA00107

Waveform 2. Data Setup and Hold Times

OE

Qn

V

M

t

PZH

V

M

t

PHZ

V

M

V

OH

VOH –0.3V

0V

SA00108

Waveform 3. 3-State Output Enable Time to High Level and

Output Disable Time from High Level

OE

Qn

V

M

t

PZL

V

M

t

PLZ

V

M

VOL +0.3V
V

OL

SA00109

Waveform 4. 3-State Output Enable Time to Low Level and

Output Disable Time from Low Level

1995 May 22

6

Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

TEST CIRCUIT AND WAVEFORM

V

CC

R

PULSE

GENERATOR

V

IN

R

D.U.T.

T

V

OUT

C

L

L

R

L

Test Circuit for 3-State Outputs

SWITCH POSITION

TEST SWITCH

t
t

PLZ
PZL

closed
closed

All other open

DEFINITIONS

RL = Load resistor; see AC CHARACTERISTICS for value.

= Load capacitance includes jig and probe capacitance;

C

L

see AC CHARACTERISTICS for value.

= Termination resistance should be equal to Z

R

T

pulse generators.

OUT

of

t

W

(tF)

(tR)t

t

W

90%

V

M

V

M

10%

7.0V

90%

NEGATIVE
PULSE

POSITIVE
PULSE

10%

V

M

10% 10%

t

THL

t

TLH

90% 90%

V

M

VM = 1.5V

Input Pulse Definition

INPUT PULSE REQUIREMENTS

FAMILY

Amplitude Rep. Rate t

t

W

R

74ABT 3.0V 1MHz 500ns 2.5ns 2.5ns

t

TLH

THL

AMP (V)

0V

(tR)

(tF)

AMP (V)

0V

t

F

SA00012

1995 May 22

7

Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

1995 May 22

8

Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1

1995 May 22

9

Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1

1995 May 22

10

Philips Semiconductors Product specification

74ABT574AOctal D-type flip-flop (3-State)

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.

LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected

to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.

Philips Semiconductors and Philips Electronics North America Corporation

register eligible circuits under the Semiconductor Chip Protection Act.

 Copyright Philips Electronics North America Corporation 1995

All rights reserved. Printed in U.S.A.