Datasheet 74ABT543APW, 74ABT543AN, 74ABT543ADB, 74ABT543AD Datasheet (Philips)

INTEGRATED CIRCUITS

74ABT543A

Octal latched transceiver
with dual enable (3-State)

Product specification
Supersedes data of 1995 Apr 19
IC23 Data Handbook

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1998 Sep 24

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

FEA TURES

•Combines 74ABT245 and 74ABT373 type functions in one device

•8-bit octal transceiver with D-type latch

•Back-to-back registers for storage

•Separate controls for data flow in each direction

•Output capability: +64mA/–32mA

•Live insertion/extraction permitted

•Power-up 3-State

•Power-up reset

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015

and 200 V per Machine Model

DESCRIPTION

The 74ABT543A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.

QUICK REFERENCE DATA

SYMBOL PARAMETER

t

PLH

t

PHL

C
C
I

CCZ

IN

I/O

Propagation delay
An to Bn or Bn to An

CL = 50pF; VCC = 5V
Input capacitance VI = 0V or V
I/O capacitance

Outputs disabled;

V

= 0V or V

O

Total supply current Outputs disabled; VCC =5.5V 110 µA

74ABT543A

The 74ABT543A Octal Registered Transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB

, OEBA) inputs are provided for each register to permit

(OEAB
independent control of data transfer in either direction. The outputs
are guaranteed to sink 64mA.

FUNCTIONAL DESCRIPTION

The 74ABT543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB
Enable (LEAB
subsequent Low-to-High transition of the LEAB
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB
3-State B output buffers are active and display the data present at
the outputs of the A latches.

Control of data flow from B to A is similar, but using the EBA
and OEBA

CONDITIONS

T

= 25°C; GND = 0V

amb

CC

CC

) input are Low the A-to-B path is transparent. A

inputs.

, LEBA) and Output Enable

) input and the A-to-B Latch

signal puts the A

and OEAB both Low, the

TYPICAL UNIT

2.9

3.6
4 pF

7 pF

, LEBA,

ns

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

24-Pin Plastic DIP –40°C to +85°C 74ABT543A N 74ABT543A N SOT222-1
24-Pin plastic SO –40°C to +85°C 74ABT543A D 74ABT543A D SOT137-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT543A DB 74ABT543A DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT543A PW 7ABT543APW DH SOT355-1

PIN CONFIGURATION

1

LEBA

2

OEBA

3

A0

4

A1

5

A2

6

A3

7

A4

8

A5

9

A6

10 15

A7

11

EAB
GND

12 13

24

V

CC

23

EBA

22

B0

21

B1

20

B2

19

B3

18

B4

17

B5

16

B6
B7

14

LEAB
OEAB

SA00168

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

14, 1 LEAB / LEBA

11, 23 EAB / EBA

13, 2 OEAB / OEBA

3, 4, 5, 6,

7, 8, 9, 10

22, 21, 20, 19,

18, 17, 16, 15

A0 – A7 Port A, 3-State outputs

B0 – B7 Port B, 3-State outputs

12 GND Ground (0V)
24 V

CC

A to B / B to A Latch Enable
input (active-Low)

A to B / B to A Enable input
(active-Low)

A to B / B to A Output Enable
input (active-Low)

Positive supply voltage

1998 Sep 24 853-1794 20080

2

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

LOGIC SYMBOL

3456

A0 A1 A2 A3

11

EAB

23

EBA

14 LEAB

1 LEBA

B0 B1 B2

2122

78910

A4 A5 A6 A7

B4 B5 B6

B3

1718

1920

13OEAB
2OEBA

B7

1516

SA00169

LOGIC SYMBOL (IEEE/IEC)

2

23

1
13
22
24

3

421

520

619

718

817

916

10 15

1EN3
G1
1C5
2EN4
G2
2C6

∇ 3

6D

(BA)

(AB)

74ABT543A

22

5D

2 ∇

SA00170

LOGIC DIAGRAM

OEBA

EBA

LEBA

DETAIL A

D

Q

LE

3

A0

4

A1

5

A2

6

A3

7

A4

8

A5

9

A6

10

A7

2

23

1

DETAIL A X 7

D

Q

LE

22

B0

21

B1

20

B2

19

B3

18

B4

17

B5

16

B6

15

B7

13

OEAB

11

EAB

14

LEAB

SA00171

1998 Sep 24

3

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

FUNCTION TABLE

INPUTS OUTPUTS STATUS

OEXX EXX LEXX An or Bn Bn or An

H X X X Z Disabled
X H X X Z Disabled

L
L

L
L

L
L

L L H X NC Hold

H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High transition of LEXX
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High transition of LEXX
X = Don’t care
↑ = Low-to-High transition of LEXX
NC= No change
Z = High impedance or “off” state

↑
↑

L
L

L
L

L
L

↑
↑

L
L

h

l

h

l

H

L

Z
Z

H
L

H
L

Disabled + Latch

Latch + Display

Transparent

or EXX (XX = AB or BA)

74ABT543A

or EXX (XX = AB or BA)

or EXX (XX = AB or BA)

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

I

OUT

T

stg

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range –65 to 150 °C

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–1.2 to +7.0 V

output in Off or High state –0.5 to +5.5 V

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create ju nction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT

Min Max

V

CC

V
V
V
I

OH

I

OL

∆t/∆v Input transition rise or fall rate 0 10 ns/V

T

amb

DC supply voltage 4.5 5.5 V
Input voltage 0 V

I

High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature range –40 +85 °C

CC

V

1998 Sep 24

4

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

DC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL PARAMETER TEST CONDITIONS T

Min Typ Max Min Max

V

V

V

V

RST

Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V

IK

VCC = 4.5V; IOH = –3mA; VI = VIL or V

High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V

OH

VCC = 4.5V; IOH = –32mA; VI = VIL or V

Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V

OL

Power-up output low

3

voltage

I

Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA

I

VCC = 5.5V; IO = 1mA; VI = GND or V

IH

IH

IH

IH

CC

current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA

I

OFF

I

PU/PD

IIH + I

IIL + I

I

CEX

I

CCH

I

CCL

I

CCZ

∆I

I

Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA
Power-up/down 3-State

output current
3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V

OZH

3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V

OZL

4

Output high leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V

O

Output current

1

Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V

VCC = 2.1V; VO = 0.5V; VI = GND or VCC;
VOE = Don’t care

IH

IH

CC

VCC = 5.5V; VO = 2.5V –40 –65 –180 –40 –180 mA
VCC = 5.5V; Outputs High, VI = GND or V

CC

CC

VCC = 5.5V; Outputs 3-State;
V

= GND or V

Additional supply current per

CC

input pin

2

I

VCC = 5.5V; one input at 3.4V,
other inputs at VCC or GND; VCC = 5.5V

CC

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4V.

3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.

4. This parameter is valid for any V
transition time of up to 100µsec is permitted.

between 0V and 2.1V , with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10%, a

CC

= +25°C

amb

2.5 3.2 2.5 V

3.0 3.7 3.0 V

2.0 2.3 2.0 V

0.3 0.55 0.55 V

0.13 .55 .55 V

±5.0 ±50 ±50 µA

5.0 50 50 µA

–5.0 –50 –50 µA

5.0 50 50 µA

110 250 250 µA

20 30 30 mA

110 250 250 µA

0.3 1.5 1.5 mA

74ABT543A

T

= –40°C

amb

to +85°C

UNIT

1998 Sep 24

5

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

AC CHARACTERISTICS

GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω

SYMBOL PARAMETER WAVEFORM

t

PLH

t

PHL

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

t

PZH

t

PZL

t

PHZ

t

PLZ

Propagation delay
An to Bn, Bn to An

Propagation delay
LEBA to An, LEAB to Bn

Output enable time
OEBA to An, OEAB to Bn

Output disable time
OEBA to An, OEAB to Bn

Output enable time
EBA to An, EAB to Bn

Output disable time
EBA to An, EAB to Bn

2
1

2
4

5
4

5
4

5
4

5

74ABT543A

LIMITS

T

= -40 to

T

= +25oC

amb

VCC = +5.0V

Min Typ Max Min Max

1.0

1.9

1.0

2.1

1.0

2.0

2.0

1.0

1.0

2.0

2.0

1.0

2.9

3.6

3.4

4.3

3.2

4.3

4.0

3.0

3.4

4.4

3.6

3.0

4.5

5.2

5.1

6.0

5.1

5.9

5.7

4.6

5.1

6.1

5.4

4.6

amb

+85oC

VCC = +5.0V ±0.5V

1.0

1.9

1.0

2.1

1.0

2.0

2.0

1.0

1.0

2.0

2.0

1.0

5.2

5.7

6.2

6.7

6.2

6.6

6.2

5.0

6.2

6.8

5.9

5.0

UNIT

ns

ns

ns

ns

ns

ns

AC SETUP REQUIREMENTS

GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω

LIMITS

SYMBOL PARAMETER WAVEFORM

= +25oC

amb

VCC = +5.0V

T

= -40 to +85oC

amb

VCC = +5.0V ±0.5V

T

Min Typ Min

ts(H)
ts(L)

th(H)
th(L)

ts(H)
ts(L)

th(H)
th(L)

Setup time
An to LEAB, Bn to LEBA

Hold time
An to LEAB, Bn to LEBA

Setup time
An to EAB, Bn to EBA

Hold time
An to EAB, Bn to EBA

3

3

3

3

2.5

3.0

0.5

0.5

3.5

3.0

0.5

0.5

1.0

1.4

–0.8
–0.6

1.3

1.4

–0.8
–0.6

2.5

3.0

0.5

0.5

3.5

3.0

0.5

0.5

tw(L) Latch enable pulse width, Low 3 3.5 1.0 3.5 ns

AC WAVEFORMS

VM = 1.5V, VIN = GND to 3.0V

V

IN

V

OUT

V

M

t

PHL

V

M

t

PLH

V

M

V

M

V

IN

V

OUT

V

M

t

PLH

V

M

t

PHL

V

M

V

M

UNIT

ns

ns

ns

ns

Waveform 1. Propagation Delay For Inverting Output

1998 Sep 24

SA00172

SA00173

Waveform 2. Propagation Delay For Non-Inverting Output

6

Philips Semiconductors Product specification

ЙЙЙЙЙЙЙ

Octal latched transceiver with dual enable
(3-State)

An, Bn

LEAB,

LEBA

NOTE: For all waveforms, VM = 1.5V, the shaded areas indicate when the input

is permitted to change for predictable output performance.

Waveform 3. Data Setup and Hold Times And Latch Enable

OEAB, OEBA,

EAB, EBA

Waveform 4. 3-State Output Enable Time to High Level and

V

V

M

M

ts(H)

t

(H)

h

V

M

(L)

t

s

tw(L)

Pulse Width

An, Bn

V

M

t

PZH

V

M

V

M

Output Disable Time from High Level

t

V

PHZ

V

M

M

t

(L)

h

V

M

SA00174

V

OH

V

–0.3V

OH

0V

SA00175

74ABT543A

OEAB, OEBA,

EAB, EBA

An, Bn

Waveform 5. 3-State Output Enable Time to Low Level and

Output Disable Time from Low Level

V

M

t

PZL

V

M

t

PLZ

V

M

+0.3V

V

OL

0V

SA00176

TEST CIRCUIT AND WAVEFORM

From Output
Under Test

C

= 50 pF

L

DEFINITIONS

= Load capacitance includes jig and probe capacitance;

C

L

see AC CHARACTERISTICS for value.

500 Ω

500 Ω

Load Circuit

TEST S1

t

pd

t

PLZ/tPZL

t

PHZ/tPZH

open

7 V

open

7 V

S1

Open

GND

SA00012

1998 Sep 24

7

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1

74ABT543A

1998 Sep 24

8

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

74ABT543A

1998 Sep 24

9

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1

74ABT543A

1998 Sep 24

10

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1

74ABT543A

1998 Sep 24

11

Philips Semiconductors Product specification

Octal latched transceiver with dual enable
(3-State)

Data sheet status

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

[1]

74ABT543A

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

print code Date of release: 05-96
Document order number: 9397-750-04611

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

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