Page 1
74ABT534A
Octal D-type flip-flop, inverting
(3-State)
Product specification 1997 Feb 03
INTEGRATED CIRCUITS
IC23 Data Handbook
Page 2
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
2
1997 Feb 03 853-1910 17722
FEA TURES
•8-bit positive edge triggered register
•3-State output buffers
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17
•ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
•Power-up 3-State
DESCRIPTION
The 74ABT534A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT534A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE
) control
gates.
The register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE
) controls all eight 3-State buffers
independent of the clock operation.
When OE
is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “OFF” state, which
means they will neither drive nor load the bus.
QUICK REFERENCE DA TA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay
CP to Q
n
CL = 50pF; VCC = 5V
3.3
3.6
ns
C
IN
Input capacitance VI = 0V or V
CC
3.5 pF
C
OUT
Output capacitance Outputs disabled; VO = 0V or V
CC
6.5 pF
I
CCZ
Total supply current Outputs disabled; VCC =5.5V 100 µA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
20-Pin Plastic DIP –40°C to +85°C 74ABT534A N 74ABT534A N SOT146-1
20-Pin plastic SO –40°C to +85°C 74ABT534A D 74ABT534A D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT534A DB 74ABT534A DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT534A PW 74ABT534APW DH SOT360-1
PIN CONFIGURATION
20
19
18
17
16
15
14
13
12
10 11
9
8
7
6
5
4
3
2
1
V
CC
Q7
D7
D6
Q
6
Q5
D5
D4
Q
4
CP
Q
0
D0
D1
Q
1
Q2
D2
D3
Q
3
GND
OE
SA00161
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
1 OE Output enable input (active-Low)
3, 4, 7, 8,
13, 14, 17, 18
D0-D7 Data inputs
2, 5, 6, 9,
12, 15, 16, 19
Q0-Q7 Inverting 3-State outputs
11 CP
Clock pulse input
(active rising edge)
10 GND Ground (0V)
20 V
CC
Positive supply voltage
Page 3
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
3
LOGIC SYMBOL
52
Q0 Q1 Q296Q3
3478
D0 D1 D2 D3
11
1
1512
Q4 Q5 Q6
1916
Q7
13 14 17 18
D4 D5 D6 D7
CP
OE
SA00162
LOGIC SYMBOL (IEEE/IEC)
1
3
2
4
5
7
6
8
9
EN
11
C1
13
12
14
15
17
16
18
19
1D
SA00163
FUNCTION T ABLE
INPUTS INTERNAL OUTPUTS
OPERATING
MODE
OE CP Dn REGISTER Q0 – Q7
LL↑
↑lh
L
H
H
L
Latch and read
register
L ↑ X NC NC Hold
HH↑↑X
Dn
NC
Dn
Z
Z
Disable
outputs
H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High
clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High
clock transition
NC= No change
X = Don’t care
Z = High impedance “off” state
↑ = Low-to-High clock transition
↑
= not a Low-to-High clock transition
LOGIC DIAGRAM
2
CP Q
D
3
D0
Q0
CP Q
D
4
D1
CP Q
D
7
D2
CP Q
D
8
D3
CP Q
D
13
D4
CP Q
D
14
D5
CP Q
D
17
D6
CP Q
D
18
D7
Q1
5
Q2
6
Q3
9
Q4
12
Q5
15
Q6
16
Q7
19
11
CP
1
OE
SA00164
Page 4
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
4
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
I
IK
DC input diode current VI < 0 –18 mA
V
I
DC input voltage
3
–1.2 to +7.0 V
I
OK
DC output diode current VO < 0 –50 mA
V
OUT
DC output voltage
3
output in Off or High state –0.5 to +5.5 V
I
OUT
DC output current output in Low state 128 mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
Min Max
UNIT
V
CC
DC supply voltage 4.5 5.5 V
V
I
Input voltage 0 V
CC
V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level Input voltage 0.8 V
I
OH
High-level output current –32 mA
I
OL
Low-level output current 64 mA
∆t/∆v Input transition rise or fall rate 0 5 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
Page 5
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS T
amb
= +25°C
T
amb
= –40°C
to +85°C
UNIT
Min Typ Max Min Max
V
IK
Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or V
IH
2.5 2.9 2.5 V
V
OH
High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V
IH
3.0 3.4 3.0 V
VCC = 4.5V; IOH = –32mA; VI = VIL or V
IH
2.0 2.4 2.0 V
V
OL
Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V
IH
0.42 0.55 0.55 V
I
I
Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA
I
OFF
Power-off leakage current VCC = 0.0V; VI or VO ≤ 4.5V ±5.0 ±100 ±100 µA
IPU/I
PD
Power-up/down 3-State
output current
3
VCC = 2.0V; VO = 0.5V; VI = GND or VCC;
V
OE
= V
CC
±5.0 ±50 ±50 µA
I
OZH
3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V
IH
0.1 10 10 µA
I
OZL
3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V
IH
–0.1 –10 –10 µA
I
CEX
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V
CC
0.1 50 50 µA
I
O
Output current
1
VCC = 5.5V; VO = 2.5V –50 –100 –180 –50 –180 mA
I
CCH
VCC = 5.5V; Outputs High, VI = GND or V
CC
100 250 250 µA
I
CCL
Quiescent supply current VCC = 5.5V; Outputs Low , VI = GND or V
CC
24 30 30 mA
I
CCZ
VCC = 5.5V; Outputs 3-State;
V
I
= GND or V
CC
100 250 250 µA
∆I
CC
Additional supply current per
input pin
2
VCC = 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
0.5 1.5 1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3 This parameter is valid for any V
CC
between 0V and 2.1V with a transition time of up to 10msec. For VCC = 2.1V to VCC = 5V 10%, a
transition time of up to 100µsec is permitted.
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25oC
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V ±0.5V
UNIT
Min Typ Max Min Max
f
MAX
Maximum clock frequency 1 125 350 125 ns
t
PLH
t
PHL
Propagation delay
CP to Q
n
1
2.0
1
2.4
1
3.3
3.6
4.2
1
4.7
1
2.0
2.4
5.0
1
5.1
1
ns
t
PZH
t
PZL
Output enable time
to High and Low level
3
4
1.0
2.6
3.1
3.9
4.2
4.9
1
1.0
2.6
5.0
5.5
1
ns
t
PHZ
t
PLZ
Output disable time
from High and Low level
3
4
1.8
1
1.6
1
3.3
2.8
4.3
1
3.6
1
1.8
1
1.6
1
4.6
1
4.1
1
ns
NOTE:
1. This datasheet limit may vary among suppliers.
Page 6
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
6
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER W AVEFORM
T
amb
= +25oC
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V ±0.5V
UNIT
Min Typ Min
ts(H)
t
s
(L)
Setup time, High or Low
Dn to CP
2
1.0
1
1.0
1
0.4
0.3
1.0
1
1.0
1
ns
th(H)
t
h
(L)
Hold time, High or Low
Dn to CP
2
0.5
0.5
–0.3
–0.4
0.5
0.5
ns
tw(H)
t
w
(L)
CP pulse width
High or Low
1
1.5
1
2.0
1
0.8
1.0
1.5
1
2.0
1
ns
NOTE:
1. This datasheet limit may vary among suppliers.
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
tw(H)
V
M
V
M
V
M
V
M
V
M
1/f
MAX
t
PLH
t
PHL
CP
Q
n
tw(L)
SA00165
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
ÉÉÉ
ÉÉÉ
V
M
Dn
V
M
V
M
V
M
V
MVM
CP
ts(H) th(H) ts(L) th(L)
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SA00107
Waveform 2. Data Setup and Hold Times
OE
V
M
t
PZH
t
PHZ
0V
V
OH
–0.3V
Qn
V
M
V
M
SA00166
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
OE
t
PZL
t
PLZ
VOL +0.3V
Qn
V
M
V
M
V
M
SA00167
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
Page 7
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
7
TEST CIRCUIT AND WAVEFORM
PULSE
GENERATOR
R
T
V
IN
V
OUT
C
L
R
L
V
CC
R
L
7.0V
Test Circuit for 3-State Outputs
V
M
V
M
t
W
AMP (V)
NEGATIVE
PULSE
10% 10%
90%
90%
0V
V
M
V
M
t
W
AMP (V)
POSITIVE
PULSE
90% 90%
10%
10%
0V
t
THL
(tF)
t
TLH
(tR)t
THL
(tF)
t
TLH
(tR)
VM = 1.5V
Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate t
W
t
R
t
F
74ABT 3.0V 1MHz 500ns 2.5ns 2.5ns
SWITCH POSITION
TEST SWITCH
t
PLZ
closed
t
PZL
closed
All other open
SA00012
D.U.T.
Page 8
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
8
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
Page 9
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
9
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
Page 10
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
10
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
Page 11
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
11
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
Page 12
Philips Semiconductors Product specification
74ABT534AOctal D-type flip-flop, inverting (3-State)
1997 Feb 03
12
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
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