Datasheet 74ABT377APW, 74ABT377AN, 74ABT377ADB, 74ABT377AD, 74ABT377PW Datasheet (Philips)

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Page 1
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74ABT377A
Octal D-type flip-flop with enable
Product specification Replaces data sheet 74ABT377 of 1995 Sep 06 IC23 Data Handbook
1997 Feb 26
Page 2
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
2
1997 Feb 26 853-1457 17800
FEA TURES
•Ideal for addressable register applications
•8-bit positive edge-triggered register
•Enable for address and data synchronization applications
•Output capability: +64mA/-32mA
•Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
•Power-up reset
DESCRIPTION
The 74ABT377A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E
) input is
Low. The register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output.
The E
input must be stable one setup time prior to the Low-to-High
clock transition for predictable operation.
QUICK REFERENCE DA TA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay CP to Qn
CL = 50pF; VCC = 5V
3.1
3.6
ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
I
CCH
Total current supply Outputs High; VCC = 5.5V 500 nA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
20-Pin Plastic DIP –40°C to +85°C 74ABT377A N 74ABT377A N SOT146-1 20-Pin plastic SO –40°C to +85°C 74ABT377A D 74ABT377A D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT377A DB 74ABT377A DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT377A PW 74ABT377PWA DH SOT360-1
PIN CONFIGURATION
20 19 18 17 16 15 14 13 12
10 11
9
8
7
6
5
4
3
2
1
V
CC
Q7 D7 D6 Q6 Q5 D5 D4 Q4
CP
Q0
D0
D1 Q1 Q2
D2
D3 Q3
GND
E
SA00155
LOGIC SYMBOL
52
Q0 Q1 Q296Q3
3478
D0 D1 D2 D3
11
1
1512
Q4 Q5 Q6
1916
Q7
13 14 17 18
D4 D5 D6 D7
CP
OE
SA00152
Page 3
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
1997 Feb 26
3
LOGIC SYMBOL (IEEE/IEC)
1
3
2
4
5
7
6
8
9
G1
11
IC2
13
12
14
15
17
16
18
19
2D
SA00157
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
1 E Enable input (active–Low)
3, 4, 7, 8, 13, 14,
17, 18
D0-D7 Data inputs
2, 5, 6, 9, 12, 15,
16, 19
Q0-Q7 Data outputs
11 CP Clock Pulse input (active
rising edge) 10 GND Ground (0V) 20 V
CC
Positive supply voltage
LOGIC DIAGRAM
DQ
CP
D
CP
D
CP
DQ
CP
QQ
3478
11
Q0 Q1 Q2 Q3
CP
D0 D1 D2 D3
DQ
CP
D
CP
D
CP
DQ
CP
QQ
13 14 17 18
D4 D5 D6 D7
1
2 5 6 9 12 15 16 19
Q4 Q5 Q6 Q7
E
SA00158
Page 4
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
1997 Feb 26
4
FUNCTION TABLE
INPUTS OUTPUTS OPERATING MODE
E CP Dn Qn
l ↑ h H Load “1” l ↑ l L Load “0”
h H
↑
X
X X
no change no change
Hold (do nothing)
H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition X = Don’t care ↑ = Low-to-High clock transition
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
I
IK
DC input diode current VI < 0 –18 mA
V
I
DC input voltage
3
–1.2 to +7.0 V
I
OK
DC output diode current VO < 0 –50 mA
V
OUT
DC output voltage
3
output in Off or High state –0.5 to +5.5 V
I
OUT
DC output current output in Low state 128 mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
MIN MAX
V
CC
DC supply voltage 4.5 5.5 V
V
I
Input voltage 0 V
CC
V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level input voltage 0.8 V
I
OH
High-level output current –32 mA
I
OL
Low-level output current 64 mA
∆t/∆v Input transition rise or fall rate 0 5 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
Page 5
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
1997 Feb 26
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS T
amb
= +25°C
T
amb
= –40°C
to +85°C
UNIT
MIN TYP MAX MIN MAX
V
IK
Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or V
IH
2.5 2.9 2.5 V
V
OH
High–level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V
IH
3.0 3.4 3.0 V
VCC = 4.5V; IOH = –32mA; VI = VIL or V
IH
2.0 2.4 2.0 V
V
OL
Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V
IH
0.42 0.55 0.55 V
V
RST
Power-up output low voltage
3
VCC = 5.5V; IO = 1mA; VI = GND or V
CC
0.13 0.55 0.55 V
I
I
Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA
I
OFF
Power-off leakage current VCC = 0.0V; V
O
or VI ≤ 4.5V ±5.0 ±100 ±100 µA
I
CEX
Output High leakage current VCC = 5.5V; V
O
= 5.5V; VI = GND or V
CC
5.0 50 50 µA
I
O
Output current
1
VCC = 5.5V; VO = 2.5V –50 –100 –180 –50 –180 mA
I
CCH
Quiescent supply current VCC = 5.5V; Outputs High, VI = GND or V
CC
0.5 250 250 µA
I
CCL
VCC = 5.5V; Outputs Low , VI = GND or V
CC
24 30 30 mA
∆I
CC
Additional supply current per input pin
2
VCC = 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
0.5 1.5 1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
1
SYMBOL PARAMETER WAVEFORM
T
amb
= +25oC
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V +0.5V
UNIT
MIN TYP MAX MIN MAX
f
MAX
Maximum clock frequency 1 150 250 150 MHz
t
PLH
t
PHL
Propagation delay CP to Qn
1
1.8
2.2
3.1
3.6
4.0
4.7
1.8
2.2
4.8
4.9
ns
NOTE:
1. Limits may vary among suppliers.
Page 6
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
1997 Feb 26
6
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25oC
V
CC
= +5.0V
T
amb
= -40 to +85oC
V
CC
= +5.0V +0.5V
UNIT
MIN TYP MIN
ts(H) t
s
(L)
Setup time, High or Low Dn to CP
2
1.5
1.5
0.7
0.5
1.5
1.5
ns
th(H) t
h
(L)
Hold time, High or Low Dn to CP
2
1.0
1.0
–0.4 –0.6
1.0
1.0
ns
ts(H) t
s
(L)
Setup time, High or Low E
to CP
2
2.0
2.0
1.1
1.0
2.0
2.0
ns
th(H) t
h
(L)
Hold time, High or Low E
to CP
2
1.0
1.0
–0.9 –0.1
1.0
1.0
ns
tw(H) t
w
(L)
Clock Pulse width High or Low
1
1.5
2.0
0.7
1.0
1.5
2.0
ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
V
M
t
PLH
t
PHL
V
M
V
M
V
M
CP
Q
n
1/f
MAX
tW(H) tW(L)
SA00159
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width and Maximum Clock Frequency
CP
V
MVM
V
M
V
M
V
M
ts(L)
E
th(L)
th(H)
ts(H)
D
n
V
M
t
s
t
h
V
M
V
M
SA00160
NOTE: The shaded areas indicate when the input is permitted to change for predict­able output performance.
Waveform 2. Data and Enable Setup and Hold Times
Page 7
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
1997 Feb 26
7
TEST CIRCUIT AND WAVEFORM
PULSE
GENERATOR
R
T
V
IN
D.U.T.
V
OUT
C
L
R
L
V
CC
R
L
7.0V
Test Circuit for 3-State Outputs
V
M
V
M
t
W
AMP (V)
NEGATIVE PULSE
10% 10%
90%
90%
0V
V
M
V
M
t
W
AMP (V)
POSITIVE PULSE
90% 90%
10%
10%
0V
t
THL
(tF)
t
TLH
(tR)t
THL
(tF)
t
TLH
(tR)
VM = 1.5V
Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
74ABT
SA00057
SWITCH POSITION
TEST SWITCH
All open
Amplitude Rep. Rate t
W
t
F
3.0V 1MHz 500ns 2.5ns
t
R
2.5ns
Page 8
Philips Semiconductors Product specification
74ABT377AOctal D-type flip-flop with enable
1997 Feb 26
8
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
LIFE SUPPORT APPLICA TIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
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Page 9
Philips Semiconductors Product specification
74ABT377Octal D-type flip-flop with enable
1995 Sep 06
9
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
Page 10
Philips Semiconductors Product specification
74ABT377Octal D-type flip-flop with enable
1995 Sep 06
10
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
Page 11
Philips Semiconductors Product specification
74ABT377Octal D-type flip-flop with enable
1995 Sep 06
11
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
Page 12
Philips Semiconductors Product specification
74ABT377Octal D-type flip-flop with enable
1995 Sep 06
12
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
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