Page 1
Philips Semiconductors Product specification
74ABT2953Octal registered transceiver, inverting (3-State)
1
1995 Sep 06 853-1555 15702
FEA TURES
•8-bit registered transceiver
•Independent registers for A and B buses
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
•Live insertion/extraction permitted
•Power-up 3-State
•Power-up reset
DESCRIPTION
The 74ABT2953 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT2953 device is an 8-bit registered inverting transceiver.
Two 8-bit back-to-back registers store data flowing in both directions
between two bidirectional buses. Data applied to the inputs is
entered and stored on the rising edge of the Clock (CPXX) provided
that the Clock Enable (CEXX
) is Low. The data is then present at
the 3-State output buffers, but is only accessible when the Output
Enable (OEXX
) is Low. Data flow from A inputs to B outputs is the
same as for B inputs to A outputs.
QUICK REFERENCE DAT A
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay
CPBA to A
n or CPAB to Bn
CL = 50pF; VCC = 5V 5.0 ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
C
I/O
I/O capacitance
Outputs disabled;
V
O
= 0V or V
CC
7 pF
I
CCZ
Total supply current Outputs disabled; VCC =5.5V 500 nA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
24-Pin Plastic DIP –40°C to +85°C 74ABT9253 N 74ABT2953 N SOT222-1
24-Pin plastic SO –40°C to +85°C 74ABT2953 D 74ABT2953 D SOT137-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT2953 DB 74ABT2953 DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT2953 PW 74ABT2953PW DH SOT355-1
PIN CONFIGURA TION
1
2
3
4
5
6
7
8
9
10 15
16
17
18
19
20
21
22
23
24
B7
B6
B5
B4
B3
B2
B1
B0
OEAB
A0
CPAB
A1
A2
A3
A4
A5
A6
A7
V
CC
OEBA
11 14CEAB
CPBA
12 13GND
CEBA
TOP VIEW
SA00305
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
10, 14
CPAB /
CPBA
Clock input A to B / Clock input
B to A
11, 13
CEAB /
CEBA
Clock enable input A to B / Clock
enable input B to A
16, 17, 18, 19,
20, 21, 22, 23
A0 – A7 Data inputs/outputs (A side)
1, 2, 3, 4, 5, 6,
7, 8
B0 – B7 Data outputs/outputs (B side)
9, 15
OEAB /
OEBA
Output enable inputs
12 GND Ground (0V)
24 V
CC
Positive supply voltage
Page 2
Philips Semiconductors Product specification
74ABT2953Octal registered transceiver, inverting (3-State)
1995 Sep 06
2
LOGIC SYMBOL
16 17 18 19 20 21 22 23
A0 A1 A2 A3 A4 A5 A6 A7
B0 B1 B2 B3 B4 B5 B6 B7
87654321
15
9
10
14
11
13
CPAB
CPBA
CEAB
CEBA
OEBA
OEAB
SA00306
LOGIC SYMBOL (IEEE/IEC)
C6
1, 4, 5
14
16 8
17 7
18 6
19 5
20 4
21 3
22 2
23 1
2, 3, 6
C5
10
EN4
9
EN3
15
EN2
13
EN1
11
SA00307
FUNCTION TABLE for Register An or Bn
INPUTS INTERNAL OPERATING
An or
Bn
CPXX CEXX Q MODE
X X H NC Hold data
L
H
↑
↑
L
L
L
H
Load data
H = High voltage level
L =Low voltage level
↑ =Low-to-High transition
X = Don’t care
XX=AB or BA
NC=No change
FUNCTION TABLE for Output Enable
INPUTS INTERNAL An or Bn OPERATING
OEXX Q OUTPUTS MODE
H X Z Disable outputs
L
L
L
H
H
L
Enable outputs
H = High voltage level
L =Low voltage level
X = Don’t care
XX=AB or BA
Z =High impedance ”off” state
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
I
IK
DC input diode current VI < 0 –18 mA
V
I
DC input voltage
3
–1.2 to +7.0 V
I
OK
DC output diode current VO < 0 –50 mA
V
OUT
DC output voltage
3
output in Off or High state –0.5 to +5.5 V
I
OUT
DC output current output in Low state 128 mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Page 3
Philips Semiconductors Product specification
74ABT2953Octal registered transceiver, inverting (3-State)
1995 Sep 06
3
LOGIC DIAGRAM
CEAB
CE
Q
CP
D
CE
Q
CP
D
DETAIL A
DETAIL A X 7
CPAB
OEAB
A0
CPBA
OEBA
B0
CEBA
8
7
6
5
4
3
2
1
11
10
9
16
17
18
14
15
19
20
21
22
23
13
A
1
A
2
A
3
A
4
A
5
A
6
A
7
B
1
B
2
B
3
B
4
B
5
B
6
B
7
SA00308
Page 4
Philips Semiconductors Product specification
74ABT2953Octal registered transceiver, inverting (3-State)
1995 Sep 06
4
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
Min Max
V
CC
DC supply voltage 4.5 5.5 V
V
I
Input voltage 0 V
CC
V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level Input voltage 0.8 V
I
OH
High-level output current –32 mA
I
OL
Low-level output current 64 mA
∆t/∆v Input transition rise or fall rate 0 10 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL P ARAMETER TEST CONDITIONS T
amb
= +25°C
T
amb
= –40°C
to +85°C
UNIT
Min Typ Max Min Max
V
IK
Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or V
IH
2.5 3.2 2.5 V
V
OH
High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V
IH
3.0 3.7 3.0 V
VCC = 4.5V; IOH = –32mA; VI = VIL or V
IH
2.0 2.3 2.0 V
V
OL
Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V
IH
0.42 0.55 0.55 V
V
RST
Power-up output low
voltage
3
VCC = 5.5V; IO = 1mA; VI = GND or V
CC
0.13 0.55 0.55 V
I
I
Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA
current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA
I
OFF
Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA
IPU/
IPD
Power-up/down 3-State
output current
4
VCC = 2.1V; VO = 0.5V; VI = GND or VCC;
V
OE
= Don’t care
±5.0 ±50 ±50 µA
I
OZH
3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V
IH
5.0 50 50 µA
I
OZL
3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V
IH
–5.0 –50 –50 µA
I
CEX
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V
CC
5.0 50 50 µA
I
O
Output current
1
VCC = 5.5V; VO = 2.5V –50 –65 –180 –50 –180 mA
I
CCH
VCC = 5.5V; Outputs High, VI = GND or V
CC
110 250 250 µA
I
CCL
Quiescent supply current VCC = 5.5V; Outputs Low , VI = GND or V
CC
20 30 30 mA
I
CCZ
VCC = 5.5V; Outputs 3-State;
V
I
= GND or V
CC
110 250 250 µA
∆I
CC
Additional supply current per
input pin
2
VCC = 5.5V; one input at 3.4V,
other inputs at V
CC
or GND
0.3 1.5 1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V , with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a
transition time of up to 100µsec is permitted.
Page 5
Philips Semiconductors Product specification
74ABT2953Octal registered transceiver, inverting (3-State)
1995 Sep 06
5
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25°C
V
CC
= +5.0V
T
amb
= –40°C to +85°C
V
CC
= +5.0V ±0.5V
UNIT
Min Typ Max Min Max
f
MAX
Maximum clock frequency 1 150 200 150 MHz
t
PLH
t
PHL
Propagation delay
CPBA to An, CPAB to Bn
1
2.0
2.5
5.1
5.7
6.6
7.2
2.0
2.5
7.6
8.2
ns
t
PZH
t
PZL
Output enable time
OEBA to An, OEAB to Bn
3
4
1.0
2.2
4.0
5.3
4.8
6.2
1.0
2.2
5.8
7.5
ns
t
PHZ
t
PLZ
Output disable time
OEBA to An, OEAB to Bn
3
4
2.0
1.5
6.1
5.6
7.6
7.1
2.0
1.5
8.1
7.6
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25°C
V
CC
= +5.0V
T
amb
= –40°C to +85°C
V
CC
= +5.0V ±0.5V
UNIT
Min Typ Min
tS(H)
t
s
(L)
Setup time
An to CPAB or Bn to CPBA
2
4.0
3.0
2.5
1.1
4.0
3.0
ns
th(H)
t
h
(L)
Hold time
An to CPAB or Bn to CPBA
2
0.0
0.0
–1.0
–2.0
0.0
0.0
ns
ts(H)
t
s
(L)
Setup time
CEAB
to CPAB, CEBA to CPBA
2
3.5
2.5
2.0
0.9
3.5
2.5
ns
th(H)
t
h
(L)
Hold time
CEAB
to CPAB, CEBA to CPBA
2
0.0
0.0
–0.5
–1.0
0.0
0.0
ns
tw(H)
t
w
(L)
CPAB or CPBA pulse width,
High or Low
1
3.0
3.5
2.0
1.1
3.0
3.5
ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
V
M
V
M
V
M
V
M
V
M
1/f
MAX
tw(H) tw(L)
t
PHL
t
PLH
CPBA or
CPAB
An or Bn
SA00087
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
OEAB,
OEBA
V
M
t
PZH
t
PHZ
0V
V
OH
–0.3V
An, Bn
V
M
V
M
SA00310
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
V
M
An, Bn
CEAB
,
CEBA
V
M
V
M
V
M
V
M
V
M
CPAB,
CPBA
ts(H)
t
h
(H)
t
s
(L)
t
h
(L)
SA00309
Waveform 2. Data Setup and Hold Times
OEAB,
OEBA
t
PZL
t
PLZ
0V
V
OL
+0.3V
An, Bn
V
M
V
M
V
M
SA00311
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
Page 6
Philips Semiconductors Product specification
74ABT2953Octal registered transceiver, inverting (3-State)
1995 Sep 06
6
TEST CIRCUIT AND WAVEFORMS
PULSE
GENERATOR
R
T
V
IN
V
OUT
C
L
R
L
V
CC
R
L
7.0V
Test Circuit for 3-State Outputs
V
M
V
M
t
W
AMP (V)
NEGATIVE
PULSE
10% 10%
90%
90%
0V
V
M
V
M
t
W
AMP (V)
POSITIVE
PULSE
90% 90%
10%
10%
0V
t
THL
(tF)
t
TLH
(tR)t
THL
(tF)
t
TLH
(tR)
VM = 1.5V
Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate t
W
t
R
t
F
74ABT 3.0V 1MHz 500ns 2.5ns 2.5ns
SWITCH POSITION
TEST SWITCH
t
PLZ
closed
t
PZL
closed
All other open
SA00012
D.U.T.
Loading...