Page 1
INTEGRATED CIRCUITS
74ABT273A
Octal D-type flip-flop
Product specification 1995 Sep 06
IC23 Data Handbook
Page 2
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
FEA TURES
•Eight edge-triggered D-type flip-flops
•Buffered common clock
•Buffered asynchronous Master Reset
•Power-up reset
•See 74ABT377 for clock enable version
•See 74ABT373 for transparent latch version
•See 74ABT374 for 3-State version
•ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
DESCRIPTION
The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR
simultaneously .
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR
applications where the true output only is required and the CP and
MR
are common elements.
) inputs load and reset (clear) all flip-flops
input. The device is useful for
200 V per machine model.
QUICK REFERENCE DATA
SYMBOL PARAMETER
t
PLH
t
PHL
C
I
CCH
IN
Propagation delay
CP to Qn
Input capacitance VI = 0V or V
Total supply current Outputs High; VCC =5.5V 150 µA
CL = 50pF; VCC = 5V
CONDITIONS
= 25°C; GND = 0V
T
amb
CC
TYPICAL UNIT
3.0
3.4
3.5 pF
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
20-Pin Plastic DIP –40°C to +85°C 74ABT273A N 74ABT273A N SOT146-1
20-Pin plastic SO –40°C to +85°C 74ABT273A D 74ABT273A D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT273A DB 74ABT273A DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT273A PW 7ABT273APW DH SOT360-1
ns
PIN CONFIGURATION
1
MR
2
Q0
3
D0
4
D1
5
Q1
6
Q2
7
D2
8
D3
9
Q3 Q4
10 11
GND
1995 Sep 06 853-1774 15704
20
V
CC
19
Q7
18
D7
17
D6
16
Q6
15
Q5
14
D5
13
D4
12
CP
SA00052
PIN DESCRIPTION
PIN
NUMBER
11 CP Clock pulse input (active rising edge)
3, 4, 7, 8, 13,
14, 17, 18
2, 5, 6, 9, 12,
15, 16, 19
1 MR Master Reset input (active-Low)
10 GND Ground (0V)
20 V
2
SYMBOL NAME AND FUNCTION
D0 - D7 Data inputs
Q0 - Q7 Data outputs
Positive supply voltage
CC
Page 3
Philips Semiconductors Product specification
OPERATING MODE
74ABT273AOctal D-type flip-flop
LOGIC SYMBOL (IEEE/IEC)
1
11
32
45
76
89
13 12
14 15
17 16
18 19
R
C1
1D
LOGIC DIAGRAM
CP
D0
11
3
D
CP
R
D
D1
Q
LOGIC SYMBOL
3 4 7 8 13 14 1817
D0 D1 D2 D3 D4 D5 D6 D7
11
CP
1
MR
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2 5 6 9 12 15 16 19
SA00053
SA00054
D2
4
D
Q
CP
R
D
7
D
CP
R
D
D3
8
Q
D
CP
R
D
D4
13
Q
D
CP
R
D
D5
14
Q
D
CP
R
D
D6
17
Q
D
CP
R
D
D7
18
Q
D
Q
CP
R
D
1
MR
Q0
2
5
Q1
6
Q2
FUNCTION TABLE
INPUTS OUTPUTS
MR CP Dn Q0 - Q7
L X X L Reset (clear)
H ↑ h H Load ”1”
H ↑ l L Load ”0”
H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High
clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High
clock transition
X = Don’t care
↑ = Low-to-High clock transition
Q3
9
Q4
12
Q5
15
Q6
16
19
Q7
SA00055
1995 Sep 06
3
Page 4
Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
74ABT273AOctal D-type flip-flop
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
DC supply voltage -0.5 to +7.0 V
DC input diode current VI < 0 -18 mA
DC input voltage
DC output diode current VO < 0 -50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range -65 to 150 °C
PARAMETER CONDITIONS RATING UNIT
3
3
1, 2
-1.2 to +7.0 V
output in Off or High state -0.5 to +5.5 V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
Min Max
V
CC
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 0 10 ns/V
T
amb
DC supply voltage 4.5 5.5 V
Input voltage 0 V
I
High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
High-level output current -32 mA
Low-level output current 64 mA
Operating free-air temperature range -40 +85 °C
CC
V
1995 Sep 06
4
Page 5
Philips Semiconductors Product specification
Quiescent supply current
74ABT273AOctal D-type flip-flop
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= -40°C
SYMBOL PARAMETER TEST CONDITIONS T
amb
= +25°C
Min Typ Max Min Max
V
V
V
I
I
I
I
∆I
V
RST
OFF
CEX
CCH
CCL
Input clamp voltage VCC = 4.5V; IIK = -18mA -0.9 -1.2 -1.2 V
IK
VCC = 4.5V; IOH = -3mA; VI = VIL or V
High-level output voltage VCC = 5.0V; IOH = -3mA; VI = VIL or V
OH
VCC = 4.5V; IOH = -32mA; VI = VIL or V
Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V
OL
Power-up output low
3
voltage
I
Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA
I
VCC = 5.5V; IO = 1mA; VI = GND or V
IH
IH
IH
IH
CC
2.5 2.9 2.5
3.0 3.4 3.0 V
2.0 2.4 2.0
0.42 0.55 0.55 V
0.13 0.55 0.55 V
Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V
I
O
Output current
1
VCC = 5.5V; VO = 2.5V -50 -70 -180 -50 -180 mA
VCC = 5.5V; Outputs High, VI = GND or V
Additional supply current per
CC
input pin
2
pp
VCC = 5.5V; Outputs Low, VI = GND or V
VCC = 5.5V; One data input at 3.4V, other
inputs at V
or GND
CC
CC
CC
CC
5.0 50 50 µA
150 250 250 µA
24 30 30 mA
0.5 1.5 1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V .
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
amb
to +85°C
UNIT
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
SYMBOL PARAMETER WAVEFORM
f
t
t
t
MAX
PLH
PHL
PHL
Maximum clock frequency 1 250 350 250 MHz
Propagation delay
CP to Qn
Propagation delay
to Qn
MR
1
2 2.5 4.5 6.0 2.5 6.6 ns
LIMITS
T
amb
V
CC
= +25°C
= +5.0V
T
= -40°C to +85°C
amb
= +5.0V ±0.5V
V
CC
Min Typ Max Min Max
1.5
2.0
3.0
3.4
4.0
4.6
1.5
2.0
4.8
4.8
UNIT
ns
1995 Sep 06
5
Page 6
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
AC SETUP REQUIREMENTS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
LIMITS
T
= +25°C
SYMBOL PARAMETER WAVEFORM
amb
V
CC
= +5.0V
Min Typ Min
ts(H)
(L)
t
s
th(H)
(L)
t
h
tw(H)
(L)
t
w
Setup time, High or Low
Dn to CP
Hold time, High or Low
Dn to CP
Clock pulse width
High or Low
3
3
1
1.5
1.5
0.7
0.7
1.5
2.0
0.6
0.4
-0.5
-0.5
0.8
1.0
tw(L) Master Reset pulse width, Low 2 1.5 0.8 1.5 ns
t
REC
Recovery time
to CP
MR
2 1.5 0.5 1.5 ns
T
= -40°C to +85°C
amb
= +5.0V ±0.5V
V
CC
1.5
1.5
0.7
0.7
1.5
2.0
UNIT
ns
ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
CP
Qn
VM VM VM
tw(H) tw(L)
t
PHL
VM VM
t
PLH
SA00056
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
MR
CP
Qn
V
M
tw(L)
t
PHL
V
M
V
M
t
REC
V
M
Dn
CP
V
M
Waveform 3. Data Setup and Hold Times
V
M
th(H)ts(H)
V
M
V
V
M
M
th(L)ts(L)
V
M
SF00191
SF00158
Waveform 2. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
1995 Sep 06
6
Page 7
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
TEST CIRCUIT AND WAVEFORMS
V
CC
R
PULSE
GENERATOR
V
IN
R
D.U.T.
T
V
OUT
C
L
L
R
L
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
All open
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
= Load capacitance includes jig and probe capacitance;
C
L
see AC CHARACTERISTICS for value.
= Termination resistance should be equal to Z
R
T
pulse generators.
OUT
of
7.0V
NEGATIVE
PULSE
POSITIVE
PULSE
FAMILY
74ABT
t
90%
10%
V
M
10% 10%
t
THL
t
TLH
90% 90%
V
M
W
(tF)
(tR)t
t
W
VM = 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate t
3.0V 1MHz 500ns 2.5ns
AMP (V)
90%
V
M
0V
t
(tR)
TLH
(tF)
THL
AMP (V)
V
M
10%
0V
t
W
t
R
F
2.5ns
SA00057
1995 Sep 06
7
Page 8
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
1995 Sep 06
8
Page 9
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
1995 Sep 06
9
Page 10
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
1995 Sep 06
10
Page 11
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
1995 Sep 06
11
Page 12
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1995
All rights reserved. Printed in U.S.A.
Loading...