Datasheet 74ABT2241PW, 74ABT2241N, 74ABT2241DB Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
74ABT2241
Octal buffer with 30 series termination resistors; (3-State)
Product specification 1996 Sep 30 IC23 Data Handbook
 
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Octal buffer with 30 series termination resistors (3-State)
FEA TURES
•Octal bus interface
•3-State buffers
•Power-up 3-State
•Output capability: +12mA/–32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
QUICK REFERENCE DATA
SYMBOL PARAMETER
C
t
PLH
t
PHL
C
I
CCZ
IN
OUT
Propagation delay An to Yn
CL = 50pF; VCC = 5V 2.9 ns
Input capacitance VI = 0V or V Output capacitance Outputs disabled; V Total supply current Outputs disabled; VCC = 5.5V 50 µA
DESCRIPTION
The 74ABT2241 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT2241 device is an octal buffer that is ideal for driving bus lines. The device features two Output Enables (1OE controlling four of the 3-State outputs.
The 74ABT2241 is designed with 30W series resistance in both the High and Low states of the output. The design reduces line noise in applications such as memory address drivers, clock drivers, and bus receivers/transceivers.
CONDITIONS = 25°C; GND = 0V
T
amb
CC
= 0V or V
O
CC
74ABT2241
, 2OE), each
TYPICAL UNIT
3 pF 7 pF
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
20-Pin Plastic DIP –40°C to +85°C 74ABT2241 N 74ABT2241 N SOT146-1 20-Pin plastic SO –40°C to +85°C 74ABT2241 D 74ABT2241 D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT2241 DB 74ABT2241 DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT2241 PW 7ABT2241PW DH SOT360-1
PIN CONFIGURATION
1
1OE
2
1A0
3
2Y0
4
1A1
5
2Y1
6
1A2
7
2Y2
8
1A3
9
2Y3 1Y3
10 11
GND
20
V
CC
2OE
19
1Y0
18
2A0
17
1Y1
16
2A1
15
1Y2
14
2A2
13 12
2A3
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 4, 6, 8 1A0 – 1A3 Data inputs
17, 15, 13, 11 2A0 – 2A3 Data inputs
18, 16, 14, 12 1Y0 – 1Y3 Data outputs
3, 5, 7, 9 2Y0 – 2Y3 Data outputs
1, 19 1OE, 2OE Output enables
10 GND Ground (0V) 20 V
CC
Positive supply voltage
SA00038
1996 Sep 30 853–1879 17325
2
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Octal buffer with 30 series termination resistors (3-State)
LOGIC SYMBOL (IEEE/IEC)
1
EN
2 18 4 16
6 14 812
19
EN
17 3 15 5 13 7 11 9
SA00040
LOGIC SYMBOL
74ABT2241
1A0
2
1A1
4
1A2
6
1A3
8
1OE
1
2A0
17
2A1
15
2A2
13
2A3
11
2OE
19
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
18
16
14
12
3
5
7
9
SA00039
SCHEMATIC OF EACH OUTPUT
V
CC
FUNCTION TABLE
INPUTS OUTPUTS
1OE 1An 2OE 2An 1Yn 2Yn
L L H L L L L H H H H H
H X L X Z Z
H =High voltage level
OUTPUT
L =Low voltage level X = Don’t care Z =High impedance ”off” state
GND
SA00409
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
DC supply voltage –0.5 to +7.0 V DC input diode current VI < 0 –18 mA DC input voltage DC output diode current VO < 0 –50 mA DC output voltage DC output current output in Low state 128 mA Storage temperature range –65 to 150 °C
PARAMETER CONDITIONS RATING UNIT
3
3
1, 2
–1.2 to +7.0 V
output in Off or High state –0.5 to +5.5 V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1996 Sep 30
3
Page 4
VOLLow-level out ut voltage
Octal buffer with 30 series termination resistors
74ABT2241
(3-State)
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
Min Max
V
CC
V V V I
OH
I
OL
∆t/∆v Input transition rise or fall rate 0 5 ns/V
T
amb
DC ELECTRICAL CHARACTERISTICS
SYMBOL P ARAMETER TEST CONDITIONS T
V
IK
V
OH
I
I
OFF
IPU/I
I
OZH
I
OZL
I
CEX
I
O
I
CCH
I
CCL
I
CCZ
∆I
CC
NOTES:
DC supply voltage 4.5 5.5 V Input voltage 0 V
I
High-level input voltage 2.0 V
IH
Low-level Input voltage 0.8 V
IL
CC
High-level output current –32 mA Low-level output current 12 mA
Operating free-air temperature range –40 +85 °C
LIMITS
T
amb
= +25°C
amb
to +85°C
Min Typ Max Min Max
Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or V
High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V
VCC = 4.5V; IOH = –32mA; VI = VIL or V
p
VCC = 4.5V; IOL = 5mA; VI = VIL or V VCC = 4.5V; IOL = 12mA; VI = VIL or V
Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA
I
IH
IH
IH
IH
IH
2.5 2.9 2.5 V
3.0 3.4 3.0 V
2.0 2.4 2.0 V
0.32 0.55 0.55 V
0.8 0.8 V
Power-off leakage current VCC = 0.0V; VI or VO ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State
PD
output current
3
3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V Output current
1
Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V
Additional supply current per input pin
2
VCC = 2.0V; VO = 0.5V; VI = GND or VCC;
= VCC; VOE = GND
V
OE
IH
IH
CC
±5.0 ±50 ±50 µA
5.0 50 50 µA
–5.0 –50 –50 µA
5.0 50 50 µA VCC = 5.5V; VO = 2.5V –50 –100 –180 –50 –180 mA VCC = 5.5V; Outputs High, VI = GND or V
CC
CC
VCC = 5.5V; Outputs 3–State;
= GND or V
V
I
CC
Outputs enabled, one input at 3.4V , other inputs at V
or GND; VCC = 5.5V
CC
Outputs 3-State, one data input at 3.4V , other inputs at V
or GND; VCC = 5.5V
CC
Outputs 3-State, one enable input at 3.4V , other inputs at V
or GND; VCC = 5.5V
CC
50 250 250 µA 24 30 30 mA
50 250 250 µA
0.5 1.5 1.5 mA
50 250 250 µA
0.5 1.5 1.5 mA
= –40°C
V
UNIT
1996 Sep 30
4
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Octal buffer with 30 series termination resistors (3-State)
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V transition time of up to 100 µsec is permitted.
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω
SYMBOL PARAMETER WAVEFORM
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay An to Yn
Output enable time to High and Low level
Output disable time from High and Low level
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
between 0V and 2.1V with a transition time of up to 10msec. For VCC = 2.1V to VCC = 5V 10%, a
CC
LIMITS
T
amb
V
CC
= +25°C
= +5.0V
T
= –40°C to +85°C
amb
= +5.0V ±0.5V
V
CC
Min Typ Max Min Max
1
2
2
1.0
1.0
1.1
2.1
1.7
1.7
2.7
3.9
3.3
5.4
3.8
3.4
4.3
5.3
4.8
7.6
5.6
5.8
1.0
1.0
1.1
2.1
1.7
1.7
74ABT2241
UNIT
4.7
5.6
5.8
8.4
6.6
6.4
ns
ns
ns
An INPUT
Yn OUTPUT
V
M
t
PLH
V
M
V
Waveform 1. W aveforms Showing the Input (An)
to Output (Yn) Propagation Delays
M
t
PHL
V
M
SA00028
OE INPUT OE INPUT
Yn OUTPUT
Yn OUTPUT
V
M
t
PZL
V
M
t
PZH
V
M
V
M
t
PLZ
t
PHZ
Waveform 2. Waveforms Showing the 3–State Output
Enable and Disable Times
3.5V
V
OL
V
OL
V
OH
V
OH
+ 0.3V
– 0.3V
0V
SA00041
1996 Sep 30
5
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Octal buffer with 30 series termination resistors (3-State)
TEST CIRCUIT AND WAVEFORMS
V
CC
7.0V NEGATIVE
R
PULSE
GENERATOR
V
IN
R
D.U.T.
T
V
OUT
C
L
L
R
L
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t t
PLZ PZL
closed closed
All other open
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
= Load capacitance includes jig and probe capacitance;
C
L
see AC CHARACTERISTICS for value.
= Termination resistance should be equal to Z
R
T
pulse generators.
OUT
of
PULSE
POSITIVE PULSE
FAMILY
74ABT 3.0V 1MHz 500ns 2.5ns 2.5ns
t
90%
10%
V
M
10% 10%
t
THL
t
TLH
90% 90%
V
M
W
(tF)
(tR)t
t
W
VM = 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate t
74ABT2241
90%
V
M
0V
t
(tR)
TLH
(tF)
THL
V
M
10%
0V
t
W
R
AMP (V)
AMP (V)
t
F
SA00012
1996 Sep 30
6
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Octal buffer with 30 series termination resistors
74ABT2241
(3-State)
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
1996 Sep 30
7
Page 8
Octal buffer with 30 series termination resistors
74ABT2241
(3-State)
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
1996 Sep 30
8
Page 9
Octal buffer with 30 series termination resistors
74ABT2241
(3-State)
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
1996 Sep 30
9
Page 10
Octal buffer with 30 series termination resistors
74ABT2241
(3-State)
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
1996 Sep 30
10
Page 11
Octal buffer with 30 series termination resistors (3-State)
NOTES
74ABT2241
1996 Sep 30
11
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Octal buffer with 30 series termination resistors (3-State)
74ABT2241
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
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Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1996
All rights reserved. Printed in U.S.A.
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