Datasheet 74ABTH162827ADL, 74ABTH162827ADGG, 74ABT162827ADL, 74ABT162827ADGG Datasheet (Philips)

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INTEGRATED CIRCUITS
74ABT162827A 74ABTH162827A
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
Product specification Supersedes data of 1997 Feb 26 IC23 Data Handbook
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1998 Feb 27
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Philips Semiconductors Product specification
Quiescent su ly current
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
FEA TURES
Multiple V
Live insertion/extraction permitted
3-State output buffers
Power-up 3-State
74ABTH162827A incorporates bus-hold data inputs which
eliminate the need for external pull-up resistors to hold unused inputs
Output capability: +64mA/-32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
QUICK REFERENCE DATA
SYMBOL PARAMETER
and GND pins minimize switching noise
CC
C
t
PLH
t
PHL
C
OUT
I
CCZ
I
CCL
IN
Propagation delay nAx to nYx
Input capacitance VI = 0V or V Output capacitance VO = 0V or VCC; 3-State 6 pF
pp
74ABT162827A
74ABTH162827A
DESCRIPTION
The 74ABT162827A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT162827A 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (nOE control flexibility.
The 74ABT162827A is designed with 30 series resistance in both the pull–up and pull–down output structures. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters.
Two options are available, 74ABT162827A which does not have the bus-hold feature and 74ABTH162827A which incorporates the bus-hold feature.
CONDITIONS
T
= 25°C; GND = 0V
amb
CL = 50pF; VCC = 5V
CC
Outputs disabled; VCC = 5.5V 500 µA
Outputs Low; VCC = 5.5V 9 mA
1, nOE2) for maximum
TYPICAL UNIT
1.8
1.9 4 pF
ns
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT162827A DL BT162827A DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT162827A DGG BT162827A DGG SOT364-1 56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH162827A DL BH162827A DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH162827A DGG BH162827A DGG SOT364-1
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
55, 54, 52, 51, 49, 48, 47, 45, 44, 43,
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
2, 3, 5, 6, 8, 9, 10, 12, 13, 14,
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
1, 56,
28, 29
4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V)
7, 22, 35, 50 V
1A0 - 1A9 2A0 - 2A9
1Y0 - 1Y9 2Y0 - 2Y9
1OE0, 1OE1 2OE0, 2OE1
CC
Data inputs
Data outputs
Output enable inputs (active-Low)
Positive supply voltage
1998 Feb 27 853-1928 19025
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Philips Semiconductors Product specification
OPERATING MODE
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
PIN CONFIGURATION
GND
GND
GND
GND
2OE0
LOGIC SYMBOL
55 54 52 51 49 48 47 45 44 43
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
1
1OE0
56
1OE1
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7
1 2
1Y0
3
1Y1
4 5
1Y2
6
1Y3
7
V
CC
8
1Y4
9
1Y5
10
1Y6
11
1Y7
12
1Y8
13
1Y9
14
2Y0
15
2Y1
16
2Y2
17 18
2Y3
19
2Y4
20
2Y5
21
V
22
CC
23
2Y6
24
2Y7
25 26
2Y8
27
2Y9
28 29
561OE0 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30
SH00010
1OE1 1A0 1A1 GND 1A2 1A3 V
CC
1A4 1A5 1A6 GND 1A7 1A8 1A9 2A0 2A1 2A2 GND 2A3 2A4 2A5 V
CC
2A6 2A7 GND 2A8 2A9 2OE1
1A8 1A9
1Y8 1Y9
74ABT162827A
74ABTH162827A
LOGIC SYMBOL (IEEE/IEC)
1 56 28 29
55 54 52 51 49 48 47 45 44
43 42 41 40 38 37 36 34 33 31 30
FUNCTION TABLE
INPUTS OUTPUTS
nOEx nAx nYx
L L L Transparent L H H Transparent
H X Z High impedance
X = Don’t care Z = High impedance “off” state H = High voltage level L = Low voltage level
&
EN1
&
EN2
1
1
2
1
SH00012
2 3 5 6 8
9 10 12 13 14 15 16 17 19 20 21 23 24 26 27
28 29
1998 Feb 27
2 3 5 6 8 9 10 12 13 14
42 41 40 38 37 36 34 33 31 30
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
2OE0 2OE1
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7
15 16 17 19 20 21 23 24 26 27
2A8 2A9
2Y8 2Y9
SH00011
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Philips Semiconductors Product specification
I
DC output current
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
SCHEMATIC OF Y OUTPUTS
V
CC
27
OUTPUT
27
GND
SA00042
74ABT162827A
74ABTH162827A
LOGIC DIAGRAM
nA1
nY1
nOE nOE1
nA0
0
nY0
ABSOLUTE MAXIMUM RA TINGS
SYMBOL
V
CC
I
IK
V
I
OK
V
OUT
OUT
T
stg
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
DC supply voltage –0.5 to +7.0 V DC input diode current VI < 0 –18 mA DC input voltage
I
DC output diode current VO < 0 –50 mA DC output voltage
p
Storage temperature range –65 to 150 °C
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
PARAMETER CONDITIONS RATING UNIT
3
3
1, 2
nA2
nY2
nA3
nY3
nA4
nY4
nA5
nY5
nA6
nY6
nA7
nY7
–1.2 to +7.0 V
Output in Off or High state –0.5 to +5.5 V
Output in Low state 128 mA
Output in High state –64 mA
nA8
nY8
SH00013
nA9
nY9
1998 Feb 27
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Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
VOLLow-level output voltage
I
74ABTH162827A
Data pins
4
5
74ABTH162827A
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
74ABT162827A
74ABTH162827A
RECOMMENDED OPERATING CONDITIONS
LIMITS
MIN MAX
V
CC
V
V
V
I
OH
I
OL
DC supply voltage 4.5 5.5 V Input voltage 0 V
I
High-level input voltage 2.0 V
IH
Low-level Input voltage 0.8 V
IL
High-level output current –32 mA Low-level output current 12 mA
CC
t/v Input transition rise or fall rate 0 10 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= -40°C
SYMBOL PARAMETER
TEST CONDITIONS
T
amb
= +25°C
MIN TYP MAX MIN MAX
V
V
Input clamp voltage VCC = 4.5V; IIK = -18mA –0.9 –1.2 –1.2 V
IK
VCC = 4.5V; IOH = -3mA; VI = VIL or V
High-level output voltage VCC = 5.0V; IOH = -3mA; VI = VIL or V
OH
VCC = 4.5V; IOH = -32mA; VI = VIL or V
p
I
Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA
I
VCC = 4.5V; IOH = 8mA; Vl = V VCC = 4.5V; IOL = 12mA; V
I
= V
IH IH
IH
or V
IL
IN
IL
2.5 3.1 2.5 V
3.0 3.6 3.0 V
2.0 2.7 2.0 V
0.65 0.65 V
0.80 0.80 V
VCC = 5.5V; VI = 5.5V 0.01 1 1 µA
Input leakage current
I
I
VCC = 5.5V; VI = VCC or GND VCC = 5.5V; VI = V
CC
VCC = 5.5V; VI = 0
Control
pins
p
±0.01 ±1 ±1 µA
0.01 1 1 µA –1 –3 –5 µA
VCC = 4.5V; VI = 0.8V 35 35
I
HOLD
Bus Hold current A inputs
VCC = 4.5V; VI = 2.0V –75 –75 VCC = 5.5V; VI = 0 to 5.5V ±800
I
OFF
IPU/I
I
OZH
I
OZL
I
CEX
I
CCH
I
CCL
I
CCZ
I
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
Power-off leakage current VCC = 0.0V; VO = 4.5V; VI = 0V or 5.5V ±5.0 ±100 ±100 µA Power-up/down 3-State
PD
output current
3
3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V Output High leakage
current
I
O
Output current
1
Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V
Additional supply current
CC
per input pin
2
VCC = 2.1V; VO = 0.5V; VI = GND or VCC; VOE = Don’t care
IH IH
VCC = 5.5V; VO = 5.5V; VI = GND or V
CC
±5.0 ±50 ±50 µA
1.0 10 10 µA
–1.0 –10 –10 µA
1.0 50 50 µA
VCC = 5.5V; VO = 2.5V –50 –70 –180 –50 –180 mA VCC = 5.5V; Outputs High, VI = GND or
V
CC
VCC = 5.5V; Outputs 3-State; VI = GND or V
CC
VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND
CC
0.5 1 1 mA 9 19 19 mA
0.5 1 1 mA
0.2 1 1 mA
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V transition time of up to 100µsec is permitted.
4. Unused pins at V
5. This is the bus hold overdrive current required to force the input to the opposite logic state.
or GND.
CC
between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a
CC
amb
to +85°C
V
UNIT
µA
1998 Feb 27
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Philips Semiconductors Product specification
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500
SYMBOL PARAMETER WAVEFORM
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
AC WAVEFORMS
nAx INPUT
nYx OUTPUT
Propagation delay nAx to nYx
Output enable time to High and Low level
Output disable time from High and Low level
V
M
t
PLH
V
M
1
2
2
3.0V or V whichever
V
M
t
PHL
is less
0V
V
OH
V
M
V
OL
74ABT162827A
74ABTH162827A
LIMITS
T
= -40 to
T
= +25oC
amb
VCC = +5.0V
MIN TYP MAX MIN MAX
1.0
1.0
1.5
2.0
2.0
1.5
CC
nOEx INPUT
nYx OUTPUT
nYx OUTPUT
1.8
1.4
3.0
3.6
3.4
2.8
2.6
2.6
4.2
4.9
4.8
4.0
V
M
t
PZL
V
t
PZH
V
amb
+85oC
VCC = +5.0V ±0.5V
1.0
1.0
1.5
2.0
2.0
1.5
M
M
UNIT
2.9
2.9
5.2
6.0
5.4
4.3
V
M
t
PLZ
t
PHZ
ns
ns
ns
3.5V
V
+ 0.3V
OL
V
OL
V
OH
VOH – 0.3V
SA00016
Waveform 1. Input (nAx) to Output (nYx) Propagation Delays
0V
SA00071
Waveform 2. 3-State Output Enable and Disable Times
1998 Feb 27
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Philips Semiconductors Product specification
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
TEST CIRCUIT AND WAVEFORM
V
CC
R
OUT
L
R
L
of
PULSE
GENERATOR
V
IN
R
D.U.T.
T
V
OUT
C
L
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t t
PLZ PZL
closed closed
All other open
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
= Load capacitance includes jig and probe capacitance;
C
L
see AC CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
74ABT162827A
74ABTH162827A
t
90%
7.0V NEGATIVE
PULSE
POSITIVE PULSE
10%
V
M
10% 10%
t
THL
t
TLH
90% 90%
V
M
Input Pulse Definition
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate t
74ABT/H16 3.0V 1MHz 500ns 2.5ns 2.5ns
W
(tF)
(tR)t
t
W
90%
V
M
t
TLH
THL
V
M
10%
VM = 1.5V
t
W
R
AMP (V)
0V
(tR)
(tF)
AMP (V)
0V
t
F
SA00018
1998 Feb 27
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Philips Semiconductors Product specification
20-bit buffer/line driver, non-inverting (3-State)
74ABT16827A
74ABTH16827A
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm SOT371-1
1998 Feb 27
8
Page 9
Philips Semiconductors Product specification
20-bit buffer/line driver, non-inverting (3-State)
74ABT16827A
74ABTH16827A
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm SOT364-1
1998 Feb 27
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Page 10
Philips Semiconductors Product specification
20-bit buffer/line driver, non-inverting (3-State)
NOTES
74ABT16827A
74ABTH16827A
1998 Feb 27
10
Page 11
Philips Semiconductors Product specification
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
Data sheet status
Data sheet status
Objective specification
Preliminary specification
Product specification
Product status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
[1]
74ABT162827A
74ABTH162827A
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 05-96 Document order number: 9397-750-03505
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yyyy mmm dd
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