Datasheet 5962R8755401SFA, 5962R8755401SEA, 5962R8755401S2A, 5962R8755401BFA, 5962R8755401BEA Datasheet (NSC)

54AC138•54ACT138
1-of-8 Decoder/Demultiplexer

General Description

The ’AC/’ACT138 is a high-speed 1-of-8 decoder/
demultiplexer.This device is ideally suited for high-speed bi­polar memory chip select address decoding. The multiple in­put enables allow parallel expansion to a 1-of-24 decoder
using just three ’AC/’ACT138 devices or a 1-of-32 decoder
using four ’AC/’ACT138 devices and one inverter.

Features

n ICCreduced by 50

%

n Demultiplexing capability
n Multiple input enable for easy expansion
n Active LOW mutually exclusive outputs
n Outputs source/sink 24 mA
n ’ACT138 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)

— ’AC138: 5962-87622
— ’ACT138: 5962-87554

Logic Symbols

Pin Names Description

A

0–A2

Address Inputs

E

1–E2

Enable Inputs

E

3

Enable Input

O

0–O7

Outputs

Connection Diagrams

FACT®is a registered trademark of Fairchild Semiconductor Corporation.

DS100268-1

IEEE/IEC

DS100268-7

Pin Assignment

for DIP and Flatpak

DS100268-2

Pin Assignment

for LCC

DS100268-3

August 1998

54AC138

•

54ACT138 1-of-8 Decoder/Demultiplexer

© 1998 National Semiconductor Corporation DS100268 www.national.com

Functional Description

The ’AC/’ACT138 high-speed 1-of-8 decoder/demultiplexer
accepts three binary weighted inputs (A

0,A1,A2

) and, when
enabled, provides eight mutually exclusive active-LOW out­puts (O

0–O7

). The ’AC/’ACT138 features three Enable in­puts, two active-LOW (E1,E2) and one active-HIGH (E3). All
outputs will be HIGH unless E1and E2are LOW and E3is
HIGH. This multiple enable function allows easy parallel ex-

pansion of the device to a 1-of-32 (5 lines to 32 lines) de­coder with just four ’AC/’ACT138 devices and one inverter
(see

Figure 1

). The ’AC/’ACT138 canbe used as an8-output
demultiplexer by using one of the active LOW Enable inputs
as the data input and the other Enable inputsas strobes. The
Enable inputs which are not used must be permanently tied
to their appropriate active-HIGH or active-LOW state.

Truth Table

Inputs Outputs

E

1E2E3A0A1A2O0O1O2O3O4O5O6O7

HXXXXXHHHHHHHH
XHXXXXHHHHHHHH
XXLXXXHHHHHHHH

LLHLLLLHHHHHHH
LLHHLLHLHHHHHH
LLHLHLHHLHHHHH
LLHHHLHHHLHHHH

LLHLLHHHHHLHHH
LLHHLHHHHHHLHH
LLHLHHHHHHHHLH
LLHHHHHHHHHHHL

H=HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial

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Logic Diagram

DS100268-4

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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Logic Diagram (Continued)

DS100268-5

FIGURE 1. Expansion to 1-of-32 Decoding

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (V

CC

) −0.5V to +7.0V

DC Input Diode Current (I

IK

)

V

I

=

−0.5V

V

I

=

V

CC

+ 0.5V

−20 mA
+20 mA

DC Input Voltage (V

I

) −0.5V to VCC+ 0.5V

DC Output Diode Current (I

OK

)

V

O

=

−0.5V

V

O

=

V

CC

+ 0.5V

−20 mA
+20 mA

DC Output Voltage (V

O

) −0.5V to VCC+ 0.5V

DC Output Source

or Sink Current (I

O

)

±

50 mA

DC V

CC

or Ground Current

per Output Pin (I

CC

or I

GND

)

±

50 mA

Storage Temperature (T

STG

) −65˚C to +150˚C

Junction Temperature (T

J

)

CDIP 175˚C

Recommended Operating
Conditions

Supply Voltage (VCC)

’AC 2.0V to 6.0V
’ACT 4.5V to 5.5V

Input Voltage (V

I

) 0VtoV

CC

Output Voltage (VO) 0VtoV

CC

Operating Temperature (TA)

54AC/ACT −55˚C to +125˚C

Minimum Input Edge Rate (∆V/∆t)

’AC Devices
V

IN

from 30%to 70%of V

CC

V

CC

@

3.3V, 4.5V, 5.5V 125 mV/ns

Minimum Input Edge Rate (∆V/∆t)

’ACT Devices
V

IN

from 0.8V to 2.0V

V

CC

@

4.5V, 5.5V 125 mV/ns

Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom­mend operation of FACT

®

circuits outside databook specifications.

DC Characteristics for ’AC Family Devices

54AC

Symbol Parameter V

CC

T

A

=

Units Conditions

(V) −55˚C to +125˚C

Guaranteed Limits

V

IH

Minimum High
Level Input Voltage

3.0 2.1 V

OUT

=

0.1V

4.5 3.15 V or V

CC

− 0.1V

5.5 3.85

V

IL

Maximum Low
Level Input Voltage

3.0 0.9 V

OUT

=

0.1V

4.5 1.35 V or V

CC

− 0.1V

5.5 1.65

V

OH

Minimum High
Level Output
Voltage

3.0 2.9 I

OUT

=

−50 µA

4.5 4.4 V

5.5 5.4
(Note 2) V

IN

=

V

IL

or V

IH

3.0 2.4 −12 mA

4.5 3.7 V I

OH

−24 mA

5.5 4.7 −24 mA

V

OL

Maximum Low
Level Output
Voltage

3.0 0.1 I

OUT

=

50 µA

4.5 0.1 V

5.5 0.1
(Note 2) V

IN

=

V

IL

or V

IH

3.0 0.50 12 mA

4.5 0.50 V I

OL

24 mA

5.5 0.50 24 mA

I

IN

Maximum Input 5.5

±

1.0 µA V

I

=

V

CC

, GND

Leakage Current

I

OLD

(Note 3) Minimum
Dynamic Output
Current

5.5 50 mA V

OLD

=

1.65V Max

I

OHD

5.5 −50 mA V

OHD

=

3.85V Min

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DC Characteristics for ’AC Family Devices (Continued)

54AC

Symbol Parameter V

CC

T

A

=

Units Conditions

(V) −55˚C to +125˚C

Guaranteed Limits

I

CC

Maximum
Quiescent Supply
Current

5.5 80.0 µA

V

IN

=

V

CC

or GND

Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: I

IN

and I

CC

@

3.0V are guaranteed to be less than or equal to the respective limit@5.5V VCC.ICCfor 54AC@25˚C is identical to 74AC@25˚C.

DC Characteristics for ’ACT Family Devices

54ACT

Symbol Parameter V

CC

T

A

=

Units Conditions

(V) −55˚C to +125˚C

Guaranteed Limits

V

IH

Minimum High
Level Input Voltage

4.5 2.0 V V

OUT

=

0.1V

5.5 2.0 or V

CC

− 0.1V

V

IL

Maximum Low
Level Input Voltage

4.5 0.8 V V

OUT

=

0.1V

5.5 0.8 or V

CC

− 0.1V

V

OH

Minimum High
Level Output
Voltage

4.5 4.4 V I

OUT

=

−50 µA

5.5 5.4
(Note 5) V

IN

=

V

IL

or V

IH

4.5 3.70 V IOH−24 mA

5.5 4.70 −24 mA

V

OL

Maximum Low
Level Output
Voltage

4.5 0.1 V I

OUT

=

50 µA

5.5 0.1
(Note 5) V

IN

=

V

IL

or V

IH

4.5 0.50 V IOL24 mA

5.5 0.50 24 mA

I

IN

Maximum Input 5.5

±

1.0 µA V

I

=

V

CC

, GND

Leakage Current

I

CCT

Maximum 5.5 1.6 mA V

I

=

V

CC

− 2.1V

I

CC

/Input

I

OLD

(Note 6) Minimum
Dynamic Output
Current

5.5 50 mA V

OLD

=

1.65V Max

I

OHD

5.5 −50 mA V

OHD

=

3.85V Min

I

CC

Maximum
Quiescent Supply
Current

5.5 80.0 µA

V

IN

=

V

CC

or GND

Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
Note 7: I

CC

for 54ACT@25˚C is identical to 74ACT@25˚C.

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AC Electrical Characteristics

54AC

V

CC

T

A

=

−55˚C Fig.

Symbol Parameter (V) to +125˚C Units No.

(Note 8) C

L

=

50 pF

Min Max

t

PLH

Propagation Delay 3.3 1.0 16.0 ns
A

n

to O

n

5.0 1.5 12.0

t

PHL

Propagation Delay 3.3 1.0 15.0 ns
A

n

to O

n

5.0 1.5 11.5

t

PLH

Propagation Delay 3.3 1.0 16.5 ns
E

1

or E2to O

n

5.0 1.5 13.0

t

PHL

Propagation Delay 3.3 1.0 15.5 ns
E

1

or E2to O

n

5.0 1.5 12.0

t

PLH

Propagation Delay 3.3 1.0 17.0 ns
E

3

to O

n

5.0 1.5 13.5

t

PHL

Propagation Delay 3.3 1.0 15.0 ns
E

3

to O

n

5.0 1.5 11.0

Note 8: Voltage Range 3.3 is 3.3V±0.3V
Voltage Range 5.0 is 5.0V

±

0.5V

AC Electrical Characteristics

54ACT

V

CC

T

A

=

−55˚C Fig.

Symbol Parameter (V) to +125˚C Units No.

(Note 9) C

L

=

50 pF

Min Max

t

PLH

Propagation Delay 5.0 1.5 12.5 ns
A

n

to O

n

t

PHL

Propagation Delay 5.0 1.5 12.5 ns
A

n

to O

n

t

PLH

Propagation Delay 5.0 1.5 13.5 ns
E

1

or E2to O

n

t

PHL

Propagation Delay 5.0 1.5 12.5 ns
E

1

or E2to O

n

t

PLH

Propagation Delay 5.0 1.5 14.0 ns
E

3

toOn

t

PHL

Propagation Delay 5.0 1.5 12.0 ns
E

3

toOn

Note 9: Voltage Range 5.0 is 5.0V±0.5V

Capacitance

Symbol Parameter Typ Units Conditions

C

IN

Input Capacitance 4.5 pF V

CC

=

OPEN

C

PD

Power Dissipation 60.0 pF V

CC

=

5.0V

Capacitance

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8

Physical Dimensions inches (millimeters) unless otherwise noted

20 Terminal Ceramic Leadless Chip Carrier (L)

NS Package Number E20A

16 Lead Ceramic Dual-In-Line Package (D)

NS Package Number J16A

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE­VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI­CONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or sys­tems which, (a) are intended for surgical implant into
the body, or(b) support orsustain life, andwhose fail­ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expectedto result in a significant injury
to the user.

2. A critical component in any component of a life support
device or system whose failure to perform can be rea­sonably expected to cause the failure of the life support
device or system,or to affect its safety or effectiveness.

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Corporation

Americas
Tel: [phone]
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16 Lead Ceramic Flatpak (F)

NS Package Number W16A

54AC138

•

54ACT138 1-of-8 Decoder/Demultiplexer

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.