Datasheet 5962-9690301QDA, 5962-9690301Q2A Datasheet (Texas Instruments)

Download

Page 1

SN55107A, SN75107A, SN75107B, SN75108A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

High Speed

Standard Supply Voltage

Dual Channels

High Common-Mode Rejection Ratio

High Input Impedance

High Input Sensitivity

Differential Common-Mode Input Voltage Range of ±3 V

Strobe Inputs for Receiver Selection

Gate Inputs for Logic Versatility

TTL Drive Capability

High dc Noise Margin

Totem-Pole Outputs

B Version Has Diode-Protected Input for Power-Off Condition

description

These circuits are TTL-compatible, high-speed line receivers. Each is a monolithic dual circuit featuring two independent channels. They are designed for general use, as well as for such specific applications as data comparators and balanced, unbalanced, and party-line transmission systems. These devices are unilaterally interchangeable with and are replacements for the SN55107, SN75107, and SN75108, but offer diode-clamped strobe inputs to simplify circuit design.

SN75107A, SN75107B, SN75108A ...D OR N PACKAGE

SN55107A ... J OR W PACKAGE

(TOP VIEW)

GND

SN55107A . . . FK PACKAGE

NC NC

NC – No internal connection

(TOP VIEW)

1B1ANC

3212019

4 5 6 7 8

910111213

GND

13 12 11 10

9 8

CC +

CC+

CC–

2A 2B NC 2Y 2G

CC –

18 17 16 15 14

2A NC 2B NC NC

The essential difference between the A and B versions can be seen in the schematics. Input-protection diodes are in series with the collectors of the differential-input transistors of the B versions. These diodes are useful in certain party-line systems that have multiple V

power supplies and can be operated with some of the V

CC+

supplies turned off. In such a system, if a supply is turned off and allowed to go to ground, the equivalent input circuit connected to that supply would be as follows:

Input

A Version

Input

B Version

This would be a problem in specific systems that might have the transmission lines biased to some potential greater than 1.4 V.

The SN55107A is characterized for operation over the full military temperature range of –55°C to 125°C. The SN75107A, SN75107B, and SN75108A are characterized for operation from 0°C to 70°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

CC+

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 2

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

FUNCTION TABLE

DIFFERENTIAL INPUTS

A – B

VID ≥ 25 mV X X H

–25 mV < VID < 25 mV

VID ≤ –25 mV

H = high level, L = low level, X = irrelevant

STROBES

G S

X L H

L X H H H Indeterminate X L H

L X H H H L

OUTPUT

logic symbol

†

These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, N, and W packages.

†

SN55107A, SN75107A, and SN75107B

1A 1B 1G 2A 2B 2G

1 2 5 12 11 8

1A 1B

2A 2B

2 5 12 11 8

logic diagram (positive logic)

1A 1B 1G

2G 2A 2B

2 5

8 12 11

SN75108A

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 3

schematic (each receiver)

Inputs

VCC

–

1 kΩ

See

Note 2

1, 12

2, 11

VCC

1 kΩ

3 kΩ 3 kΩ

400 Ω

4.8 kΩ

SN55107A, SN75107A, SN75107B, SN75108A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

See

Note 2

760 Ω

4 kΩ 1.6 kΩ

†

4.25 kΩ

Common to Both Receivers

120 Ω

800 Ω

4, 9

5, 8

Output Y

GND

Strobe G

Strobe S

Pin numbers shown are for D, J, N, and W packages. †

R = 1 kΩ for ’107A and SN75107B, 750 Ω for SN75108A.

NOTES: 1. Resistor values shown are nominal.

2. Components shown with dashed lines in the output circuitry are applicable to the ’107A and SN75107B only. Diodes in series with the collectors of the differential input transistors are short circuited on ’107A and SN75108A.

To Other Receiver

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 4

SN55107A, SN75107A, SN75107B, SN75108A

SN55107A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Supply voltage, V Supply voltage, V

(see Note 3) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC+

–7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC–

†

Differential input voltage, VID (see Note 4) ±6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Common-mode input voltage, VIC (see Note 5) ±5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Strobe input voltage 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

Case temperature for 60 seconds, Tc: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package 300°C. . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or W package 260°C. . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 3. All voltage values, except differential voltages, are with respect to network ground terminal.

4. Differential voltage values are at the noninverting (A) terminal with respect to the inverting (B) terminal.

5. Common-mode input voltage is the average of the voltages at the A and B inputs.

DISSIPATION RATING TABLE

PACKAGE

D 950 mW 7.6 mW/°C 608 mW —

FK 1375 mW 11.0 mW/°C 880 mW 275 mW

J 1375 mW 11.0 mW/°C 880 mW 275 mW

N 1150 mW 9.2 mW/°C 736 mW —

W 1000 mW 8.0 mW/°C 640 mW 200 mW

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 125°C

POWER RATING

recommended operating conditions (see Note 6)

SN75107A, SN75107B,

SN75108A

MIN NOM MAX MIN NOM MAX

Supply voltage, V Supply voltage, V High-level input voltage between differential inputs, V Low-level input voltage between differential inputs, V Common-mode input voltage, VIC (see Notes 7 and 8) –3 Input voltage, any differential input to GND (see Note 8) –5 High-level input voltage at strobe inputs, V Low-level input voltage at strobe inputs, V Low-level output current, I Operating free-air temperature, T

‡

The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for input voltage levels only.

NOTES: 6. When using only one channel of the line receiver, the strobe input (G) of the unused channel should be grounded and at least one

7. The recommended combinations of input voltages fall within the shaded area in Figure 1.

8. The common-mode voltage may be as low as –4 V provided that the more positive of the two inputs is not more negative than

CC+ CC–

(see Note 7) 0.025 5 0.025 5 V

IDH

(see Note 7) –5

IDL

IH(S)

IL(S)

of the differential inputs of the unused receiver should be terminated at some voltage between –3 V and 3 V .

–3 V.

4.5 5 5.5 4.75 5 5.25 V

–4.5 –5 –5.5 –4.75 –5 –5.25 V

‡ ‡ ‡

2 5.5 2 5.5 V 0 0.8 0 0.8 V

–55 125 0 70 °C

–0.025 –5

–16 –16 mA

3 –3 3 –5

‡ ‡ ‡

–0.025 V

UNIT

3 V 3 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 5

SN55107A, SN75107A, SN75107B, SN75108A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

RECOMMENDED COMBINATIONS

OF INPUT VOLTAGES

–1

–2

Input A to GND Voltage – V

–3

–4

–5

–5 –4 –3 –2 –1 0

Input B to GND Voltage – V

NOTE A: Recommended input-voltage combinations are in the shaded area.

Figure 1. Recommended Combinations of Input Voltages

123

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 6

SN55107A, SN75107A, SN75107B, SN75108A

PARAMETER

TEST CONDITIONS

†

UNIT

VOHHigh-level output voltage

400 µA

2.4

VOLLow-level output voltage

0.4

IIHHigh-level input current

MAX

6–1.6

IIHHigh-level input current into S

CC+

MAX

25°C

18301830mA

PARAMETER

UNIT

gy,g ,

gyg

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

electrical characteristics over recommended free-air temperature range (unless otherwise noted)

’107A, SN75107B SN75108A

TYP

‡

MAX MIN

1 1 mA

–1.

2 2 mA

MIN

= MIN,

OS CCH+

CCH–

†

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

‡

All typical values are at V

Not more than one output should be shorted at a time.

Low-level input current

High-level input current into 1G or 2G

Low-level input current into 1G or 2G

Low-level input current into S V High-level output current V Short-circuit output current§V Supply current from V

outputs high Supply current from V

outputs high

CC+

CC–

= 5 V, V

CC± IDH

VIC = –3 V to 3 V V

CC±

= –25 mV,

IDL

VIC = –3 V to 3 V

CC±

B A

CC±

CC± CC±

CC±

CC± CC± CC± CC±

CC±

= –5 V , TA = 25°C.

CC–

= 25 mV,

= MIN,

= MAX, V = MAX, V

= = MAX, V

= MAX, V = MAX, V = MIN, VOH = MAX V = MAX –18 –70 mA

= MAX, TA = 25°C –8.4 –15 –8.4 –15 mA

= 0.8 V,

IL(S)

= –

= 2 V,

IH(S)

= 16 mA,

VID = 5 V 30 75 30 75 VID = –5 V 30 75 30 75 VID = –5 V –10 –10 VID = 5 V –10 –10

IH(G) = MAX V

IH(G)

IH(S)

= 0.4

IL(G)

= 2.4 V 80 80 µA

IH(S)

= MAX V

= 0.4 V –3.2 –3.2 mA

IL(S)

= 2.4 V 40 40 µA

CC+

TYP

‡

MAX

250 µA

switching characteristics, V

PLH(D)

PHL(D)

PLH(S)

PHL(S)

Propagation delay time, low- to high-level output, from differential inputs A and B

Propagation delay time, high- to low-level output, from differential inputs A and B

Propagation delay time, low- to high-level output, from strobe input G or S

Propagation delay time, high- to low-level output, from strobe input G or S

= ±5 V, TA = 25°C, RL = 390 Ω (see Figure 2)

TEST

CONDITIONS

CL = 50 pF 17 25 CL = 15 pF CL = 50 pF 17 25 CL = 15 pF CL = 50 pF 10 15 CL = 15 pF CL = 50 pF 8 15 CL = 15 pF 13 20

’107A, SN75107B SN75108A

MIN TYP MAX MIN TYP MAX

19 25

13 20

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 7

SN55107A, SN75107A, SN75107B, SN75108A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

PARAMETER MEASUREMENT INFORMATION

Pulse

Generator

(see Note A)

Differential

Input

50 Ω

ref

100 mV

Strobe

Input

(see Note B)

CC–

1G S 2G V

50 Ω

Pulse

Generator

(see Note A)

CC+

‘107A, SN75107B

390 Ω 390 Ω

Output

50 pF

(see Note C)

(see Note D)

Output SN75108A,

15 pF

(see Note C)

TEST CIRCUIT

Input A

Strobe Input

G or S

PLH(D)

Output Y

NOTES: A. The pulse generators have the following characteristics: ZO = 50 Ω, tr = 10 ± 5 ns, tf = 10 ± 5 ns, t

= 1 µs, PRR ≤ 500 kHz.

pd2

B. Strobe input pulse is applied to Strobe 1G when inputs 1A-1B are being tested, to Strobe S when inputs 1A-1B or 2A-2B are being

tested, and to Strobe 2G when inputs 2A-2B are being tested.

C. CL includes probe and jig capacitance. D. All diodes are 1N916.

100 mV 100 mV

1.5 V

VOLTAGE WAVEFORMS

PHL(D)

PLH(S)

1.5 V

1.5 V 1.5 V

Figure 2. Test Circuit and Voltage Waveforms

200 mV

1.5 V

= 500 ns, PRR ≤ 1 MHz,

pd1

0 V

3 V

PHL(S)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 8

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

TYPICAL CHARACTERISTICS

OUTPUT VOLTAGE

DIFFERENTIAL INPUT VOLTAGE

Inverting

VO – Output Voltage – V

CC±

RL = 400 Ω TA = 25°C

–30 –20 –10 0 10 20 30

–40

Inputs

= ±5 V

VID – Differential Input Voltage – mV

Figure 3

SN75108A

Noninverting Inputs

’107A,

SN75107B

100

Aµ

IIH – High-Level Input Current –

–75

†

HIGH-LEVEL INPUT CURRENT (1A OR 2A)

FREE-AIR TEMPERATURE

= ±5 V

CC±

–25 0 25 50 75 100

–50

TA – Free-Air Temperature – °C

Figure 4

125

SUPPPLY CURRENT (OUTPUTS HIGH)

FREE-AIR TEMPERATURE

= ±5 V

CC±

– Supply Current – mA

CCH

| I

–75

TA – Free-Air Temperature – °C

CC+

CC–

Figure 5

1007550250–25–50 125

Propagation Delay Time – ns –

–75

CC±

RL = 390 Ω

CL = 50 pF

PLH(D)

PHL(D)

PROPAGATION DELAY TIME

(DIFFERENTIAL INPUTS)

FREE-AIR TEMPERATURE

= ±5 V

125–50 –25 0 25 50 75 100

TA – Free-Air Temperature – °C

Figure 6

†

Values below 0°C and above 70°C apply to SN55107A only.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 9

SN55107A, SN75107A, SN75107B, SN75108A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

TYPICAL CHARACTERISTICS

PROPAGATION DELAY TIME (LOW-TO-HIGH LEVEL)

120

100

PLH(D)

tPLH(D) – Propagation Delay Time – ns

–75

(DIFFERENTIAL INPUTS)

FREE-AIR TEMPERATURE

= ±5 V

CC ±

CL = 15 pF

RL = 3900 Ω

RL = 1950 Ω

RL = 390 Ω

–50 –25 0 25 50 75 100

TA – Free-Air Temperature – °C

Figure 7

125

†

PROPAGATION DELAY TIME (LOW-TO-HIGH LEVEL)

PLH(D)

tPLH(D) – Propagation Delay Time – ns

–75

(DIFFERENTIAL INPUTS)

FREE-AIR TEMPERATURE

= ±5 V

CC±

CL = 15 pF

RL = 1950 Ω

–50 –25 0 25 50 75 100

TA – Free-Air Temperature – °C

RL = 390 Ω

RL = 3900 Ω

Figure 8

125

SN75108A

TA – Free-Air Temperature – °C

– Propagation Delay Time – ns

–75

PROPAGATION DELAY TIME (STROBE INPUTS)

FREE-AIR TEMPERATURE

= ±5 V

CC±

RL = 390 Ω CL = 50 pF

PHL(S)

PLH(S)

Figure 9

†

Values below 0°C and above 70°C apply to SN55107A only.

1007550250–25–50 125

– Propagation Delay Time – ns

–75

PROPAGATION DELAY TIME (STROBE INPUTS)

FREE-AIR TEMPERATURE

= ±5 V

CC±

RL = 390 Ω CL = 15 pF

PLH(S)

PHL(S)

SN75108A

1007550250–25–50 125

TA – Free-Air Temperature – °C

Figure 10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 10

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

APPLICATION INFORMATION

basic balanced-line transmission system

The ’107A, SN75107B, and SN75108A dual line devices are designed specifically for use in high-speed data-transmission systems that utilize balanced terminated transmission lines, such as twisted-pair lines. The system operates in the balanced mode, so noise induced on one line is also induced on the other. The noise appears common mode at the receiver input terminals, where it is rejected. The ground connection between the line driver and receiver is not part of the signal circuit; therefore, system performance is not affected by circulating ground currents.

The unique driver-output circuit allows terminated transmission lines to be driven at normal line impedances. High-speed system operation is ensured because line reflections are virtually eliminated when terminated lines are used. Crosstalk is minimized by low signal amplitudes and low line impedances.

The typical data delay in a system is approximately 30 + 1.3 L ns, where L is the distance in feet separating the driver and receiver. This delay includes one gate delay in both the driver and receiver.

Data is impressed on the balanced-line system by unbalancing the line voltages with the driver output current. The driven line is selected by appropriate driver-input logic levels. The voltage difference is approximately:

≈ 1/2I

DIFF

High series line resistance causes degradation of the signal. However, the receivers detect signals as low as 25 mV. For normal line resistances, data can be recovered from lines of several thousand feet in length.

O(on)

• R

Line-termination resistors (RT) are required only at the extreme ends of the line. For short lines, termination resistors at the receiver only may be adequate. The signal amplitude is then approximately:

Data Input

Inhibit

≈ I

DIFF

A B

C D

Driver SN55110A, SN75110A, SN75112

O(on)

• R

Transmission Line Having

Characteristic Impedance Z

RT = ZO/2

Strobes

Receiver ‘107A, SN75107B, SN75108A

Figure 11. Typical Differential Data Line

data-bus or party-line system

The strobe feature of the receivers and the inhibit feature of the drivers allow these dual line devices to be used in data-bus or party-line systems. In these applications, several drivers and receivers can share a common transmission line. An enabled driver transmits data to all enabled receivers on the line while other drivers and receivers are disabled. Data is time multiplexed on the transmission line. The device specifications allow widely varying thermal and electrical environments at the various driver and receiver locations. The data-bus system offers maximum performance at minimum cost.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 11

Drivers SN55110A, SN75110A, SN75112

SN55107A, SN75107A, SN75107B, SN75108A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

APPLICATION INFORMATION

Receiver 1 Receiver 2 Receiver 4

YY Y

Data Input

Inhibit

Driver 1 Driver 3 Driver 4

B C

Location 1 Location 3 Location 4

Strobes

Location 2

A BB

C DD

Strobes Strobes

Receivers ‘107A, SN75107B, SN75108A

Figure 12. Typical Differential Party Line

unbalanced or single-line systems

These dual line circuits also can be used in unbalanced or single-line systems. Although these systems do not offer the same performance as balanced systems for long lines, they are adequate for very short lines where environmental noise is not severe.

The receiver threshold level is established by applying a dc reference voltage to one receiver input terminal. The signal from the transmission line is applied to the remaining input. The reference voltage should be optimized so that signal swing is symmetrical about it for maximum noise margin. The reference voltage should be in the range of –3 V to 3 V . It can be provided by a voltage supply or by a voltage divider from an available supply voltage.

A single-ended output from a driver can be used in single-line systems. Coaxial or shielded line is preferred for minimum noise and crosstalk problems. For large signal swings, the high output current (typically 27 mA) of the SN75112 is recommended. Drivers can be paralleled for higher current. When using only one channel of the line drivers, the other channel should be inhibited and/or have its outputs grounded.

SN55110A, SN75110A, SN75112

‘107A, SN75107B, SN75108A

Output

Strobes

Input

Inhibit

A B

C D

VO = –IO • R

Output

Input

ref

Figure 13. Single-Ended Operation

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 12

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

APPLICATION INFORMATION

SN75108A dot-AND output connections

The SN75108A line receiver features an open-collector-output circuit that can be connected in the dot-AND logic configuration with other similar open-collector outputs. This allows a level of logic to be implemented without additional logic delay.

SN75108A

Output

SN5401/SN7401 or

Equivalent

Dot-AND Connection

Figure 14. Dot-AND Connection

increasing common-mode input voltage range of receiver

The common-mode voltage range (CMVR) is defined as the range of voltage applied simultaneously to both input terminals that, if exceeded, does not allow normal operation of the receiver.

The recommended operating CMVR is ±3 V , making it useful in all but the noisiest environments. In extremely noisy environments, common-mode voltage can easily reach ±10 V to ±15 V if some precautions are not taken to reduce ground and power supply noise, as well as crosstalk problems. When the receiver must operate in such conditions, input attenuators should be used to decrease the system common-mode noise to a tolerable level at the receiver inputs. Differential noise is also reduced by the same ratio. These attenuators were omitted intentionally from the receiver input terminals so the designer can select resistors that are compatible with his particular application or environment. Furthermore, the use of attenuators adversely affects the input sensitivity , the propagation delay time, the power dissipation, and in some cases (depending on the selected resistor values) the input impedance; thereby reducing the versatility of the receiver.

The ability of the receiver to operate with approximately ±15 V common-mode voltage at the inputs has been checked using the circuit shown in Figure 15. Resistors R1 and R2 provide a voltage-divider network. Dividers with three different values presenting a 5-to-1 attenuation were used to operate the differential inputs at approximately ±3 V common-mode voltage. Careful matching of the two attenuators is needed to balance the overdrive at the input stage. The resistors used are shown in Table 1.

Table 1

Attenuator 1: R1 = 2 kΩ, R2 = 0.5 kΩ Attenuator 2: R1 = 6 kΩ, R2 = 1.5 kΩ Attenuator 3: R1 = 12 kΩ, R2 = 3 kΩ

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 13

SN75108A

SN55107A, SN75107A, SN75107B, SN75108A

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

APPLICATION INFORMATION

increasing common-mode input voltage range of receiver (continued)

Table 2 shows some of the typical switching results obtained under such conditions.

Table 2. Typical Propagation Delays for Receiver

With Attenuator Test Circuit Shown in Figure 15

DUAL LINE RECEIVERS

14 V

– 16 V

DEVICE PARAMETERS

PLH

’107A

SN75107B

PHL

PLH

PHL

16 V

– 14 V

15 V or –15 V

INPUT

ATTENUATOR

One Attenuator

on Each Input

TYPICAL

(NS)

1 20 2 32 3 42 1 22 2 31 3 33 1 36 2 47 3 57 1 29 2 38 3 41

5 V

Receiver

RL = 390 Ω

5 V

Figure 15. Common-Mode Circuit for Testing Input Attenuators With Results Shown in Table 2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 14

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

Two methods of terminating a transmission line to reduce reflections are shown in Figure 16. The first method uses the resistors as the attenuation network and line termination. The second method uses two additional resistors for the line terminations.

APPLICATION INFORMATION

Method 1

(see Note A)

R2 (see Note A)

Method 2

R3R3

R2 (see Note A)

R3 = R1 + R2 = ZO/2

NOTE A: To minimize the loading, the values of R1 and R2 should be fairly large. Examples of possible values are shown in Table 1.

R1 + R2 > Z

R3 = ZO/2

Figure 16. Termination Techniques

For party-line operation, method 2 should be used as shown in Figure 17.

Attenuation Network

Figure 17. Party-Line Termination Technique

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 15

SN55107A, SN75107A, SN75107B, SN75108A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

APPLICATION INFORMATION

furnace control using the SN75108A

The furnace control circuit in Figure 18 is an example of the possible use of the SN75108A series in areas other than what would normally be considered electronic systems. A description of the operation of this control follows. When the room temperature is below the desired level, the resistance of the room temperature sensor is high and channel 1 noninverting input is below (less positive than) the reference level set on the input differential amplifier. This situation causes a low output, operating the heat-on relay and turning on the heat. The channel 2 noninverting input is below the reference level when the bonnet temperature of the furnace reaches the desired level. This causes a low output, thus operating the blower relay. Normally the furnace is shut down when the room temperature reaches the desired level and the channel 1 output goes high, turning the heat off. The blower remains on as long as the bonnet temperature is high, even after the heat-on relay is off. There is also a safety switch in the bonnet that shuts down the furnace if the temperature there exceeds desired limits. The types of temperature-sensing devices and bias-resistor values used are determined by the particular operating conditions encountered.

5 V

Bonnet

Temp.

Sensor

+ T

Room Temp.

Sensor

Room Temp.

Setting

Blower on Control

– T

Figure 18. Furnace Control Using SN75108A

Channel 1

Channel 2

Bonnet Upper

Limit Switch

1 Y

2 Y

To Heat-on

Relay Return

To Blower

Relay Return

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 16

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

APPLICATION INFORMATION

repeaters for long lines

In some cases, the driven line may be so long that the noise level on the line reaches the common-mode limits or the attenuation becomes too large and results in poor reception. In such a case, a simple application of a receiver and a driver as repeaters [shown in Figure 19(a)] restores the signal level and allows an adequate signal level at the receiving end. If multichannel operation is desired, then proper gating for each channel must be sent through the repeater station using another repeater set as in Figure 19(b).

Repeaters

Data In

Clock In

Driver

Strobe

Ckt

Receiver

(a) SINGLE-CHANNEL LINE

Receiver

P P

Receiver

P P

(b) MULTICHANNEL LINE WIDTH WITH STROBE

Driver

Receiver

Data Out

Figure 19. Receiver-Driver Repeaters

receiver as dual differential comparator

There are many applications for differential comparators, such as voltage comparison, threshold detection, controlled Schmitt triggering, and pulse-width control.

As a differential comparator , a ’107A or SN75108A can be connected to compare the noninverting input terminal with the inverting input as shown in Figure 20. The output is high or low, resulting from the A input being greater or less than the reference. The strobe inputs allow additional control over the circuit so that either output, or both, can be inhibited.

Strobe 1

Reference 1

Strobe 1, 2

Reference 2

Strobe 2

Output 1

Output 2

Figure 20. SN75107A Series Receiver as a Dual Differential Comparator

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 17

SN55107A, SN75107A, SN75107B, SN75108A

DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

APPLICATION INFORMATION

window detector

The window detector circuit in Figure 21 has a large number of applications in test equipment and in determining upper limits, lower limits, or both at the same time, such as detecting whether a voltage or signal has exceeded its window limits. Illumination of the upper-limit (lower-limit) indicator shows that the input voltage is above (below) the selected upper (lower) limit. A mode selector is provided for selecting the desired test. For window detecting, the upper-and-lower-limits test position is used.

Upper

Limit

Input From

Test Point

1 kΩ 1 kΩ

Set

5 kΩ

Set

Lower

Limit

5 V –5 V

1 kΩ

Selector

Mode

MODE SELECTOR LEGEND

POSITION CONDITION

1Off 2 Test for Upper Limit 3 Test for Lower Limit 4 Test for Upper and Lower Limits

5 V

500 Ω

Upper-Limit Indicator

500 Ω

Lower-Limit Indicator

4.7 kΩ

Figure 21. Window Detector Using SN75108A

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 18

SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS

SLLS069D – JANUARY 1977 – REVISED APRIL 1998

APPLICATION INFORMATION

temperature controller with zero-voltage switching

The circuit in Figure 22 switches an electric-resistive heater on or off by providing negative-going pulses to the gate of a triac during the time interval when the line voltage is passing through zero. The pulse generator is the 2N5447 and four diodes. This portion of the circuit provides negative-going pulses during the short time (approximately 100 µs) when the line voltage is near zero. These pulses are fed to the inverting input of one channel of the SN75108A. If the room temperature is below the desired level, the resistance of the thermistor is high and the noninverting input of channel 2 is above the reference level determined by the thermostat setting. This provides a high-level output from channel 2. This output is ANDed with the positive-going pulses from the output of channel 1, which are reinverted in the 2N5449.

250 µF

120 V to

220 V, 60 Hz

5-V

Zener

2N5447

– T

VCC

+ 1A 1B

Channel 1

Channel 2

2A 2B

SN75108A

Thermostat

Setting

VCC

GND

–

10-V

Zener

250 µF

2N5449

Heater

Load

Figure 22. Zero-Voltage Switching Temperature Controller

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Page 19

IMPORTANT NOTICE

T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.