Datasheet 5962-9562001VXA, 5962-9562001QXA, 54ACTQ16245WRQV, 54ACTQ16245MDA, 54ACTQ16245FMQR Datasheet (NSC)

54ACTQ16245
16-Bit Transceiver with TRI-STATE

®

Outputs

General Description

The ’ACTQ16245 contains sixteen non-inverting bidirec­tional buffers with TRI-STATE outputs and is intended for
bus oriented applications. The device is byte controlled.
Each has separate control inputs which can be shorted to­gether for full 16-bit operation. The T/R inputs determine the
direction of data flow through the device. The OE inputs dis­able both theAand B ports by placing them in a high imped­ance state.

The ’ACTQ16245 utilizes NSC Quiet Series technology to
guarantee quiet output switching and improved dynamic
threshold performance. FACT Quiet Series

®

features GTO

®

output control for superior performance.

Features

n Utilizes NSC FACT Quiet Series technology
n Guaranteed simultaneous switching noise level and

dynamic threshold performance

n Bidirectional non-inverting buffers
n Separate control logic for each byte
n 16-bit version of the ’ACTQ245
n Outputs source/sink 24 mA
n Standard Microcircuit Drawing (SMD) 5962-9562001

Logic Symbol

Pin Description

Pin Names Description

OE

n

Output Enable Input (Active Low)

T/R

Transmit/Receive Input

A

0–A15

Side A Inputs/Outputs

B

0–B15

Side B Outputs/Inputs

Connection Diagram

GTO™is a trademark of National Semiconductor Corporation.
TRI-STATE

®

is a registered trademark of National Semiconductor Corporation.

FACT

™

and FACT Quiet Series™are trademarks of Fairchild Semiconductor Corporation.

DS010926-1

Pin Assignment for CERPAK

DS010926-2

September 1998

54ACTQ16245 16-Bit Transceiver with TRI-STATE Outputs

© 1998 National Semiconductor Corporation DS010926 www.national.com

Functional Description

The ’ACTQ16245 contains sixteen non-inverting bidirec­tional buffers with TRI-STATE outputs. The device is byte
controlled witheach byte functioning identically, butindepen­dent of theother. The controlpins can be shorted together to
obtain full 16-bit operation. The following description applies
to each byte. When the T/R input is HIGH, then Bus A data

is transmitted to Bus B. When the T/R input is LOW, Bus B
data is transmitted to Bus A. The TRI-STATE outputs are
controlled by an Output Enable (OE

n

) input for each byte.
When OEnis LOW, the outputs are in 2-state mode. When
OEnis HIGH, the outputs are in the high impedance mode,
but this does not interfere with entering new data into the
inputs.

Truth Tables

Inputs Outputs

OE

1

T/R

1

L L Bus B0–B7Data to Bus A0–A

7

L H Bus A0–A7Data to Bus B0–B

7

H X HIGH-Z State on A0–A7,B0–B

7

Inputs Outputs

OE

2

T/R

2

L L Bus B8–B15Data to Bus A8–A

15

L H Bus A8–A15Data to Bus B8–B

15

H X HIGH-Z State on A8–A15,B8–B

15

H=High Voltage Level
L=Low Voltage Level
X=Immaterial
Z=High Impedance

Logic Diagram

DS010926-3

www.national.com 2

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (V

CC

) −0.5V to + 7.0V

DC Input Diode Current (I

IK

)

V

I

=

−0.5V −20 mA

V

I

=

V

CC

+ 0.5V +20 mA

DC Output Diode Current (I

OK

)

V

O

=

−0.5V −20 mA

V

O

=

V

CC

+0.5V +20 mA

DC Output Voltage (V

O

) −0.5V to VCC+0.5V

DC Output Source/Sink Current (I

O

)

±

50 mA

DC V

CC

or Ground Current

per Output Pin

±

50 mA

Junction Temperature

C-DIP +175˚C

Storage Temperature −65˚C to +150˚C

Recommended Operating
Conditions

Supply Voltage (VCC)

’ACTQ 4.5V to 5.5V

Input Voltage (V

I

) 0VtoV

CC

Output Voltage (VO) 0VtoV

CC

Operating Temperature (TA)

54ACTQ −55˚C to +125˚C

Minimum Input Edge Rate (dV/dt)

’ACTQ Devices 125 mV/ns
V

IN

from 0.8V to 2.0V

V

CC

@

4.5V, 5.5V

Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception to ensure that the system design is reliable over its power supply,
temperature, and output/input loading varaibles. National does not recom­mend operation of FACT

™

circuits outside databook specifications.

DC Electrical Characteristics for ’ACTQ Family Devices

Symbol Parameter V

CC

(V)

54ACTQ Units Conditions

T

A

=

−55˚C to +125˚C

Guaranteed Limits

V

IH

Minimum High 4.5 2.0 V V

OUT

=

0.1V

Input Voltage 5.5 2.0 or V

CC

− 0.1V

V

IL

Maximum Low 4.5 0.8 V V

OUT

=

0.1V

Input Voltage 5.5 0.8 or V

CC

− 0.1V

V

OH

Minimum High 4.5 4.4 V I

OUT

=

−50 µA

Output Voltage 5.5 5.4

(Note 2)
V

IN

=

V

IL

or V

IH

4.5 3.70 V IOH= −24 mA

5.5 4.70 I

OH

= −24 mA

V

OL

Maximum Low 4.5 0.1 V I

OUT

=

50 µA

Output Voltage 5.5 0.1

(Note 2)
V

IN

=

V

IL

or V

IH

4.5 0.50 V IOL=24mA

5.5 0.50 I

OL

=24mA

I

OZT

Maximum I/O 5.5

±

10.0 µA V

I

=

V

IL,VIH

Leakage Current V

O

=

V

CC

, GND

I

IN

Maximum Input 5.5

±

1.0 µA V

I

=

V

CC

, GND

Leakage Current

I

CCT

Maximum ICC/Input 5.5 1.6 mA V

I

=

V

CC

−2.1V

I

CC

Max Quiescent 5.5 160.0 µA V

IN

=

V

CC

or GND

Supply Current (Note 6)

I

OLD

Minimum Dynamic 5.5 50 mA V

OLD

=

1.65V Max

I

OHD

Output Current (Note 3) 50 mA V

OHD

=

3.85V Min

V

OLP

Quiet Output 5.0 0.8 V
Maximum Dynamic V

OL

(Notes 4, 5)

V

OLV

Quiet Output 5.0 -0.8 V
Minimum Dynamic V

OL

(Notes 4, 5)

Note 2: All outputs loaded; thresholds associated with output under test.
Note 3: Maximum test duration 2.0 ms; one output loaded at a time.

www.national.com3

DC Electrical Characteristics for ’ACTQ Family Devices (Continued)

Note 4: Maximum number of outputs that can switch simultaneously is n. (n − 1) outputs are switched LOW and one output held LOW.
Note 5: Maximum number of outputs that can switch simultaneously is n. (n − 1) outputs are switched HIGH and one output held HIGH.
Note 6: I

CC

for 54ACTQ@25˚C is identical to 74ACTQ@25˚C.

AC Electrical Characteristics

Symbol Parameter V

CC

(V)

(Note 7)

54ACTQ Units

T

A

=

−55˚C to +125˚C
C

L

=

50 pF

Min Max

t

PLH

, Propagation 5.0 2.0 9.5

t

PHL

Delay An,B

n

2.0 9.5 ns

to B

n,An

t

PZH

, Output Enable 5.0 2.5 11.0 ns

t

PZL

Time 2.5 13.0

t

PHZ

, Output Disable 5.0 1.5 9.5 ns

t

PLZ

Time 1.5 9.5

Note 7: Voltage Range 5.0 is 5.0V±0.5V.

Capacitance

Symbol Parameter Typ Units Conditions

C

IN

Input Pin Capacitance 4.5 pF V

CC

=

5.0V

C

PD

Power Dissipation 95 pF V

CC

=

5.0V

www.national.com 4

5

Physical Dimensions inches (millimeters) unless otherwise noted

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE­VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI­CONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or sys­tems which, (a) are intended for surgical implant into
the body,or(b) support or sustain life,and whose fail­ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expectedto result in a significant injury
to the user.

2. A critical component in any component of a life support
device or system whose failure to perform can be rea­sonably expected to cause thefailure of the life support
device or system,or to affect its safety oreffectiveness.

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48-Lead CERPAK (F)

NS Package Number WA48A

54ACTQ16245 16-Bit Transceiver with TRI-STATE Outputs

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.