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54ABT541
Octal Buffer/Line Driver with TRI-STATE
General Description
The ’ABT541 is an octal buffer and line driver with
TRI-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus-oriented transmitter/
receiver. The ’ABT541 is similar to the ’ABT244 with broadside pinout.
Features
n Non-inverting buffers
n Output sink capability of 48 mA, source capability of
24 mA
Ordering Code
Military Package Package Description
Number
54ABT541J-QML J20A 20-Lead Ceramic Dual-In-Line
54ABT541W-QML W20A 20-Lead Cerpack
54ABT541E-QML E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
n Guaranteed latchup protection
n High impedance glitch free bus loading during entire
power up and power down cycle
n Nondestructive hot insertion capability
n Flow-through pinout for ease of PC board layout
n Disable time less than enable time to avoid bus
contention
n Standard Microcircuit Drawing (SMD) 5962-9471801
®
Outputs
54ABT541 Octal Buffer/Line Driver with TRI-STATE Outputs
August 1998
Connection Diagram
Pin Assignment
DIP and Cerpack
DS100217-1
Pin Assignment
LCC
DS100217-30
TRI-STATE®is a registered trademarkof National Semiconductor Corporation.
Pin Names Description
OE
I
0–I7
O
1
0–O7
,OE
Output Enable Input (Active Low)
2
Inputs
Outputs
Truth Table
Inputs Outputs
OE
1
LLH H
HXX Z
XHX Z
LLL L
=
H
HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial
Z=High Impedance
OE
2
I ABT541
© 1998 National Semiconductor Corporation DS100217 www.national.com
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Absolute Maximum Ratings (Note 1)
Storage Temperature −65˚C to +150˚C
Ambient Temperature under Bias −55˚C to +125˚C
Junction Temperature under Bias
Ceramic −55˚C to +175˚C
Pin Potential to
V
CC
Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State −0.5V to 5.5V
in the HIGH State −0.5V to V
CC
in LOW State (Max) twice the rated I
DC Latchup Source Current −500 mA
Over Voltage Latchup (I/O) 10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Military −55˚C to +125˚C
Supply Voltage
Military +4.5V to +5.5V
Minimum Input Edge Rate (∆V/∆t)
Data Input 50 mV/ns
Enable Input 20 mV/ns
Current Applied to Output
DC Electrical Characteristics
Symbol Parameter ABT541 Units V
CC
Min Typ Max
V
V
V
V
Input HIGH Voltage 2.0 V Recognized HIGH Signal
IH
Input LOW Voltage 0.8 V Recognized LOW Signal
IL
Input Clamp Diode Voltage −1.2 V Min I
CD
Output HIGH Voltage 54ABT 2.5 V Min I
OH
54ABT 2.0 V Min I
V
I
Output LOW Voltage 54ABT 0.55 V Min I
OL
Input HIGH Current 5 µA Max V
IH
5V
I
Input HIGH Current 7 µA Max V
BVI
Breakdown Test
I
Input LOW Current −5 µA Max V
IL
−5 V
V
I
I
I
I
I
I
I
I
I
Input Leakage Test 4.75 V 0.0 I
ID
Output Leakage Current 50 µA 0 − 5.5V V
OZH
Output Leakage Current −50 µA 0 − 5.5V V
OZL
Output Short-Circuit Current −100 −275 mA Max V
OS
Output High Leakage Current 50 µA Max V
CEX
Bus Drainage Test 100 µA 0.0 V
ZZ
Power Supply Current 50 µA Max All Outputs HIGH
CCH
Power Supply Current 30 mA Max All Outputs LOW
CCL
Power Supply Current 50 µA Max OE
CCZ
Additional ICC/Input Outputs Enabled 2.5 mA V
CCT
Outputs TRI-STATE 2.5 mA Max Enable Input V
Outputs TRI-STATE 50 µA Data Input V
I
CCD
Dynamic I
CC
No Load mA/ Max Outputs Open, OE
(Note 4) 0.1 MHz One Bit Toggling (Note 3),
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions
is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Note 3: For 8 bits toggling, I
Note 4: Guaranteed, but not tested.
CCD
<
0.8 mA/MHz.
Conditions
=
−18 mA
IN
=
−3 mA
OH
=
−24 mA
OH
=
48 mA
OL
=
2.7V (Note 4)
IN
=
V
IN
CC
=
7.0V
IN
=
0.5V (Note 4)
IN
=
0.0V
IN
=
1.9 µA
ID
All Other Pins Grounded
=
2.7V; OE
OUT
=
0.5V; OE
OUT
=
0.0V
OUT
=
V
OUT
CC
=
5.5V; All Others GND
OUT
=
V
n
CC
=
n
=
n
;
All Others at VCCor Ground
=
− 2.1V
V
I
CC
All Others at V
I
=
I
CC
=
V
CC
V
CC
or Ground
=
n
50%Duty Cycle
(mA)
OL
2.0V
2.0V
− 2.1V
− 2.1V;
GND,
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DC Electrical Characteristics
Symbol Parameter Min Max Units V
V
OLP
V
OLV
Note 5: Max number of outputs defined as (n).n−1data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Quiet Output Maximum Dynamic V
Quiet Output Minimum Dynamic V
OL
OL
1.0 V 5.0 T
-1.45 V 5.0 T
CC
AC Electrical Characteristics
54ABT
=
T
−55˚C to +125˚C
A
Symbol Parameter V
=
4.5V–5.5V Units
CC
=
C
50 pF
L
Min Max
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay 1.0 5.0 ns
Data to Outputs 1.0 5.3
Output Enable Time 1.1 7.2 ns
1.5 7.9
Output Disable Time 1.5 7.5 ns
1.5 7.9
Capacitance
Symbol Parameter Typ Units Conditions
C
IN
C
(Note 6) Output Capacitance 9.0 pF V
OUT
Note 6: C
is measured at frequency of f=1 MHz, per MIL-STD-883B, Method 3012.
OUT
Input Capacitance 5.0 pF V
=
C
L
=
A
=
A
Conditions
50 pF, R
=
L
25˚C (Note 5)
25˚C (Note 5)
=
T
25˚C
A
=
0.0V
CC
=
5.0V
CC
500Ω
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Capacitance (Continued)
vs Temperature (TA)
t
PLH
=
C
50 pF, 1 Output Switching
L
t
vs Temperature (TA)
PHL
=
C
50 pF, 1 Output Switching
L
t
vs Load Capacitance
PLH
1 Output Switching, T
t
vs Load Capacitance
PLH
8 Outputs Switching, T
DS100217-11
t
vs Load Capacitance
=
25˚C
A
DS100217-13
=
25˚C
A
PHL
1 Output Switching, T
t
vs Load Capacitance
PHL
8 Outputs Switching, T
=
25˚C
A
=
25˚C
A
DS100217-12
DS100217-14
DS100217-15
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
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DS100217-16
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Capacitance (Continued)
vs Temperature (TA)
t
PZL
=
C
50 pF, 1 Output Switching
L
t
vs Temperature (TA)
PLZ
=
C
50 pF, 1 Output Switching
L
t
vs Temperature (TA)
PZL
=
C
50 pF, 8 Outputs Switching
L
t
vs Temperature (TA)
PZH
=
C
50 pF, 1 Output Switching
L
DS100217-17
DS100217-19
t
vs Temperature (TA)
PLZ
=
C
50 pF, 8 Outputs Switching
L
t
vs Temperature (TA)
PHZ
=
C
50 pF, 1 Output Switching
L
DS100217-18
DS100217-20
DS100217-21
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
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DS100217-22
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Capacitance (Continued)
vs Temperature (TA)
t
PZH
=
C
50 pF, 8 Outputs Switching
L
t
vs Temperature (TA)
PHZ
=
C
50 pF, 8 Outputs Switching
L
t
vs Load Capacitance
PZH
8 Outputs Switching, T
t
and t
PLH
=
V
CC
vs Number Outputs Switching
PHL
=
5.0V, T
A
25˚C, C
DS100217-23
t
vs Load Capacitance
=
25˚C
A
DS100217-25
=
50 pF
L
PZL
8 Outputs Switching, T
ICCvs Frequency,
Average, T
All Outputs Unloaded/Unterminated
=
25˚C,
A
=
25˚C
A
DS100217-24
DS100217-26
DS100217-27
Dashed lines represent design characteristics; for specified guarantees refer to AC Characteristics Table.
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DS100217-28
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AC Loading
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
AC Waveforms
FIGURE 4. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
DS100217-3
DS100217-5
FIGURE 2. Test Input Signal Levels
Amplitude Rep. Rate t
w
t
r
3.0V 1 MHz 500 ns 2.5 ns 2.5 ns
FIGURE 3. Test Input Signal Requirements
FIGURE 5. TRI-STATE Output HIGH and LOW
Enable and Disable Time
DS100217-4
t
f
DS100217-7
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8
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Terminal Ceramic Chip Carrier
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package
NS Package Number J20A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Ceramic Flatpack
NS Package Number W20A
54ABT541 Octal Buffer/Line Driver with TRI-STATE Outputs
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