Page 1
5
6
7
8
9
10
11
25
24
23
22
21
20
19
432128
12 13 14 15 16
OE
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
DIR
SAB
CLKAB
B8
B7
A8
GND
NC
NC
CLKBA
SBA
V
A7
B6
17 18
27 26
NC – No internal connection
CC
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SN54ALS646, SN54ALS648, SN54AS646 . . . JT PACKAGE
SN74ALS646A, SN74ALS648A, SN74AS646,
SN74AS648 . . . DW OR NT PACKAGE
(TOP VIEW)
SN54ALS646, SN54ALS648, SN54AS646 . . . FK PACKAGE
(TOP VIEW)
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
• Independent Registers for A and B Buses
• Multiplexed Real-Time and Stored Data
• Choice of True or Inverting Data Paths
• Choice of 3-State or Open-Collector
Outputs
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
DEVICE OUTPUT LOGIC
SN54ALS646, SN74ALS646A, ′AS646 3 state True
SN54ALS648, SN74ALS648A, SN74AS648 3 state Inverting
description
These devices consist of bus-transceiver circuits
with 3-state or open-collector outputs, D-type
flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
data bus or from the internal storage registers.
Data on the A or B bus is clocked into the registers
on the low-to-high transition of the appropriate
clock (CLKAB or CLKBA) input. Figure 1
illustrates the four fundamental bus-management
functions that can be performed with the octal bus
transceivers and registers.
Output-enable (OE
) and direction-control (DIR)
inputs control the transceiver functions. In the
transceiver mode, data present at the highimpedance port may be stored in either or both
registers.
The select-control (SAB and SBA) inputs can
multiplex stored and real-time (transparent mode)
data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during
the transition between stored and real-time data. DIR determines which bus receives data when OE
is low. In
the isolation mode (OE
high), A data may be stored in one register and/or B data may be stored in the other
register.
When an output function is disabled, the input function is still enabled and can be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The -1 version of the SN74ALS646A is identical to the standard version, except that the recommended
maximum I
OL
in the -1 version is increased to 48 mA. There are no -1 versions of the SN54ALS646,
SN54ALS648, or SN74ALS648A.
The SN54ALS646, SN54ALS648, and SN54AS646 are characterized for operation over the full military
temperature range of –55°C to 125°C. The SN74ALS646A, SN74ALS648A, SN74AS646, and SN74AS648 are
characterized for operation from 0°C to 70°C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Page 2
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
21
L
3
DIR
L
1
CLKAB
X
23
CLKBA
X
2
SAB
X
22
SBA
L
REAL-TIME TRANSFER
BUS B TO BUS A
21
L
3
DIR
H
1
CLKAB
X
23
CLKBA
X
2
SAB
L
22
SBA
X
REAL-TIME TRANSFER
BUS A TO BUS B
21
X
3
DIR
X
1
CLKAB23CLKBA
X
2
SAB
X
22
SBA
X
STORAGE FROM
A, B, OR A AND B
21
L
3
DIR
L
1
CLKAB
X
23
CLKBA
H or L
2
SAB
X
22
SBA
H
TRANSFER STORED DATA
TO A AND/OR B
X
H
X
X
XX
X
X
X
L H H or L X H X
↑
↑
↑↑
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
OE OE
OEOE
Figure 1. Bus-Management Functions
Pin numbers shown are for the DW, JT, and NT packages.
Page 3
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Function Tables
SN54ALS646, SN54AS646, SN74ALS646A, SN74AS646
INPUTS
DATA I/O
OE
DIR CLKAB CLKBA SAB SBA A1–A8 B1–B8
OPERATION OR FUNCTION
X X ↑ X X X Input Unspecified
†
Store A, B unspecified
†
X XX ↑X X Unspecified
†
Input Store B, A unspecified
†
H X ↑ ↑ X X Input Input Store A and B data
H X H or L H or L X X Input disabled Input disabled Isolation, hold storage
L L X X X L Output Input Real-time B data to A bus
L L X H or L X H Output Input Stored B data to A bus
L H X X L X Input Output Real-time A data to B bus
L H H or L X H X Input Output Stored A data to B bus
†
The data output functions can be enabled or disabled by various signals at OE and DIR. Data input functions are always enabled; i.e., data at
the bus terminals is stored on every low-to-high transition of the clock inputs.
SN54ALS648, SN74ALS648A, SN74AS648
INPUTS
DATA I/O
OE
DIR CLKAB CLKBA SAB SBA A1–A8 B1–B8
OPERATION OR FUNCTION
X X ↑ X X X Input Unspecified
†
Store A, B unspecified
†
X XX ↑X X Unspecified
†
Input Store B, A unspecified
†
H X ↑ ↑ X X Input Input Store A and B data
H X H or L H or L X X Input disabled Input disabled Isolation, hold storage
L L X X X L Output Input Real-time B data to A bus
L L X H or L X H Output Input Stored B data to A bus
L H X X L X Input Output Real-time A data to B bus
L H H or L X H X Input Output Stored A data to B bus
†
The data output functions can be enabled or disabled by various signals at OE and DIR. Data input functions are always enabled; i.e., data at
the bus terminals is stored on every low-to-high transition of the clock inputs.
Page 4
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbols
†
A1
4
B1
20
4D
5
7
7
5
1
1
6D ≥1
≥1
1
2
A2
5
B2
19
A3
6
B3
18
A4
7
B4
17
A5
8
B5
16
A6
9
B6
15
A7
10
B7
14
A8
11
B8
13
SN54ALS646, SN54AS646,
SN74ALS646A, SN74AS646
OE
G3
21
3 EN2 [AB]
G5
22
SBA
3 EN1 [BA]
3
DIR
23
CLKBA
1
CLKAB
G7
2
SAB
C6
C4
A1
4
B1
20
4D
5
7
7
5
1
1
6D ≥1
≥1
1
2
A2
5
B2
19
A3
6
B3
18
A4
7
B4
17
A5
8
B5
16
A6
9
B6
15
A7
10
B7
14
A8
11
B8
13
SN54ALS648,
SN74ALS648A, SN74AS648
OE
G3
21
3 EN2 [AB]
G5
22
SBA
3 EN1 [BA]
3
DIR
23
CLKBA
1
CLKAB
G7
2
SAB
C6
C4
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
Page 5
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagrams (positive logic)
A1
B1
1D
C1
1D
C1
One of Eight Channels
20
4
2
1
22
23
21
3
SAB
CLKAB
SBA
CLKBA
DIR
OE
To Seven Other Channels
SN54ALS646, SN54AS646,
SN74ALS646A, SN74AS646
A1
B1
1D
C1
1D
C1
One of Eight Channels
20
4
2
1
22
23
21
3
SAB
CLKAB
SBA
CLKBA
DIR
OE
To Seven Other Channels
SN54ALS648,
SN74ALS648A, SN74AS648
Pin numbers shown are for the DW, JT, and NT packages.
Page 6
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
: Control inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54ALS646 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS646A 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS646 SN74ALS646A
MIN NOM MAX MIN NOM MAX
UNIT
V
CC
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.7 0.8 V
I
OH
High-level output current –12 –15 mA
12 24
IOLL
ow-level output curren
t
48
‡
m
A
f
clock
Clock frequency 0 35 0 40 MHz
t
w
Pulse duration, CLKBA or CLKAB high or low 14.5 12.5 ns
t
su
Setup time, A before CLKAB↑ or B before CLKBA↑ 15 10 ns
t
h
Hold time, A after CLKAB↑ or B after CLKBA↑ 0 0 ns
T
A
Operating free-air temperature –55 125 0 70 °C
‡
Applies only to the -1 version and only if VCC is maintained between 4.75 V and 5.25
Page 7
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS646 SN74ALS646A
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
V
IK
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2 VCC–2
IOH = –3 mA 2.4 3.2 2.4 3.2
V
OH
VCC = 4.5 V
IOH = –12 mA 2
V
IOH = –15 mA 2
IOL = 12 mA 0.25 0.4 0.25 0.4
V
OL
VCC = 4.5 V
IOL = 24 mA 0.35 0.5
V
IOL = 48 mA
‡
0.35 0.5
Control inputs
VI = 7 V 0.1 0.1
I
I
A or B ports
V
CC
= 5.5
V
VI = 5.5 V 0.1 0.1
mA
Control inputs
20 20
I
IH
A or B ports
§
V
CC
=
5.5 V
,
V
I
=
2.7 V
20 20
µ
A
Control inputs
–0.2 –0.2
I
IL
A or B ports
§
V
CC
= 5.5 V,
V
I
= 0.4
V
–0.2 –0.2
m
A
I
O
¶
VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
Outputs high 47 76 47 76
I
CC
VCC = 5.5 V
Outputs low 55 88 55 88
mA
Outputs disabled 55 88 55 88
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
Applies only to the -1 version and only if VCC is maintained between 4.75 V and 5.25
§
For I/O ports, the parameters IIH and IIL include the off-state output current.
¶
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
Page 8
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX
†
UNIT
SN54ALS646 SN74ALS646A
MIN MAX MIN MAX
f
max
35 40 MHz
t
PLH
10 35 7 30
t
PHL
CLKBA or CLKAB
A or B
5 20 5 17
ns
t
PLH
5 22 3 20
t
PHL
A or B
B or A
3 15 3 12
ns
t
PLH
SBA or SAB
‡
10 40 7 35
t
PHL
(stored data low)
A or B
5 23 5 20
ns
t
PLH
SBA or SAB
‡
8 30 6 25
t
PHL
(stored data high)
A or B
5 24 5 20
ns
t
PZH
3 20 2 17
t
PZL
OE
A or B
5 22 4 20
ns
t
PHZ
1 12 1 10
t
PLZ
OE
A or B
1 20 2 16
ns
t
PZH
5 38 3 30
t
PZL
DIR
A or B
5 30 4 25
ns
t
PHZ
1 12 1 10
t
PLZ
DIR
A or B
2 21 2 16
ns
†
For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
These parameters are measured with the internal output state of the storage register opposite that of the bus input.
Page 9
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
: Control inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54ALS648 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS648A 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS648 SN74ALS648A
MIN NOM MAX MIN NOM MAX
UNIT
V
CC
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.7 0.8 V
I
OH
High-level output current –12 –15 mA
I
OL
Low-level output current 12 24 mA
f
clock
Clock frequency 0 35 0 40 MHz
t
w
Pulse duration, CLKBA or CLKAB high or low 14.5 12.5 ns
t
su
Setup time, A before CLKAB↑ or B before CLKBA↑ 15 10 ns
t
h
Hold time, A after CLKAB↑ or B after CLKBA↑ 0 0 ns
T
A
Operating free-air temperature –55 125 0 70 °C
Page 10
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS648 SN74ALS648A
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
V
IK
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2 VCC–2
IOH = –3 mA 2.4 3.2 2.4 3.2
V
OH
VCC = 4.5 V
IOH = –12 mA 2
V
IOH = –15 mA 2
IOL = 12 mA 0.25 0.4 0.25 0.4
VOLV
CC
= 4.5
V
IOL = 24 mA 0.35 0.5
V
Control inputs
VI = 7 V 0.1 0.1
I
I
A or B ports
V
CC
= 5.5
V
VI = 5.5 V 0.1 0.1
mA
Control inputs
20 20
I
IH
A or B ports
‡
V
CC
= 5.5 V,
V
I
= 2.7
V
20 20
µ
A
Control inputs
–0.2 –0.2
I
IL
A or B ports
‡
V
CC
=
5.5 V
,
V
I
=
0.4 V
–0.2 –0.2
m
A
I
O
§
VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
Outputs high 47 76 47 76
I
CC
VCC = 5.5 V
Outputs low 57 88 57 88
mA
Outputs disabled 57 88 57 88
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
For I/O ports, the parameters IIH and IIL include the off-state output current.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
Page 11
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX
†
UNIT
SN54ALS648 SN74ALS648A
MIN MAX MIN MAX
f
max
35 40 MHz
t
PLH
8 39 7 33
t
PHL
CLKBA or CLKAB
A or B
5 23 5 20
ns
t
PLH
3 20 2 17
t
PHL
A or B
B or A
2 12 2 10
ns
t
PLH
SBA or SAB
‡
5 44 5 39
t
PHL
(stored data low)
A or B
4 26 4 22
ns
t
PLH
SBA or SAB
‡
6 30 6 25
t
PHL
(stored data high)
A or B
6 25 6 21
ns
t
PZH
4 25 2 22
t
PZL
OE
A or B
4 25 4 22
ns
t
PHZ
1 12 1 10
t
PLZ
OE
A or B
2 21 2 15
ns
t
PZH
4 35 2 27
t
PZL
DIR
A or B
3 25 3 19
ns
t
PHZ
1 17 1 14
t
PLZ
DIR
A or B
2 22 2 15
ns
†
For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
These parameters are measured with the internal output state of the storage register opposite that of the bus input.
Page 12
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
: Control inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54AS646 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74AS646 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS646 SN74AS646
MIN NOM MAX MIN NOM MAX
UNIT
V
CC
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.8 0.8 V
I
OH
High-level output current –12 –15 mA
I
OL
Low-level output current 32 48 mA
f
clock
* Clock frequency 0 75 0 90 MHz
*
CLKBA or CLKAB high 6 5
tw*
Pulse duration
CLKBA or CLKAB low 7 6
ns
tsu* Setup time, A before CLKAB↑ or B before CLKBA↑ 7 6 ns
th* Hold time, A after CLKAB↑ or B before CLKBA 0 0 ns
T
A
Operating free-air temperature –55 125 0 70 °C
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
Page 13
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS646 SN74AS646
PARAMETER
TEST CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
V
IK
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC–2 VCC–2
IOH = –3 mA 2.4 3.2 2.4 3.2
V
OH
VCC = 4.5 V
IOH = –12 mA 2
V
IOH = –15 mA 2
IOL = 32 mA 0.25 0.5
VOLV
CC
= 4.5
V
IOL = 48 mA 0.35 0.5
V
Control inputs VCC = 5.5 V, VI = 7 V 0.1 0.1
I
I
A or B ports VCC = 5.5 V, VI = 5.5 V 0.1 0.1
mA
Control inputs
20 20
I
IH
A or B ports
‡
V
CC
= 5.5 V,
V
I
= 2.7
V
70 70
µ
A
Control input
–0.5 –0.5
I
IL
A or B ports
‡
V
CC
=
5.5 V
,
V
I
=
0.4 V
–0.75 –0.75
m
A
I
O
§
VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
Outputs high 120 195 120 195
I
CC
VCC = 5.5 V
Outputs low 130 211 130 211
mA
Outputs disabled 130 211 130 211
†
All typical values are at VCC = 5 V, TA = 25 °C.
‡
For I/O ports, the parameters IIH and IIL include the off-state output current.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
Page 14
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX
†
UNIT
SN54AS646 SN74AS646
MIN MAX MIN MAX
f
max
* 75 90 MHz
t
PLH
2 9.5 2 8.5
t
PHL
CLKBA or CLKAB
A or B
2 10 2 9
ns
t
PLH
2 11.5 2 9
t
PHL
A or B
B or A
1 8 1 7
ns
t
PLH
2 13.5 2 11
t
PHL
SBA
or
SAB
‡
A or B
2 11 2 9
ns
t
PZH
2 11 2 9
t
PZL
OE
A or B
3 15 3 14
ns
t
PHZ
2 11 2 9
t
PLZ
OE
A or B
2 11 2 9
ns
t
PZH
3 21 3 16
t
PZL
DIR
A or B
3 24 3 18
ns
t
PHZ
2 12 2 10
t
PLZ
DIR
A or B
2 12 2 10
ns
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
†
For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
These parameters are measured with the internal output state of the storage register opposite that of the bus input.
Page 15
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
: Control inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN74AS648 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN74AS648
MIN NOM MAX
UNIT
V
CC
Supply voltage 4.5 5 5.5 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
I
OH
High-level output current –15 mA
I
OL
Low-level output current 48 mA
f
clock
Clock frequency 0 90 MHz
CLKBA or CLKAB high 5
twPulse duration
CLKBA or CLKAB low 6
ns
t
su
Setup time, A before CLKAB↑ or B before CLKBA↑ 6 ns
t
h
Hold time, A after CLKAB↑ or B before CLKBA 0 ns
T
A
Operating free-air temperature 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74AS648
PARAMETER
TEST CONDITIONS
MIN TYP‡MAX
UNIT
V
IK
VCC = 4.5 V, II = –18 mA –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC–2
V
OH
IOH = –3 mA 2.4 3.2
V
V
CC
= 4.5
V
IOH = –15 mA 2
V
OL
VCC = 4.5 V, IOL = 48 mA 0.35 0.5 V
Control inputs
VI = 7 V 0.1
I
I
A or B ports
V
CC
=
5.5 V
VI = 5.5 V 0.1
mA
Control inputs
20
I
IH
A or B ports
§
V
CC
= 5.5 V,
V
I
= 2.7
V
70
µ
A
Control input
–0.5
I
IL
A or B ports
§
V
CC
= 5.5 V,
V
I
= 0.4
V
–0.75
m
A
I
O
¶
VCC = 5.5 V, VO = 2.25 V –30 –112 mA
Outputs high 110 185
I
CC
VCC = 5.5 V
Outputs low 120 195
mA
Outputs disabled 120 195
‡
All typical values are at VCC = 5 V, TA = 25 °C.
§
For I/O ports, the parameters IIH and IIL include the off-state output current.
¶
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
Page 16
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX
†
UNIT
SN74AS648
MIN MAX
f
max
90 MHz
t
PLH
2 8.5
t
PHL
CLKBA or CLKAB
A or B
2 9
ns
t
PLH
2 8
t
PHL
A or B
B or A
1 7
ns
t
PLH
2 11
t
PHL
SBA
or
SAB
‡
A or B
2 9
ns
t
PZH
2 9
t
PZL
OE
A or B
3 15
ns
t
PHZ
2 9
t
PLZ
OE
A or B
2 9
ns
t
PZH
3 16
t
PZL
DIR
A or B
3 18
ns
t
PHZ
2 10
t
PLZ
DIR
A or B
2 10
ns
†
For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡
These parameters are measured with the internal output state of the storage register opposite that of the bus input.
Page 17
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STA TE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
t
PHZ
t
PLZ
t
PHL
t
PLH
0.3 V
t
PZL
t
PZH
TEST S1
Open
Open
Open
t
PHL
t
PZH
t
PZL
Closed
Open
Closed
t
PHZ
t
PLZ
t
PLH
t
PHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
From Output
Under Test
Test Point
R1 = 500 Ω
S1
CL = 50 pF
(see Note A)
7 V
Open
1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
High-Level
Pulse
Low-Level
Pulse
t
w
VOLTAGE WAVEFORMS
PULSE DURATION
Input
Out-of-Phase
Output
1.3 V
1.3 V
1.3 V1.3 V
1.3 V 1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
V
OL
V
OH
V
OH
V
OL
Output
Control
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
0 V
V
OH
V
OL
3.5 V
In-Phase
Output
0.3 V
t
PLH
1.3 V
1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
SWITCH POSITION TABLE
R2 = 500 Ω
V
CC
R
L
Test Point
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 2. Load Circuits and Voltage Waveforms
Page 18
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