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SN54AC00, SN74AC00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996
D
EPIC
(Enhanced-Performance Implanted
CMOS) 1-µm Process
D
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), DIP
(N) Packages, Ceramic Chip Carriers (FK),
Flat (W), and DIP (J) Packages
description
The ‘AC00 contain four independent 2-input NAND
gates. Each gate performs the Boolean function of
Y = A
S
B or Y = A + B in positive logic.
The SN54AC00 is characterized for operation over
the full military temperature range of –55°C to 125°C.
The SN74AC00 is characterized for operation from
–40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A B
H H L
L XH
X L H
OUTPUT
Y
SN54AC00 ...J OR W PACKAGE
SN74AC00 . . . D, DB, N, OR PW PACKAGE
1Y
NC
2A
NC
2B
NC – No internal connection
(TOP VIEW)
1A
1
1B
2
1Y
3
2A
4
2B
5
2Y
6
GND
SN54AC00 . . . FK PACKAGE
7
(TOP VIEW)
1B1ANC
3212019
4
5
6
7
8
910111213
2Y
GND
14
13
12
11
10
NC
V
CC
4B
4A
4Y
3B
3A
9
3Y
8
CC
V
4B
18
17
16
15
14
3Y
3A
4A
NC
4Y
NC
3B
logic symbol
1A
1B
2A
2B
3A
3B
4A
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
†
1
2
4
5
9
10
12
13
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
&
3
1Y
6
2Y
8
3Y
11
4Y
logic diagram (positive logic)
A
B
Y
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1996, Texas Instruments Incorporated
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SN54AC00, SN74AC00
UNIT
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
Output voltage range, V
Input clamp current, IIK (V
Output clamp current, IOK (V
Continuous output current, I
Continuous current through V
Maximum power dissipation at T
(see Note 1) –0.5 V to V
I
(see Note 1) –0.5 V to V
O
< 0 or V
I
O
O
> VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
< 0 or V
(V
O
or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
= 55°C (in still air) (see Note 2): D package 1.25 W. . . . . . . . . . . . . . . . . . .
A
> VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
= 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
CC
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package 0.5 W. . . . . . . . . . . . . . . . . .
N package 1.1 W. . . . . . . . . . . . . . . . . . . .
PW package 0.5 W. . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
recommended operating conditions (see Note 3)
SN54AC00 SN74AC00
MIN MAX MIN MAX
V
CC
V
IH
V
IL
V
I
V
O
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 0 8 0 8 ns/V
T
A
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
Supply voltage 2 6 2 6 V
VCC = 3 V 2.1 2.1
High-level input voltage
Low-level input voltage
Input voltage 0 V
Output voltage 0 V
High-level output current
Low-level output current
Operating free-air temperature –55 125 –40 85 °C
VCC = 4.5 V
VCC = 5.5 V 3.85 3.85
VCC = 3 V 0.9 0.9
VCC = 4.5 V
VCC = 5.5 V 1.65 1.65
VCC = 3 V –12 –12
VCC = 4.5 V
VCC = 5.5 V –24 –24
VCC = 3 V 12 12
VCC = 4.5 V
VCC = 5.5 V 24 24
3.15 3.15
1.35 1.35
CC
CC
–24 –24
24 24
0 V
0 V
CC
CC
mA
mA
V
V
V
V
†
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 3
PARAMETER
TEST CONDITIONS
V
UNIT
V
V
I
mA
V
V
I
24 mA
PARAMETER
UNIT
A or B
Y
ns
PARAMETER
UNIT
A or B
Y
ns
SN54AC00, SN74AC00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
CC
3 V 2.9 2.9 2.9
IOH = –50 µA
OH
OL
I
I
I
CC
C
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
i
IOH = –12 mA 3 V 2.56 2.4 2.46
= –24
OH
IOH = –50 mA
IOH = –75 mA
IOH = 50 µA
IOL =12 mA 3 V 0.36 0.5 0.44
=
OL
IOL = 50 mA
IOL = 75 mA
VI = VCC or GND 5.5 V ±0.1 ±1 ±1 µA
VI = VCC or GND, IO = 0 5.5 V 2 40 20 µA
VI = VCC or GND 5 V 2.6 pF
†
†
†
†
4.5 V 4.4 4.4 4.4
5.5 V 5.4 5.4 5.4
4.5 V 3.86 3.7 3.76
5.5 V 4.86 4.7 4.76
5.5 V 3.85
5.5 V 3.85
3 V 0.002 0.1 0.1 0.1
4.5 V 0.001 0.1 0.1 0.1
5.5 V 0.001 0.1 0.1 0.1
4.5 V 0.36 0.5 0.44
5.5 V 0.36 0.5 0.44
5.5 V 1.65
5.5 V 1.65
TA = 25°C SN54AC00 SN74AC00
MIN TYP MAX MIN MAX MIN MAX
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
TA = 25°C SN54AC00 SN74AC00
MIN TYP MAX MIN MAX MIN MAX
2 7 9.5 1 11 2 10
1.5 5.5 8 1 9 1 8.5
t
PLH
t
PHL
FROM TO
(INPUT) (OUTPUT)
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
TA = 25°C SN54AC00 SN74AC00
MIN TYP MAX MIN MAX MIN MAX
1.5 6 8 1 8.5 1.5 8.5
1.5 4.5 6.5 1 7 1 7
t
PLH
t
PHL
FROM TO
(INPUT) (OUTPUT)
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
C
pd
Power dissipation capacitance CL = 50 pF, f = 1 MHz 40 pF
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SN54AC00, SN74AC00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996
PARAMETER MEASUREMENT INFORMATION
TEST S1
From Output
Under Test
CL = 50 pF
(see Note A)
t
PLH/tPHL
LOAD CIRCUIT
Open
500 Ω
500 Ω
S1
2 × V
Open
CC
Input
(see Note B)
In-Phase
Output
Out-of-Phase
Output
t
PLH
t
PHL
50% V
CC
50% V
50% V
VOLTAGE WAVEFORMS
50% V
CC
CC
CC
t
PHL
50% V
t
PLH
50% V
CC
CC
V
0 V
V
V
V
V
CC
OH
OL
OH
OL
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤ 2.5 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 5
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright 1998, Texas Instruments Incorporated
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