Datasheet 5962-9861901QLA, 5962-9861901QKA, 54LVXC3245MD8 Datasheet (NSC)

54LVXC3245
8-Bit Dual Supply Configurable Voltage Interface
Transceiver with TRI-STATE

®

Outputs

General Description

The LVXC3245 is a 24-pin dual-supply, 8-bit configurable
voltage interface transceiver suited for real time configurable
I/O applications. The V

CCA

pin accepts a 3V supply level.

The A port is a dedicated 3V port. The V

CCB

pin accepts a
3V-to-5V supply level. The B port is configured to track the
V

CCB

supply level respectively.A5V level on the VCCpin will

configure the I/O pins at a 5V level and a 3V V

CC

will config-

ure the I/O pins at a 3V level. This device will allow the V

CCB

voltage source pin and I/O pins on the B port to float when
OE is HIGH. This feature is necessary to buffer data to and
from sockets that require live insertion and removal during
normal operation.

Features

n Bidirectional interface between 3V and 3V-to-5V buses
n Control inputs compatible with TTL level
n Outputs source/sink up to 24 mA
n Available in Cerpack and CDIP package
n Implements patented EMI reduction circuitry
n Flexible V

CCB

operating range

n Allows B port and V

CCB

to float simultaneously when OE

is HIGH

n Functionally compatible with the 54 series 245
n Standard Microcircuit Drawing (SMD) 5962-9861901

Ordering Code

Order Number Package Number Package Description

54LVXC3245W-QML W24A 24-Lead (0.300" Wide) Ceramic Flatpack
54LVXC3245J-QML J24F 24-Lead Ceramic Dual-in-line

Logic Symbol

Pin Descriptions

Pin Names Description

OE

Output Enable Input

T/R

Transmit/Receive Input

A

0–A7

Side A Inputs or 3-STATE Outputs

B

0–B7

Side B Inputs or 3-STATE Outputs

Connection Diagram

TRI-STATE®is a registered trademark of National Semiconductor Corporation

DS101032-1

Pin Assignment for

CDIP and Cerpack

DS101032-2

February 1999

54LVXC3245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with TRI-STATE

®

Outputs

© 1999 National Semiconductor Corporation DS101032 www.national.com

Truth Table

Inputs Outputs

OE

T/R

L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X HIGH-Z State

H=High Voltage Level
L=Low Voltage Level
X=Immaterial

Logic Diagram

DS101032-4

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Supply Voltage (V

CCA,VCCB

) −0.5V to +7.0V

DC Input Voltage (V

I

)@OE, T/R −0.5V to V

CCA

+0.5V

DC Input/Output Voltage (V

I/O

)

@

A

n

−0.5V to V

CCA

+0.5V

@

B

n

−0.5V to V

CCB

+0.5V

DC Input Diode Curr. (I

IK

)@OE,

T/R

±

20 mA

DC Output Diode (I

OK

)Current

±

50 mA

DC Output Source or Sink Current

(I

O

)

±

50 mA

DC V

CC

or Ground Current

per Output Pin (I

CC

or I

GND

)

±

50 mA

and Max Current

±

200 mA

Storage Temperature Range (T

STG

) −65˚C to +150˚C

Recommended Operating
Conditions

(Note 2)

Supply Voltage

V

CCA

2.7V to 3.6V

V

CCB

3.0V to 5.5V

Input Voltage (V

I

)@OE, T/R 0V to V

CCA

Input Output Voltage (V

I/O

)

@

A

n

0V to V

CCA

@

B

n

0V to V

CCB

Free Air Operating Temperature (TA) −55˚C to +125˚C
Minimum Input Edge Rate (∆V/∆t) 8 ns/V

V

IN

from 30%to 70%of V

CC

V

CC

@

3.0V, 4.5V, 5.5V

Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be op­erated at these limits. The parametric values defined in the Electrical Charac­teristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Conditions” table will define the conditions for ac­tual device operation.

Note 2: The A port unused pins (inputs or I/Os) must be held HIGH or LOW.
They may not float.

DC Electrical Characteristics

Symbol Parameter

V

CCA

(V)

V

CCB

(V)

Units Conditions

T

A

=

−55˚C to

+125˚C

Guaranteed

Limits

V

IHA

Minimum High An, 2.7 3.0 2.0 V V

OUT

≤ 0.1V
or
≥V

CC

− 0.1V

Level Input OE

3.0 3.6 2.0

Voltage T/R

3.6 5.5 2.0

V

IHB

B

n

2.7 3.0 2.0

3.0 3.6 2.0

3.6 5.5 3.85

V

ILA

Maximum Low An, 2.7 3.0 0.8 V V

OUT

≤ 0.1V
or
≥V

CC

− 0.1V

Level Input OE

3.0 3.6 0.8

Voltage T/R

3.6 5.5 0.8

V

ILB

B

n

2.7 3.0 0.8

3.0 3.6 0.8

3.6 5.5 1.65

V

OHA

Minimum High Level 2.7 3.0 2.6 V I

OH

=

−100 µA

Output Voltage 3.6 5.5 3.5 I

OH

=

−100 µA

2.7 3.0 2.2 I

OH

=

−12 mA

3.0 3.0 2.4 I

OH

=

−12 mA

3.0 3.0 2.2 I

OH

=

−24 mA

V

OHB

2.7 3.0 2.9 V I

OH

=

−100 µA

3.6 5.5 5.4 I

OH

=

−100 µA

2.7 3.0 2.4 I

OH

=

−12 mA

3.0 3.0 2.2 I

OH

=

−24 mA

3.0 4.5 3.7 I

OH

=

−24 mA

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DC Electrical Characteristics (Continued)

Symbol Parameter

V

CCA

(V)

V

CCB

(V)

Units Conditions

T

A

=

−55˚C to

+125˚C

Guaranteed

Limits

V

OLA

Maximum Low Level 2.7 3.0 0.1 V I

OL

=

100 µA

Output Voltage 3.6 5.5 0.1 I

OL

=

100 µA

2.7 3.0 0.3 I

OL

=

12 mA

3.0 3.0 0.3 I

OL

=

12 mA

3.0 3.0 0.4 I

OL

=

24 mA

V

OLB

2.7 3.0 0.1 V I

OL

=

100 µA

3.6 5.5 0.1 I

OL

=

100 µA

2.7 3.0 0.3 I

OL

=

12 mA

3.0 3.0 0.4 I

OL

=

24 mA

3.0 4.5 0.4 I

OL

=

24 mA

I

IN

Maximum Input 3.6 3.6

±

1.0 µA V

I

=

V

CCA

, GND

Leakage Current

@

3.6 5.5

±

1.0

OE , T/R

I

OZA

Maximum 3-STATE 3.6 3.6

±

5.0 µA V

I

=

V

IL,VIH

,

Output Leakage 3.6 5.5

±

5.0 OE=V

CCA

@

A

n

V

O

=

V

CCA

, GND

I

OZB

Maximum 3-STATE 3.6 3.6

±

5.0 µA V

I

=

V

IL,VIH

,

Output Leakage 3.6 5.5

±

5.0 OE=V

CCA

@

B

n

V

O

=

V

CCB

, GND

∆I

CC

Maximum B

n

3.6 5.5 1.5 mA V

I

=

V

CCB

–2.1V

I

CC

/Input

All
Inputs

3.6 3.6 0.5 V

I

=

V

CC

–0.6V

I

CCA1

Quiescent V

CCA

A

n

=

V

CCA

or GND

Supply Current 3.6 Open 10 µA B

n

=

Open, OE=V

CCA

,

as B Port Floats T/R=V

CCA,VCCB

=

Open

I

CCA2

Quiescent V

CCA

3.6 3.6 10 µA A

n

=

V

CCA

or GND,

Supply Current 3.6 5.5 10 B

n

=

V

CCB

or GND,

OE=GND, T/R=GND

I

CCB

Quiescent V

CCB

3.6 3.6 10 µA A

n

=

V

CCA

or GND,

Supply Current 3.6 5.5 40 B

n

=

V

CCB

or GND,

OE=GND, T/R=V

CCA

V

OLPA

Quiet Output 3.3 3.3 1.0 V (Note 3)
Maximum Dynamic 3.3 5.0 1.1

V

OLPB

V

OL

3.3 3.3 0.9 V (Note 3)

3.3 5.0 1.6

V

OLVA

Quiet Output 3.3 3.3 -0.7 V (Note 3)
Minimum Dynamic 3.3 5.0 -0.8

V

OLVB

V

OL

3.3 3.3 -0.6 V (Note 3)

3.3 5.0 -1.1

Note 3: Max number of outputs defined as (n). Data inputs are driven 0V to VCClevel; one output at GND.
Note 4: Max number of Data Inputs (n) switching. (n–1) inputs switching 0V to V

CC

level. Input-under-test switching: VCClevel to threshold (V

IHD

), 0V to threshold

(V

ILD

), f=1 MHz.

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AC Electrical Characteristics

Symbol Parameter

T

A

=

−55˚C to +125˚C T

A

=

−55˚C to +125˚C

Units

C

L

=

50 pF C

L

=

50 pF

V

CCA

=

2.7V–3.6V V

CCA

=

2.7V–3.6V

V

CCB

=

4.5V–5.5V V

CCB

=

3.0V–3.6V

Min Max Min Max

t

PHL

Propagation Delay 1.0 9.0 1.0 9.5 ns

t

PLH

A to B 1.0 9.0 1.0 9.5

t

PHL

Propagation Delay 1.0 9.0 1.0 9.0 ns

t

PLH

B to A 1.0 9.0 1.0 9.0

t

PZL

Output Enable Time 1.0 9.0 1.0 10.0 ns

t

PZH

OE to B 1.0 9.0 1.0 10.0

t

PZL

Output Enable Time 1.0 11.0 1.0 11.0 ns

t

PZH

OE to A 1.0 11.0 1.0 11.0

t

PHZ

Output Disable Time 1.0 7.5 1.0 8.0 ns

t

PLZ

OE to B 1.0 7.5 1.0 8.0

t

PHZ

Output Disable Time 1.0 7.0 1.0 7.0 ns

t

PLZ

OE to A 1.0 7.0 1.0 7.0

t

OSHL

Output to Output

t

OSLH

Skew (Note 5) 1.5 1.5 ns
Data to Output

Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci­fication applies to any outputs switching in the same direction, either HIGH to LOW (t

OSHL

) or LOW to HIGH (t

OSLH

). Parameter guaranteed by design.

Capacitance

Symbol Parameter Max Units Conditions

C

IN

Input Capacitance 10.0 pF V

CC

=

Open

C

I/O

Input/Output Capacitance 12.0 pF V

CCA

=

3.3V

V

CCB

=

5.0V

C

PD

Power Dissipation 50 pF V

CCB

=

5.0V

Capacitance V

CCA

=

3.3V

Note 6: CPDis measured at 10 MHz.

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Configurable I/O Application for mixed or unknown Voltages

LVXC3245 is designed to solve 3V/5V interfacing issues
when CMOS devices cannot tolerate I/O levels above their
applied V

CC

. If an I/O pin of 3V ICs is driven by 5V ICs, the
P-Channel transistor in 3V ICs will conduct causing current
flow from I/O bus to the 3V power supply.The resulting high
current flow can cause destruction of 3V ICs through latchup
effects. To prevent this problem, a current limiting resistor is
used typically under direct connection of 3V ICs and 5V ICs,
but it causes speed degradation.

In a better solution, the LVXC3245 configures two different
output levels to handle the dual supply interface issues. The

“A” port is a dedicated 3V port to interface 3V ICs. The “B”
port is configurable and accepts a 3V-to-5V supply level.
This configurable″B″ port provides maximum flexibility forin­terfacing to unknown supply voltages, for interfacing to sup­ply voltages which may change in the future, or for providing
flexibility when supplying systems to multiple customers with
varying power supply requirements.

Figure 1

shows how the
LVXC3245 fits into a system with a 3V subsystem and a 5V
subsystem.

DS101032-3

FIGURE 1. LVXC3245 Fits into a System with 3V Subsystem and 5V Subsystem

www.national.com 6

Configurable I/O Application for
mixed or unknown Voltages

(Continued)

Additionally, the LVXC3245 solves two other unique prob­lems: when interfacing to non-TTL compatible signals or
when interfacing to components or busses which are pulled
up to 5V.

In the first case, when interfacing to non-TTLinputs such as
ACMOS or HCMOS where full 5V signal swings are needed,
the LVXC3245 can act as an amplifier to translate 0 volt to 3
volt signals up to 0 volt to 5 volt levels as shown in

Figure 2

.

In the second case, when interfacing to busses which use re­sistive pull-ups to 5V, it is desirable to avoid connecting 3V
devices directly to the bus to avoid excessive power con-

sumption. The LVXC3245can be used to translate the 3 volt
signals to 5 volt levels and eliminate the power consumed by
the pull-up resistors.

DS101032-5

FIGURE 2. LVXC3245 amplifies 3V signals for interfacing to non-TTL inputs.

DS101032-6

FIGURE 3. LVXC3245 for interfacing to 5V busses with pull-ups minimizes power consumption.

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8

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead (0.300" Wide) Ceramic Flatpack

Package Number W24C

24-Lead Ceramic Dual-in-line

Package Number J24F

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LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE­VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI­CONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or sys­tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life,andwhose fail­ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.

2. A critical component is any component of a life support
device or system whose failure to perform can be rea­sonably expected to cause the failure of the lifesupport
device or system, or to affect its safety or effectiveness.

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Corporation

Americas
Tel: [phone]
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54LVXC3245 8-Bit Dual Supply Configurable Voltage Interface Transceiver with TRI-STATE

®

Outputs

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.