Datasheet 5962-9209001M3A, 54F827SDMQB Datasheet (NSC)

Page 1
TL/F/9598
54F/74F827
#
74F828 10-Bit Buffers/Line Drivers
December 1994
54F/74F827#74F828 10-Bit Buffers/Line Drivers
General Description
The ’F827 and ’F828 10-bit bus buffers provide high per­formance bus interface buffering for wide data/address paths or buses carrying parity. The 10-bit buffers have NOR output enables for maximum control flexibility.
The ’F827 and ’F828 are functionally- and pin-compatible to AMD’s Am29827 and Am29828. The ’F828 is an inverting version of the ’F827.
Features
Y
TRI-STATEÉoutput
Y
’F828 is inverting
Y
Direct replacement for AMD’s Am29827 and Am29828
Commercial Military
Package
Package Description
Number
74F827SPC N24C 24-Lead (0.300×Wide) Molded Dual-In-Line
54F827SDM (Note 2) J24F 24-Lead (0.300×Wide) Ceramic Dual-In-Line
74F827SC (Note 1) M24B 24-Lead (0.300×Wide) Molded Small Outline, JEDEC
54F827FM (Note 2) W24C 24-Lead Cerpack
54F827LM (Note 2) E28A 24-Lead Ceramic Leadless Chip Carrier, Type C
74F828SPC N24C 24-Lead (0.300×Wide) Molded Dual-In-Line
74F828SC (Note 1) M24B 24-Lead (0.300×Wide) Molded Small Outline, JEDEC
Note 1: Devices also available in 13×reel. Use suffixeSCX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix
e
SDMQB, FMQB and LMQB.
Connection Diagrams
Pin Assignment for
DIP, Flatpak and SOIC
Pin Assignment
for LCC
’F827
TL/F/9598– 1
’F828
TL/F/9598– 8
’F827
TL/F/9598– 2
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
Page 2
Logic Symbols
IEEE/IEC
’F827
TL/F/9598– 6
IEEE/IEC
’F828
TL/F/9598– 7
’F827
TL/F/9598– 3
’F828
TL/F/9598– 10
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Page 3
Unit Loading/Fan Out
54F/74F
Pin Names Description
U.L. Input I
IH/IIL
HIGH/LOW Output IOH/I
OL
OE1,OE2Output Enable Input 1.0/1.0 20 mA/b0.6 mA D
0–D7
Data Inputs 1.0/1.0 20 mA/b0.6 mA
O
0–O7
Data Outputs, TRI-STATE 600/106.6 (80)b12 mA/64 mA (48 mA)
Functional Description
The ’F827 and ’F828 are line drivers designed to be em­ployed as memory address drivers, clock drivers and bus­oriented transmitters/receivers which provide improved PC board density. The devices have TRI-STATE outputs con­trolled by the Output Enable (OE
) pins. The outputs can sink 64 mA (48 mA mil) and source 15 mA. Input clamp diodes limit high-speed termination effects.
Function Table
Inputs Outputs
OE D
n
O
n
Function
’F827 ’F828
L H H L Transparent L L L H Transparent H X Z Z High Z
HeHIGH Voltage level L
e
LOW Voltage Level
Z
e
High Impedance
X
e
Immaterial
Logic Diagrams
’F827
TL/F/9598– 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
’F828
TL/F/9598– 11
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
Page 4
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Storage Temperature
b
65§Ctoa150§C
Ambient Temperature under Bias
b
55§Ctoa125§C
Junction Temperature under Bias
b
55§Ctoa175§C
Plastic
b
55§Ctoa150§C
V
CC
Pin Potential to
Ground Pin
b
0.5V toa7.0V
Input Voltage (Note 2)
b
0.5V toa7.0V
Input Current (Note 2)
b
30 mA toa5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
e
0V)
Standard Output
b
0.5V to V
CC
TRI-STATE Output
b
0.5V toa5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating Conditions
Free Air Ambient Temperature
Military
b
55§Ctoa125§C
Commercial 0
§
Ctoa70§C
Supply Voltage
Military
a
4.5V toa5.5V
Commercial
a
4.5V toa5.5V
DC Electrical Characteristics
Symbol Parameter
54F/74F
Units V
CC
Conditions
Min Typ Max
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
b
1.2 V Min I
IN
eb
18 mA
V
OH
Output HIGH 54F 10% V
CC
2.4 I
OH
eb
3mA
Voltage 54F 10% V
CC
2.0 I
OH
eb
12 mA
74F 10% V
CC
2.4 V Min I
OH
eb
3mA
74F 10% V
CC
2.0 I
OH
eb
15 mA
74F 5% V
CC
2.7 I
OH
eb
3mA
V
OL
Output LOW 54F 10% V
CC
0.55 V Min
I
OL
e
48 mA
Voltage 74F 10% V
CC
0.55 I
OL
e
64 mA
I
IH
Input HIGH 54F 20.0
mA Max
V
IN
e
2.7V
Current 74F 5.0
I
BVI
Input HIGH Current 54F 100
mA Max
V
IN
e
7.0V
Breakdown Test 74F 7.0
I
CEX
Output HIGH 54F 250
mA Max
V
OUT
e
V
CC
Leakage Current 74F 50
V
ID
Input Leakage
74F 4.75 V 0.0
I
ID
e
1.9 mA
Test All Other Pins Grounded
I
OD
Output Leakage
74F 3.75 mA 0.0
V
IOD
e
150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current
b
0.6 mA Max V
IN
e
0.5V
I
OZH
Output Leakage Current 50 mA Max V
OUT
e
2.7V
I
OZL
Output Leakage Current
b
50 mA Max V
OUT
e
0.5V
I
OS
Output Short-Circuit Current
b
100
b
225 mA Max V
OUT
e
0V
4
Page 5
DC Electrical Characteristics (Continued)
Symbol Parameter
54F/74F
Units V
CC
Conditions
Min Typ Max
I
ZZ
Bus Drainage Test 500 mA 0.0V V
OUT
e
5.25V
I
CCH
Power Supply Current (’F827) 30 45 mA Max V
O
e
HIGH
I
CCL
Power Supply Current (’F827) 60 90 mA Max V
O
e
LOW
I
CCZ
Power Supply Current (’F827) 40 60 mA Max V
O
e
HIGH Z
I
CCH
Power Supply Current (’F828) 14 20 mA Max V
O
e
HIGH
I
CCL
Power Supply Current (’F828) 56 85 mA Max V
O
e
LOW
I
CCZ
Power Supply Current (’F828) 35 50 mA Max V
O
e
HIGH Z
AC Electrical Characteristics
74F 54F 74F
T
A
ea
25§C
T
A,VCC
e
Mil TA,V
CC
e
Com
Symbol Parameter V
CC
ea
5.0V C
L
e
50 pF C
L
e
50 pF
Units
C
L
e
50 pF
Min Typ Max Min Max Min Max
t
PLH
Propagation Delay 1.0 3.0 5.5 1.0 7.5 1.0 6.5
ns
t
PHL
Data to Output (’F827) 1.5 3.3 5.5 1.5 7.0 1.5 6.0
t
PLH
Propagation Delay 1.0 3.0 5.0 1.0 5.5
ns
t
PHL
Data to Output (’F828) 1.0 2.0 4.0 1.0 4.0
t
PZH
Output Enable Time 3.0 5.7 9.0 2.5 10.0 2.5 9.5
ns
t
PZL
OE to O
n
3.5 6.8 11.5 3.0 12.5 3.0 12.0
t
PHZ
Output Disable Time 1.5 3.3 8.0 1.5 9.0 1.5 8.5
ns
t
PLZ
OE to O
n
1.0 3.5 8.0 1.0 9.0 1.0 8.5
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows:
74F 827/828 S C X
Temperature Range Family Special Variations
74F
e
Commercial XeDevices shipped in 13×reel
54F
e
Military
Temperature Range
Device Type CeCommercial (0§Ctoa70§C)
M
e
Military (b55§Ctoa125§C)
Package Code
SP
e
Slim Plastic DIP
SD
e
Slim Ceramic DIP
F
e
Flatpak
L
e
Leadless Chip Carrier (LCC)
S
e
Small Outline (SOIC)
5
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Physical Dimensions inches (millimeters)
28-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E28A
24-Lead (0.300×Wide) Ceramic Dual-In-Line Package (SD)
NS Package Number J24F
6
Page 7
Physical Dimensions inches (millimeters) (Continued)
24-Lead Small Outline Integrated Circuit (S)
NS Package Number M24B
24-Lead Plastic Slim (0.300×Wide) Dual-In-Line Package (SP)
NS Package Number N24C
7
Page 8
54F/74F827
#
74F828 10-Bit Buffers/Line Drivers
Physical Dimensions inches (millimeters) (Continued)
24-Lead Ceramic Flatpak (F)
NS Package Number W24C
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