Datasheet 54F544SDMQB, 54F544LMQB Datasheet (NSC)

54F/74F544
Octal Registered Transceiver

54F/74F544 Octal Registered Transceiver

December 1994

General Description

The ’F544 octal transceiver contains two sets of D-type
latches for temporary storage of data flowing in either direc­tion. Separate Latch Enable and Output Enable inputs are
provided for each register to permit independent control of
inputting and outputting in either direction of data flow. The
A outputs are guaranteed to sink 24 mA (20 mA Mil) while
the B outputs are rated for 64 mA (48 mA Mil). The ’F544

Features

Y

8-bit octal transceiver

Y

Back-to-back registers for storage

Y

Separate controls for data flow in each direction

Y

A outputs sink 24 mA (20 mA Mil), B outputs sink
64 mA (48 mA Mil)

Y

300 mil slim PDIP

inverts data in both directions.

Commercial Military

Package

Number

Package Description

74F544SPC N24C 24-Lead (0.300×Wide) Molded Dual-In-Line

54F544DM (Note 2) J24A 24-Lead Ceramic Dual-In-Line

54F544SDM (Note 2) J24F 24-Lead (0.300×Wide) Ceramic Dual-In-Line

74F544SC (Note 1) M24B 24-Lead (0.300×Wide) Molded Small Outline, JEDEC

74F544MSA (Note 1) MSA24 24-Lead Molded Shrink Small Outline, EIAJ, Type II

54F544FM (Note 2) W24C 24-Lead Cerpack

54F544LM (Note 2) E28A 24-Lead Ceramic Leadless Chip Carrier, Type C

Note 1: Devices also available in 13×reel. Use suffixeSCX and MSAX.

Note 2: Military grade device with environmental and burn-in processing. Use suffix

e

DMQB, FMQB and LMQB

Logic Symbols

IEEE/IEC

TL/F/9555– 2

TL/F/9555– 1

TRI-STATEÉis a registered trademark of National Semiconductor Corporation.

C

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

TL/F/9555

Connection Diagrams

Pin Assignment for

DIP, SOIC and Flatpak

TL/F/9555– 3

Unit Loading/Fan Out

54F/74F

Pin Names Description

OEAB A-to-B Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA
OEBA
CEAB

B-to-A Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA

A-to-B Enable Input (Active LOW) 1.0/2.0 20 mA/b1.2 mA
CEBA B-to-A Enable Input (Active LOW) 1.0/2.0 20 m A/b1.2 mA
LEAB

A-to-B Latch Enable Input (Active LOW) 1.0/1.0 20 m A/b0.6 mA
LEBA B-to-A Latch Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA
A

B

0–A7

0–B7

A-to-B Data Inputs or 3.5/1.083 70 mA/b650 mA

B-to-A TRI-STATE Outputs 150/40(33.3)

B-to-A Data Inputs or 3.5/1.083 70 mA/b650 mA

A-to-B TRI-STATE Outputs 600/106.6(80)

U.L. Input I

HIGH/LOW Output IOH/I

b

3 mA/24 mA (20 mA)

b

12 mA/64 mA (48 mA)

IH/IIL

Pin Assignment

for LCC

TL/F/9555– 4

OL

Functional Description

The ’F544 contains two sets of eight D-type latches, with
separate input and output controls for each set. For data
flow from A to B, for example, the A-to-B Enable (CEAB
input must be LOW in order to enter data from A
take data from B
Table. With CEAB
Enable (LEAB

, as indicated in the Data I/O Control

0–B7

LOW, a LOW signal on the A-to-B Latch

) input makes the A-to-B latches transparent;
a subsequent LOW-to-HIGH transition of the LEAB
puts the A latches in the storage mode and their outputs no
longer change with the A inputs. With CEAB
LOW, the TRI-STATE

B output buffers are active and re-

É

flect the data present at the output of the A latches. Control
of data flow from B to A is similar, but using the CEBA
LEBA

and OEBA inputs.

0–A7

signal

and OEAB both

Data I/O Control Table

)

or

Inputs

CEAB LEAB OEAB

Latch Status Output Buffers

H X X Latched High Z

X H X Latched Ð
L L X Transparent Ð
X X H Ð High Z
L X L Ð Driving

HeHIGH Voltage Level

e

L

,

LOW Voltage Level

e

X

Immaterial

A-to-B data flow shown; B-to-A flow control is the same,
except using CEBA

, LEBA and OEBA

2

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

TL/F/9555– 5

3

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Storage Temperature

Ambient Temperature under Bias

Junction Temperature under Bias

Plastic

Pin Potential to

V

CC

Ground Pin

Input Voltage (Note 2)

Input Current (Note 2)

Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

b

65§Ctoa150§C

b

55§Ctoa125§C

b

55§Ctoa175§C

b

55§Ctoa150§C

b

0.5V toa7.0V

b

0.5V toa7.0V

b

30 mA toa5.0 mA

DC Electrical Characteristics

Symbol Parameter

V

V

V

V

V

I

IH

I

BVI

I

BVIT

I

CEX

V

I

OD

I

IL

I

IH

I

IL

IH

IL

CD

OH

OL

ID

a

a

Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

Input LOW Voltage 0.8 V Recognized as a LOW Signal

Input Clamp Diode Voltage

Output HIGH 54F 10% V
Voltage 54F 10% V

Output LOW 54F 10% V
Voltage 54F 10% V

Input HIGH 54F 20.0
Current 74F 5.0

Input HIGH Current 54F 100
Breakdown Test 74F 7.0

Input HIGH Current 54F 1.0
Breakdown (I/O) 74F 0.5

Output HIGH 54F 250
Leakage Current 74F 250

Input Leakage
Test All Other Pins Grounded

Output Leakage
Circuit Current All Other Pins Grounded

Input LOW Current

I

Output Leakage Current 70 mA Max V

OZH

I

Output Leakage Current

OZL

54F 10% V
74F 10% V
74F 10% V
74F 10% V
74F 5% V
74F 5% V

74F 10% V
74F 10% V

74F 4.75 V 0.0

74F 3.75 mA 0.0

Min Typ Max

CC

CC

CC

CC

CC

CC

CC

CC

CC

CC

CC

CC

Voltage Applied to Output

in HIGH State (with V
Standard Output

CC

e

TRI-STATE Output

Current Applied to Output

in LOW State (Max) twice the rated I

Recommended Operating
Conditions

Free Air Ambient Temperature

Military
Commercial 0

Supply Voltage

Military
Commercial

54F/74F

2.5 I

2.4 I

2.0 I

2.5

2.4 I

2.0 I

2.7 I

2.7 I

b

Units V

b

1.2 V Min

CC

V Min

0.5 I

0.55

0.5 I

V Min

0.55 I

mA Max

mA Max

mA Max

mA Max

b

0.6

b

mA Max

1.2 V

650 mA Max V

0V)

Conditions

eb

18 mA,

I

IN

(except A

n,Bn

eb

1mA(An)

OH

eb

3mA(An,Bn)

OH

eb

12 mA (Bn)

OH

eb

I

1mA(An)

OH

eb

3mA(An,Bn)

OH

eb

15 mA (Bn)

OH

eb

1mA(An)

OH

eb

3mA(An,Bn)

OH

e

20 mA (An)

OL

e

I

48 mA (Bn)

OL

e

24 mA (An)

OL

e

64 mA (Bn)

OL

e

V

2.7V (except An,Bn)

IN

e

V

7.0V (except An,Bn)

IN

e

V

5.5V (An,Bn)

IN

e

V

VCC(An,Bn)

OUT

e

I

1.9 mA

ID

e

V

150 mV

IOD

e

V

0.5V (OEAB, OEBA)

IN

e

0.5V (CEAB, CEBA)

IN

e

2.7V (An,Bn)

OUT

e

0.5V (An,Bn)

OUT

b

0.5V to V

b

0.5V toa5.5V

OL

b

55§Ctoa125§C

Ctoa70§C

§

a

4.5V toa5.5V

a

4.5V toa5.5V

)

CC

(mA)

4

DC Electrical Characteristics (Continued)

Symbol Parameter

I

OS

I

ZZ

I

CCH

I

CCL

I

CCZ

Output Short-Circuit Current

Bus Drainage Test 500 mA 0.0V V

Power Supply Current 70 105 mA Max V

Power Supply Current 85 130 mA Max V

Power Supply Current 83 125 mA Max V

Min Typ Max

b

60

b

100

AC Electrical Characteristics

74F 54F 74F

ea

T

A

Symbol Parameter V

Min Typ Max Min Max Min Max

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Propagation Delay 3.0 7.0 9.5 3.0 12.0 3.0 10.5
Transparent Mode 3.0 5.0 6.5 2.5 8.5 3.0 7.5 ns
A

to Bnor Bnto A

n

n

Propagation Delay 6.0 10.0 13.0 6.0 18.0 6.0 14.5
LEBA to A

n

4.0 7.0 9.5 4.0 11.5 4.0 10.5

Propagation Delay 6.0 10.0 13.0 6.0 18.0 6.0 14.5
LEAB to B

n

4.0 7.0 9.5 4.0 11.5 4.0 10.5

Output Enable Time 3.0 7.0 9.0 3.0 11.0 3.0 10.0
OEBA or OEAB to Anor B
CEBA

or CEAB to Anor B

4.0 7.5 10.5 4.0 13.0 4.0 12.0

n

n

Output Disable Time 1.0 6.0 8.0 2.0 10.0 1.0 9.0
OEBA or OEAB to Anor B
CEBA

or CEAB to Anor B

2.5 5.5 10.5 2.0 9.5 2.5 11.5

n

n

CC

C

L

ea

e

54F/74F

25§C

5.0V

50 pF

Units V

b

150

b

225 V

mA Max

T

A,VCC

e

C

50 pF C

L

CC

e

Mil TA,V

V

OUT

OUT

OUT

O

O

O

CC

e

L

Conditions

e

0V (An)

e

0V (Bn)

e

5.25V (An,Bn)

e

HIGH

e

LOW

e

HIGH Z

e

Com

50 pF

Units

ns

ns

ns

AC Operating Requirements

74F 54F 74F

ea

25§C

T

Symbol Parameter

A

ea

CC

5.0V

V

Min Max Min Max Min Max

ts(H) Setup Time, HIGH or LOW 3.0 3.0 3.0
t

(L) Anor Bnto LEBA or LEAB 3.0 3.0 3.0

s

th(H) Hold Time, HIGH or LOW 3.0 3.0 3.0
t

(L) Anor Bnto LEBA or LEAB 3.0 3.0 3.0

h

tw(L) Latch Enable, B to A

Pulse Width, LOW

6.0 9.0 7.5 ns

5

T

A,VCC

e

Mil TA,V

e

Com Units

CC

ns

Ordering Information

The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:

74F 544 S C X

Temperature Range Family Special Variations

e

74F

Commercial QBeMilitary grade device with

e

54F

Military environmental and burn-in

Device Type

Package Code

e

Slim Plastic DIP

SP

e

Ceramic DIP

D

e

Slim Ceramic DIP

SD

e

F

Flatpak

e

L

Leadless Chip Carrier (LCC)

e

S

Small Outline (SOIC)

e

MSA

Shrink Small Outline (SOIC) EIAJ, Type II

processing

e

Devices shipped in 13×reel

X

Temperature Range

e

Commercial (0§Ctoa70§C)

C

e

Military (b55§Ctoa125§C)

M

6

Physical Dimensions inches (millimeters)

28-Lead Ceramic Leadless Chip Carrier (L)

NS Package Number E28A

24-Lead Ceramic Dual-In-Line Package (D)

NS Package Number J24A

7

Physical Dimensions inches (millimeters) (Continued)

24-Lead (0.300×Wide) Ceramic Dual-In-Line Package (SD)

24-Lead (0.300×Wide) Molded Small Outline Package, JEDEC (S)

NS Package Number J24F

NS Package Number M24B

8

Physical Dimensions inches (millimeters) (Continued)

24-Lead Molded Shrink Small Outline, EIAJ, Type II (MSA)

24-Lead (0.300×Wide) Molded Dual-In-Line Package (SP)

NS Package Number MSA24

NS Package Number N24C

9

Physical Dimensions inches (millimeters) (Continued)

24-Lead Ceramic Flatpak (F)

NS Package Number W24C

54F/74F544 Octal Registered Transceiver

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:

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systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.

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