Datasheet 5962-8607101DA, 5962-8607101CA, 5962-86071012A, 54F164ADM Datasheet (NSC)

TL/F/10613

54F/74F164A Serial-In, Parallel-Out Shift Register

January 1995

54F/74F164A
Serial-In, Parallel-Out Shift Register

General Description

The ’F164A is a high-speed 8-bit serial-in/parallel-out shift
register. Serial data is entered through a 2-input AND gate
synchronous with the LOW-to-HIGH transition of the clock.
The device features an asynchronous Master Reset which
clears the register, setting all outputs LOW independent of
the clock. The ’F164A is a faster version of the ’F164.

Features

Y

Typical shift frequency of 90 MHz

Y

Asynchronous Master Reset

Y

Gated serial data input

Y

Fully synchronous data transfers

Y

Guaranteed 4000V min ESD protection

Y

’F164A is a faster version of the ’F164

Commercial Military

Package

Package Description

Number

74F164APC N14A 14-Lead (0.300×Wide) Molded Dual-In-Line

54F164ADM (Note 2) J14A 14-Lead Ceramic Dual-In-Line

74F164ASC (Note 1) M14A 14-Lead (0.150×Wide) Molded Small Outline, JEDEC

74F164ASJ (Note 1) M14D 14-Lead (0.300×Wide) Molded Small Outline, EIAJ

74F164AFM (Note 2) W14B 14-Lead Cerpack

74F164ALM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C

Note 1: Devices also available in 13×reel. Use suffixeSCX and SJX.

Note 2: Military grade device with environmental and burn-in processing. Use suffix

e

DMQB, FMQB and LMQB.

Logic Symbols

TL/F/10613– 1

IEEE/IEC

TL/F/10613– 4

TRI-STATEÉis a registered trademark of National Semiconductor Corporation.

C

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

Connection Diagrams

Pin Assignment for

DIP, SOIC and Flatpak

TL/F/10613– 2

Pin Assignment

for LCC

TL/F/10613– 3

Unit Loading/Fan Out

54F/74F

Pin Names Description

U.L. Input I

IH/IIL

HIGH/LOW Output IOH/I

OL

A, B Data Inputs 1.0/1.0 20 mA/b0.6 mA
CP Clock Pulse Input (Active Rising Edge) 1.0/1.0 20 mA/

b

0.6 mA

MR

Master Reset Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA

Q0–Q

7

Outputs 50/33.3

b

1 mA/20 mA

Functional Description

The ’F164A is an edge-triggered 8-bit shift register with seri­al data entry and an output from each of the eight stages.
Data is entered serially through one of two inputs (A or B);
either of these inputs can be used as an active HIGH En­able for data entry through the other input. An unused input
must be tied HIGH.

Each LOW-to-HIGH transition on the Clock (CP) input shifts
data one place to the right and enters into Q

0

the logical

AND of the two data inputs (A

#

B) that existed before the

rising clock edge. A LOW level on the Master Reset (MR

)
input overrides all other inputs and clears the register asyn­chronously, forcing all Q outputs LOW.

Mode Select Table

Operating

Inputs Outputs

Mode

MR

ABQ0Q1–Q

7

Reset (Clear) L X X L L-L

HllLq

0–q6

Shift

HlhLq

0–q6

HhlL q0–q

6

HhhHq0–q

6

H(h)eHIGH Voltage Levels
L(l)

e

LOW Voltage Levels

X

e

Immaterial

q

n

e

Lower case letters indicate the state of the referenced input or output

one setup time prior to the LOW-to-HIGH clock transition.

Logic Diagram

TL/F/10613– 5

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

2

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Storage Temperature

b

65§Ctoa150§C

Ambient Temperature under Bias

b

55§Ctoa125§C

Junction Temperature under Bias

b

55§Ctoa175§C

Plastic

b

55§Ctoa150§C

V

CC

Pin Potential to

Ground Pin

b

0.5V toa7.0V

Input Voltage (Note 2)

b

0.5V toa7.0V

Input Current (Note 2)

b

30 mA toa5.0 mA

Voltage Applied to Output

in HIGH State (with V

CC

e

0V)

Standard Output

b

0.5V to V

CC

TRI-STATEÉOutput

b

0.5V toa5.5V

Current Applied to Output

in LOW State (Max) twice the rated I

OL

(mA)

ESD Last Passing Voltage (Min) 4000V

Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

Recommended Operating
Conditions

Free Air Ambient Temperature

Military

b

55§Ctoa125§C

Commercial 0

§

Ctoa70§C

Supply Voltage

Military

a

4.5V toa5.5V

Commercial

a

4.5V toa5.5V

DC Electrical Characteristics

Symbol Parameter

54F/74F

Units V

CC

Conditions

Min Typ Max

V

IH

Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

V

IL

Input LOW Voltage 0.8 V Recognized as a LOW Signal

V

CD

Input Clamp Diode Voltage

b

1.2 V Min I

IN

eb

18 mA

V

OH

Output HIGH 54F 10% V

CC

2.5 I

OH

eb

1mA

Voltage 74F 10% V

CC

2.5 V Min I

OH

eb

1mA

74F 5% V

CC

2.7 I

OH

eb

1mA

V

OL

Output LOW 54F 10% V

CC

0.5
V Min

I

OL

e

20 mA

Voltage 74F 10% V

CC

0.5 I

OL

e

20 mA

I

IH

Input HIGH 54F 20.0

mA Max V

IN

e

2.7V

Current 74F 5.0

I

BVI

Input HIGH Current 54F 100

mA Max V

IN

e

7.0V

Breakdown Test 74F 7.0

I

CEX

Output HIGH 54F 250

mA Max V

OUT

e

V

CC

Leakage Current 74F 50

V

ID

Input Leakage

74F 4.75 V 0.0

I

ID

e

1.9 mA

Test All other pins grounded

I

OD

Output Leakage

74F 3.75 mA 0.0

V

IOD

e

150 mV

Circuit Current All other pins grounded

I

IL

Input LOW Current

b

0.6 mA Max V

IN

e

0.5V

I

OS

Output Short-Circuit Current

b

60

b

150 mA Max V

OUT

e

0V

I

CC

Power Supply Current

35 55 mA Max

CPeHIGH
MR

e

GND, A, BeGND

3

AC Electrical Characteristics

74F 54F 74F

T

A

ea

25§C

T

A,VCC

e

Mil TA,V

CC

e

Com

Symbol Parameter V

CC

ea

5.0V
C

L

e

50 pF C

L

e

50 pF

Units

C

L

e

50 pF

Min Typ Max Min Max Min Max

f

max

Maximum Clock Frequency 80 120 60 80 MHz

t

PLH

Propagation Delay 3.0 4.8 7.5 2.5 9.0 3.0 7.5

ns

t

PHL

CP to Q

n

3.5 5.0 8.0 3.0 8.5 3.5 8.0

t

PHL

Propagation Delay

5.0 7.0 10.0 4.0 12.5 5.0 10.5 ns

MR

to Q

n

AC Operating Requirements

74F 54F 74F

Symbol Parameter

T

A

ea

25§C

T

A,VCC

e

Mil TA,V

CC

e

Com Units

V

CC

ea

5.0V

Min Max Min Max Min Max

ts(H) Setup Time, HIGH or LOW 4.5 5.5 4.5
t

s

(L) A or B to CP 4.0 4.0 4.0

ns

th(H) Hold Time, HIGH or LOW 1.0 1.0 1.0
t

h

(L) A or B to CP 1.0 1.0 1.0

tw(H) CP Pulse Width 4.0 4.0 4.0

ns

t

w

(L) HIGH or LOW 7.0 7.0 7.0

tw(L) MR Pulse Width, LOW 4.0 5.0 4.0 ns

t

rec

Recovery Time

5.0 6.5 5.0 ns

MR to CP

Ordering Information

The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:

74F 164A S C X

Temperature Range Family Special Variations

74F

e

Commercial QBeMilitary grade device with

54F

e

Military environmental and burn-in

processing

Device Type

X

e

Devices shipped in 13×reel

Package Code

Temperature Range

P

e

Plastic DIP

C

e

Commercial (0§Ctoa70§C)

D

e

Ceramic DIP

M

e

Military (b55§Ctoa125§C)

S

e

Small Outline Package SOIC JEDEC

SJ

e

Small Outline SOIC EIAJ

L

e

Package Leadless Chip Carrier (LCC)

F

e

Flatpak

4

Physical Dimensions inches (millimeters)

20-Lead Ceramic Leadless Chip Carrier, Type C (L)

NS Package Number E20A

14-Lead Ceramic Dual-In-Line Package (D)

NS Package Number J14A

5

Physical Dimensions inches (millimeters) (Continued)

14-Lead (0.150×Wide) Molded Small Outline Package, JEDEC (S)

NS Package Number M14A

6

Physical Dimensions inches (millimeters) (Continued)

14-Lead (0.300×Wide) Molded Small Outline Package, EIAJ (SJ)

NS Package Number M14D

14-Lead (0.300×Wide) Plastic Dual-In-Line Package (P)

NS Package Number N14A

7

54F/74F164A Serial-In, Parallel-Out Shift Register

Physical Dimensions inches (millimeters) (Continued)

14-Lead Cerpack (F)

NS Package Number W14B

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.

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