Datasheet 54F157ALMQB, 54F157AFMQB, 54F157ADMQB Datasheet (NSC)

54F/74F157A
Quad 2-Input Multiplexer

54F/74F157A Quad 2-Input Multiplexer

November 1994

General Description

The ’F157A is a high-speed quad 2-input multiplexer. Four
bits of data from two sources can be selected using the
common Select and Enable inputs. The four outputs present
the selected data in the true (non-inverted) form. The
’F157A can also be used to generate any four of the 16
different functions to two variables.

Commercial Military

74F157APC N16E 16-Lead (0.300×Wide) Molded Dual-In-Line

54F157ADM (Note 2) J16A 16-Lead Ceramic Dual-In-Line

74F157ASC (Note 1) M16A 16-Lead (0.150×Wide) Molded Small Outline, JEDEC

74F157ASJ (Note 1) M16D 16-Lead (0.300×Wide) Molded Small Outline, EIAJ

54F157AFM (Note 2) W16A 16-Lead Cerpack

54F157ALM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C

Note 1: Devices also available in 13×reel. Use suffixeSCX and SJX.

Note 2: Military grade device with environmental and burn-in processing. Use suffix

Package

Logic Symbols

Pin Assignment

for DIP, SOIC and Flatpak

Number

Features

Y

Guaranteed 4000V minimum ESD protection

Package Description

e

DMQB, FMQB and LMQB.

Connection Diagrams

Pin Assignment

for LCC

TL/F/9483– 3

IEEE/IEC

TL/F/9483– 1

TL/F/9483– 5

TRI-STATEÉis a registered trademark of National Semiconductor Corporation.

C

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

TL/F/9483

TL/F/9483– 2

Unit Loading/Fan Out

54F/74F

Pin Names Description

I0a–I
I

1a–I1d

E

0d

Source 0 Data Inputs 1.0/1.0 20 mA/b0.6 mA
Source 1 Data Inputs 1.0/1.0 20 mA/b0.6 mA
Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA

U.L. Input I

HIGH/LOW Output IOH/I

IH/IIL

S Select Input 1.0/1.0 20 mA/b0.6 mA
Z

a–Zd

Outputs 50/33.3

b

1 mA/20 mA

Functional Description

The ’F157A is a quad 2-input multiplexer. It selects four bits
of data from two sources under the control of a common
Select input (S). The Enable input (E
E

is HIGH, all of the outputs (Z) are forced LOW regardless

) is active LOW. When

of all other inputs. The ’F157A is the logic implementation of
a 4-pole, 2-position switch where the position of the switch
is determined by the logic levels supplied to the Select in­put. The logic equations for the outputs are shown below:

e

Z

E#(I1nSaI0nS)

n

A common use of the ’F157A is the moving of data from two
groups of registers to four common output busses. The par­ticular register from which the data comes is determined by
the state of the Select input. A less obvious use is as a
function generator. The ’F157A can generate any four of the

16 different functions of two variables with one variable
common. This is useful for implementing highly irregular
logic.

Truth Table

E SI

HXXX L
LHXL L
LHXH H
LLLX L
LLHX H

e

H

HIGH Voltage Level

e

LOW Voltage Level

L

e

Immaterial

X

Logic Diagram

OL

Inputs Output

0

I

1

Z

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

2

TL/F/9483– 4

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Storage Temperature

Ambient Temperature under Bias

Junction Temperature under Bias

Plastic

Pin Potential to

V

CC

Ground Pin

Input Voltage (Note 2)

Input Current (Note 2)

Voltage Applied to Output

in HIGH State (with V
Standard Output

CC

e

TRI-STATEÉOutput

0V)

b

65§Ctoa150§C

b

55§Ctoa125§C

b

55§Ctoa175§C

b

55§Ctoa150§C

b

0.5V toa7.0V

b

0.5V toa7.0V

b

30 mA toa5.0 mA

b

0.5V to V

b

0.5V toa5.5V

Current Applied to Output

in LOW State (Max) twice the rated I

(mA)

OL

ESD Last Passing Voltage (Min) 4000V

Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Symbol Parameter

V

V

V

V

V

I

IH

I

BVI

I

CEX

V

I

OD

I

IL

I

OS

I

CCH

I

CCL

IH

IL

CD

OH

OL

ID

Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

Input LOW Voltage 0.8 V Recognized as a LOW Signal

Input Clamp Diode Voltage

Output HIGH 54F 10% V
Voltage 74F 10% V

Output LOW 54F 10% V
Voltage 74F 10% V

Input HIGH 54F 20.0
Current 74F 5.0

Input HIGH Current 54F 100
Breakdown Test 74F 7.0

Output HIGH 54F 250
Leakage Current 74F 50

Input Leakage
Test All Other Pins Grounded

Output Leakage
Circuit Current All Other Pins Grounded

Input LOW Current

Output Short-Circuit Current

Power Supply Current 15 23 mA Max V

Power Supply Current 15 23 mA Max V

74F 5% V

74F 4.75 V 0.0

74F 3.75 mA 0.0

Min Typ Max

2.5 I

CC

2.5 V Min I

CC

2.7 I

CC

CC

CC

b

CC

60

Recommended Operating
Conditions

Free Air Ambient Temperature

Military
Commercial 0

Supply Voltage

Military
Commercial

54F/74F

b

Units V

b

1.2 V Min I

0.5

0.5 I

CC

V Min

mA Max

mA Max

mA Max

b

0.6 mA Max V

150 mA Max V

I

V

V

V

I

V

IN

OH

OH

OH

OL

OL

ID

IN

IN

OUT

IOD

IN

OUT

O

O

eb

eb

eb

eb

e

e

e

e

e

e

1.9 mA

e

e

e

e

e

20 mA
20 mA

2.7V

7.0V

0.5V

HIGH

LOW

b

55§Ctoa125§C

Ctoa70§C

§

a

4.5V toa5.5V

a

4.5V toa5.5V

Conditions

18 mA

1mA
1mA
1mA

V

CC

150 mV

0V

3

AC Electrical Characteristics

74F 54F 74F

ea

T

25§C

Symbol Parameter V

CC

C

A

L

ea

e

50 pF

5.0V

e

T

A,VCC

e

C

50 pF C

L

Mil TA,V

e

Com

CC

e

50 pF

L

Units

Min Typ Max Min Max Min Max

t
t

t
t

t
t

PLH

PHL

PLH

PHL

PLH

PHL

Propagation Delay 4.0 7.0 10.0 4.0 12.0 4.0 11.0
StoZ

n

3.0 5.0 7.0 3.0 9.0 3.0 8.0

Propagation Delay 5.0 7.0 9.5 5.0 13.0 5.0 11.0
E to Z

n

2.5 4.5 6.5 2.5 7.5 2.5 7.0

Propagation Delay 2.5 4.5 6.0 2.5 7.5 2.5 6.5
Into Z

n

2.5 4.0 5.5 1.5 7.5 2.0 7.0

ns

ns

ns

Ordering Information

The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:

74F 157A S C X

Temperature Range Family Special Variations

e

74F

Commercial QBeMilitary grade device with

e

54F

Military environmental and burn-in

Device Type

Package Code

e

Plastic DIP

P

e

Ceramic DIP

D

e

Flatpak

F

e

L

Leadless Chip Carrier (LCC)

e

S

Small Outline SOIC JEDEC

e

SJ

Small Outline SOIC EIAJ

processing

e

Devices shipped in 13×reel

X

Temperature Range

e

Commercial (0§Ctoa70§C)

C

e

Military (b55§Ctoa125§C)

M

4

Physical Dimensions inches (millimeters)

20-Lead Ceramic Leadless Chip Carrier (L)

NS Package Number E20A

16-Lead Ceramic Dual In-Line Package (D)

NS Package Number J16A

5

Physical Dimensions inches (millimeters) (Continued)

16-Lead (0.150×Wide) Molded Small Outline Package, JEDEC (S)

NS Package Number M16A

6

Physical Dimensions inches (millimeters) (Continued)

16-Lead (0.300×Wide) Molded Small Outline Package, EIAJ (SJ)

16-Lead (0.300×Wide) Molded Dual In-Line Package (P)

NS Package Number M16D

NS Package Number N16E

7

Physical Dimensions inches (millimeters) (Continued)

54F/74F157A Quad 2-Input Multiplexer

16-Lead Ceramic Flatpak (F)

NS Package Number W16A

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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:

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systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.

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