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54AC253•54ACT253
Dual 4-Input Multiplexer with TRI-STATE
®
Outputs
General Description
The ’AC/’ACT253 is a dual 4-input multiplexer with
TRI-STATE outputs. It can select two bits of data from four
sources using common select inputs. The outputs may be individually switched to a high impedance state with a HIGH
on the respective Output Enable (OE) inputs, allowing the
outputs to interface directly with bus oriented systems.
Features
n ICCand IOZreduced by 50
%
n Multifunction capability
n Noninverting TRI-STATE outputs
n Outputs source/sink 24 mA
n ’ACT253 has TTL-compatible inputs
n Standard Military Drawing (SMD)
—’AC253: 5962-87693
—’ACT253: 5962-87761
Logic Diagrams
Pin Names Description
I
0a–I3a
Side A Data Inputs
I
0b–I3b
Side B Data Inputs
S
0,S1
Common Select Inputs
OE
a
Side A Output Enable Input
OE
b
Side B Output Enable Input
Z
a,Zb
TRI-STATE Outputs
TRI-STATE®is a registered trademarkof National Semiconductor Corporation.
FACT
®
is a registered trademark of Fairchild Semiconductor Corporation.
DS100285-1
IEEE/IEC
DS100285-2
August 1998
54AC253
•
54ACT253 Dual 4-Input Multiplexer with TRI-STATE Outputs
© 1998 National Semiconductor Corporation DS100285 www.national.com
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Connection Diagrams
Functional Description
The ’AC/’ACT253 contains two identical 4-input multiplexers
with TRI-STATE outputs. They select two bits from four
sources selected by common Select inputs (S
0,S1
). The
4-input multiplexers have individual Output Enable (OE
a
,
OEb) inputs which, when HIGH, force the outputs to a high
impedance (High Z) state. This device is the logic implementation of a 2-pole, 4-position switch, where the position of the
switch is determined by the logic levels supplied to the two
select inputs. The logic equations for the outputs are shown:
Z
a
=
OE
a
•
(I
0a
•
S
1
•
S0+I
1a
•
S
1
•
S0+
I
2a
•
S
1
•
S0+I
3a
•
S
1
•
S0)
Z
b
=
OE
b
•
(I
0b
•
S
1
•
S0+I
1b
•
S
1
•
S0+
I
2b
•
S
1
•
S0+I
3b
•
S
1
•
S0)
If the outputs of TRI-STATE devices are tied together, all but
one device must be in the high impedance state to avoid
high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to
TRI-STATE devices whose outputs are tied together are designed so that there is no overlap.
Truth Table
Select Data Inputs Output Outputs
Inputs Enable
S
0
S
1
I0I1I2I
3
OE Z
X X XXXX H Z
L L LXXX L L
L L HXXX L H
H L XLXX L L
H L XHXX L H
L H XXLX L L
L H XXHX L H
H H XXXL L L
H H XXXH L H
Address Inputs S0and S1are common to both sections.
H=HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial
Z=High Impedance
Pin Assignment
for DIP and Flatpak
DS100285-3
Pin Assignment
for LCC
DS100285-4
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Logic Diagram
DS100285-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V −20 mA
V
I
=
V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to VCC+ 0.5V
DC Output Diode Current (I
OK
)
V
O
=
−0.5V −20 mA
V
O
=
V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC+ 0.5V
DC Output Source
or Sink Current (I
O
)
±
50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
±
50 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
Junction Temperature (T
J
)
CDIP 175˚C
Recommended Operating
Conditions
Supply Voltage (VCC)
’AC 2.0V to 6.0V
’ACT 4.5V to 5.5V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (VO) 0VtoV
CC
Operating Temperature (TA)
54AC/ACT −55˚C to +125˚C
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
V
IN
from 30%to 70%of V
CC
V
CC
@
3.3V, 4.5V, 5.5V 125 mV/ns
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@
4.5V, 5.5V 125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recommend operation of FACT
®
circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
54AC
Symbol Parameter V
CC
T
A
=
Units Conditions
(V) −55˚C to +125˚C
Guaranteed Limits
V
IH
Minimum High Level 3.0 2.1 V
OUT
=
0.1V
Input Voltage 4.5 3.15 V or V
CC
− 0.1V
5.5 3.85
V
IL
Maximum Low Level 3.0 0.9 V
OUT
=
0.1V
Input Voltage 4.5 1.35 V or V
CC
− 0.1V
5.5 1.65
V
OH
Minimum High Level 3.0 2.9 I
OUT
=
−50 µA
Output Voltage 4.5 4.4 V
5.5 5.4
(Note 2)
V
IN
=
V
IL
or V
IH
3.0 2.4 I
OH
=
−12 mA
4.5 3.7 V I
OH
=
−24 mA
5.5 4.7 I
OH
=
−24 mA
V
OL
Maximum Low Level 3.0 0.1 I
OUT
=
50 µA
Output Voltage 4.5 0.1 V
5.5 0.1
(Note 2)
V
IN
=
V
IL
or V
IH
3.0 0.50 I
OL
=
12 mA
4.5 0.50 V I
OL
=
24 mA
5.5 0.50 I
OL
=
24 mA
I
IN
Maximum Input 5.5
±
1.0 µA V
I
=
V
CC
, GND
Leakage Current
I
OZ
Maximum TRI-STATE VI(OE)=VIL,V
IH
Current 5.5
±
5.0 µA V
I
=
V
CC
, GND
V
O
=
V
CC
, GND
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DC Characteristics for ’AC Family Devices (Continued)
54AC
Symbol Parameter V
CC
T
A
=
Units Conditions
(V) −55˚C to +125˚C
Guaranteed Limits
(Note 3)
I
OLD
Minimum Dynamic 5.5 50 mA V
OLD
=
1.65V Max
I
OHD
Output Current 5.5 −50 mA V
OHD
=
3.85V Min
I
CC
Maximum Quiescent 5.5 80.0 µA V
IN
=
V
CC
Supply Current or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: I
IN
and I
CC
@
3.0V are guaranteed to be less than or equal to the respective [email protected] VCC.
I
CC
for 54AC@25˚C is identical to 74AC@25˚C.
DC Characteristics for ’ACT Family Devices
54ACT
Symbol Parameter V
CC
T
A
=
Units Conditions
(V) −55˚C to +125˚C
Guaranteed Limits
V
IH
Minimum High Level 4.5 2.0 V V
OUT
=
0.1V
Input Voltage 5.5 2.0 or V
CC
− 0.1V
V
IL
Maximum Low Level 4.5 0.8 V V
OUT
=
0.1V
Input Voltage 5.5 0.8 or V
CC
− 0.1V
V
OH
Minimum High Level 4.5 4.4 V I
OUT
=
−50 µA
Output Voltage 5.5 5.4
(Note 5)
V
IN
=
V
IL
or V
IH
4.5 3.70 V I
OH
=
−24 mA
5.5 4.70 I
OH
=
−24 mA
V
OL
Maximum Low Level 4.5 0.1 V I
OUT
=
50 µA
Output Voltage 5.5 0.1
(Note 5)
V
IN
=
V
IL
or V
IH
4.5 0.50 V I
OL
=
24 mA
5.5 0.50 I
OL
=
24 mA
I
IN
Maximum Input 5.5
±
1.0 µA V
I
=
V
CC
, GND
Leakage Current
I
OZ
Maximum TRI-STATE 5.5
±
5.0 µA V
I
=
V
IL,VIH
Current V
O
=
V
CC
, GND
I
CCT
Maximum 5.5 1.6 mA V
I
=
V
CC
− 2.1V
I
CC
/Input
(Note 6)
I
OLD
Minimum Dynamic 5.5 50 mA V
OLD
=
1.65V Max
I
OHD
Output Current 5.5 −50 mA V
OHD
=
3.85V Min
I
CC
Maximum Quiescent 5.5 80.0 µA V
IN
=
V
CC
Supply Current or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
Note 7: I
CC
for 54ACT@25˚C is identical to 74ACT@25˚C.
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AC Electrical Characteristics
54AC
V
CC
T
A
=
−55˚C Fig.
Symbol Parameter (V) to +125˚C Units No.
(Note 8) C
L
=
50 pF
Min Max
t
PLH
Propagation Delay 3.3 1.0 18.0 ns
S
n
to Z
n
5.0 1.0 12.5
t
PHL
Propagation Delay 3.3 1.0 18.5 ns
S
n
to Z
n
5.0 1.0 13.5
t
PLH
Propagation Delay 3.3 1.0 17.0 ns
I
n
to Z
n
5.0 1.0 11.5
t
PHL
Propagation Delay 3.3 1.0 15.0 ns
I
n
to Z
n
5.0 1.0 11.5
t
PZH
Output Enable Time 3.3 1.0 9.0 ns
5.0 1.0 7.0
t
PZL
Output Enable Time 3.3 1.0 9.5 ns
5.0 1.0 8.0
t
PHZ
Output Disable Time 3.3 1.0 10.5 ns
5.0 1.0 9.0
t
PLZ
Output Disable Time 3.3 1.0 9.5 ns
5.0 1.0 8.0
Note 8: Voltage Range 3.3 is 3.3V±0.3V
Voltage Range 5.0 is 5.0V
±
0.5V
AC Electrical Characteristics
54ACT
V
CC
T
A
=
−55˚C Fig.
Symbol Parameter (V) to +125˚C Units No.
(Note 9) C
L
=
50 pF
Min Max
t
PLH
Propagation Delay 5.0 1.0 14.5 ns
S
n
to Z
n
t
PHL
Propagation Delay 5.0 1.0 16.0 ns
S
n
to Z
n
t
PLH
Propagation Delay 5.0 1.0 12.0 ns
I
n
to Z
n
t
PHL
Propagation Delay 5.0 1.0 13.5 ns
I
n
to Z
n
t
PZH
Output Enable Time 5.0 1.0 9.5 ns
t
PZL
Output Enable Time 5.0 1.0 9.5 ns
t
PHZ
Output Disable Time 5.0 1.0 11.0 ns
t
PLZ
Output Disable Time 5.0 1.0 9.0 ns
Note 9: Voltage Range 5.0 is 5.0V±0.5V
Capacitance
Symbol Parameter Typ Units Conditions
C
IN
Input Capacitance 4.5 pF V
CC
=
OPEN
C
PD
Power Dissipation 50.0 pF V
CC
=
5.0V
Capacitance
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Physical Dimensions inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
16 Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Tel: 1-800-272-9959
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16 Lead Ceramic Flatpak (F)
NS Package Number W16A
54AC253
•
54ACT253 Dual 4-Input Multiplexer with TRI-STATE Outputs
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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