Datasheet 2SK3055 Datasheet (NEC)

DATA SHEET

MOS FIELD EFFECT TRANSISTOR

SWITCHING

N-CHANNEL POWER MOS FET

INDUSTRIAL USE

2SK3055

DESCRIPTION

This product is N-Channel MOS Field Effect Transistor designed for high current switching applications.

FEATURES

• Low On-State Resistance

DS(on)1

R

= 34 mΩ MAX. (VGS = 10 V, ID = 15 A)

DS(on)2

R

= 50 mΩ MAX. (VGS = 4.0 V, ID = 15 A)

iss

• Low C

iss

: C

= 920 pF TYP.

• Built-in Gate Protection Diode

• Isolated TO-220 package

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)

Drain to Source Voltage V Gate to Source Voltage V Gate to Source Voltage V Drain Current (DC) I Drain Current (Pulse) Total Power Dissipation (T Total Power Dissipation (T

Note1

C

= 25°C) P

A

= 25°C) P Channel Temperature T Storage Temperature T Single Avalanche Current Single Avalanche Energy

Note2

DSS

GSS(AC)

GSS(DC)

D(DC)

D(pulse)

I

T

ch

stg

AS

I

AS

E

ORDERING INFORMATION

PART NUMBER PACKAGE

2SK3055

60 V

±20 V

+20, −10 V

±30 A

±100 A

25 W

2.0 W

150 °C

–55 to +150 °C

15 A

22.5 mJ

Isolated TO-220

Notes 1.

2.

PW ≤ 10 Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V → 0 V

µ

s, Duty cycle ≤ 1 %

THERMAL RESISTANCE

Channel to Case R Channel to Ambient R

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

Document No. D13094EJ1V0DS00 (1st edition) Date Published March 1999 NS CP(K) Printed in Japan

th(ch-C)

th(ch-A)

5.0 °C/W

62.5 °C/W

©

1997,1999

ELECTRICAL CHARACTERISTICS (TA = 25 °C)

CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

2SK3055

Drain to Source On-state Resi stance R

Gate to Source Cut-off Voltage V

DS(on)1VGS

DS(on)2VGS

R

GS(off)VDS

= 10 V, ID = 15 A 24 34 m = 4.0 V, ID = 15 A 35 50 m

= 10 V, ID = 1 mA 1.0 1.6 2.0 V Forward Transfer Admittance | yfs |VDS = 10 V, ID = 15 A 8.0 20 S Drain Leakage Current I Gate to Source Leakage Current I Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Turn-on Delay Time t Rise Time t Turn-off Delay Time t Fall Time t Total Gate Charge Q Gate to Source Charge Q Gate to Drain Charge Q Body Diode Forward Voltage V Reverse Recovery Time t Reverse Recovery Charge Q

DSS

VDS = 60 V, VGS = 0 V 10

GSS

VGS = ±20 V, VDS = 0 V ±10

iss

VDS = 10 V 920 pF

oss

VGS = 0 V 280 pF

rss

f = 1 MHz 120 pF

d(on)ID

d(off)

F(S-D)IF

= 15 A 25 ns

r

GS(on)

V

= 10 V 300 ns

VDD = 30 V 70 ns

f

RG = 10

G

ID = 30 A 25 nC

GS

VDD = 48 V 3.3 nC

GD

V

Ω

GS(on)

= 10 V 7.0 nC

120 ns

= 30 A, VGS = 0 V 1.0 V

rr

If = 30 A, VGS = 0 V 45 ns

rr

di/dt = 100 A/µs60nC

µ µ

Ω Ω

A A

TEST CIRCUIT 1 AVALANCHE CAPABILITY

VGS = 20 → 0 V

PG.

V

R

G

DD

= 25 Ω

50 Ω

I

D

D.U.T.

I

AS

BV

DSS

V

DS

Starting T

L

DD

V

ch

TEST CIRCUIT 3 GATE CHARGE

D.U.T.

I

G

PG.

= 2 mA

50 Ω

R

L

V

DD

TEST CIRCUIT 2 SWITCHING TIME

D.U.T.

R

PG.

V

GS

0

τ

τ = 1 µs

Duty Cycle ≤ 1 %

G

R

G

= 10 Ω

V

GS

Wave Form

I

D

Wave Form

GS

10 %

0

I

D

0

%

90

10 %10

t

d(on)

trt

t

on

V

GS(on)

I

D

d(off)tf

90

%

90

%

t

off

R

L

V

DD

2

Data Sheet

D13094EJ1V0DS00

TYPICAL CHARACTERISTICS (TA = 25 °C)

2SK3055

DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA

100

80

60

40

20

dT - Percentage of Rated Power - %

0

20 40 60 80 100 120 140 160

C - Case Temperature - ˚C

T

FORWARD BIAS SAFE OPERATING AREA

1000

I

100

Limited (V

DS(on)

R

ID

10

- Drain Current - A

D

I

(DC) = 30 A

=10 V)

GS

D(pulse) = 100 A

Power Dissipation Limited

100 ms

DC

10 ms

1 ms

100 µs

PW = 10 µs

TOTAL POWER DISSIPATION vs. CASE TEMPERATURE

35

30

25

20

15

10

- Total Power Dissipation - W

5

T

P

0

40 60 80 100 120 140 160

20

C

- Case Temperature - ˚C

T

DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE

80

60

V

GS

=10 V

40

- Drain Current - A

D

20

I

V

GS

= 4.0 V

TC = 25

˚C

Single Pulse

1

0.1

1 10 100

DS -

Drain to Source Voltage - V

V

FORWARD TRANSFER CHARACTERISTICS

100

10

TA = -25˚C

- Drain Current - A

1

D

I

25˚C 75˚C

125˚C

0.1 20468

GS

- Gate to Source Voltage - V

V

Pulsed V

DS

= 10 V

Pulsed

0

12 3

DS

- Drain to Source Voltage - V

V

Data Sheet

D13094EJ1V0DS00

3

1 000

2SK3055

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH

100

10

1

0.1

- Transient Thermal Resistance - ˚C/W

th(t)

r

0.01

10

µµ

100

FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT

100

10

TA = 125˚C 75˚C 25˚C

1.0

−25˚C

R

th(ch-A)

= 62.5 ˚C/W

R

th(ch-C)

= 5.0 ˚C/W

TC = 25

˚C

Single Pulse

1 m 10 m 100 m 1 10 100 1 000

PW - Pulse Width - s

DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE

V

DS

=10 V

75

Pulsed

50

D

= 15 A

I

25

Pulsed

| - Forward Transfer Admittance - S

fs

0.1

| y

0.1

1

I

D

- Drain Current - A

DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT

75

50

V

GS

= 4.0 V

V

GS

25

- Drain to Source On-State Resistance - mΩ

0

0.1 10

DS(on)

R

= 10 V

I

D

- Drain Current - A

10 100

Pulsed

100 1000

- Drain to Source On-State Resistance - mΩ

DS(on)

R

0

V

GS

- Gate to Source Voltage - V

10

GATE TO SOURCE CUTOFF VOLTAGE vs. CHANNEL TEMPERATURE

2.0

1.5

1.0

0.5

- Gate to Source Cutoff Voltage - V

0

GS(off)

V

−50

0 50 100 150

T

ch

- Channel Temperature - ˚C

VDS = 10 V I

D

= 1 mA

20

4

Data Sheet

D13094EJ1V0DS00

2SK3055

DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE

80

60

V

GS

= 4.0 V

40

V

GS

50

= 10 V

100 150

VGS = 0 V f = 1 MHz

20

- Drain to Source On-state Resistance - mΩ

0

DS(on)

R

10 000

- 50

0

ch

- Channel Temperature - ˚C

T

CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE

1 000

- Capacitance - pF

rss

100

, C

oss

, C

iss

C

10

0.1

1 10 100

DS

- Drain to Source Voltage - V

V

ID = 16 A

Pulsed

C

oss

C

SOURCE TO DRAIN DIODE FORWARD VOLTAGE

1000

V

GS

= 0 V

100

V

GS

= 10 V

10

1

- Diode Forward Current - A

SD

I

0.1

0

0.5

1.0

Pulsed

1.5

VSD - Source to Drain Voltage - V

SWITCHING CHARACTERISTICS

10 000

iss

1 000

100

- Switching Time - ns

f

rss

, t

d(off)

, t

r

, t

d(on)

t

10

0.1

D

- Drain Current - A

I

VDD = 30 V

GS

= 10 V

V

G

= 10 Ω

R

t

r

t

f

t

d(off)

t

d(on)

101 100

REVERSE RECOVERY TIME vs. DRAIN CURRENT

1000

100

10

- Reverse Recovery Time - ns

rr

t

1

0.1

1.0 10 100

F

- Drain Current - A

I

di/dt = 100 A/µs

GS

= 0 V

V

Data Sheet

DYNAMIC INPUT/OUTPUT CHARACTERISTICS

80

60

40

20

- Drain to Source Voltage - V

DS

V

0

D13094EJ1V0DS00

V

DD

= 48 V

30 V 12 V

V

DS

V

GS

ID = 30 A

10 20 30 40

G

- Gate Charge - nC

Q

16

12

8

4

- Gate to Source Voltage - V

GS

V

5

2SK3055

SINGLE AVALANCHE ENERGY vs. INDUCTIVE LOAD

100

I

AS

= 15 A

10

1

R

G

= 25 Ω

VDD = 30 V

| - Single Avalanche Energy - mJ

AS

| I

GS

= 20 V → 0 V

V Starting Tch = 25 ˚C

0.1

µ

10

µ

100

L

- Inductive Load - H

E

AS

= 22.5 mJ

1 m 10 m

SINGLE AVALANCHE ENERGY DERATING FACTOR

160 140

120

VDD = 30 V

G

= 25 Ω

R

V

GS

= 20 V → 0 V

AS

≤ 15 A

I

100

80 60 40

Energy Derating Factor - %

20

0

25 50

75 100

125 150

Starting Tch - Starting Channel Temperature - ˚C

6

Data Sheet

D13094EJ1V0DS00

PACKAGE DRAWING (Unit : mm)

Isolated TO-220 (MP-45F)

2SK3055

0.3

±

15.0

0.7 ± 0.1

2.54

10.0 ± 0.3

123

φ

1.3

2.54

±

3.2

0.1

0.2

±

3

12.0

0.2

±

MIN.

4

13.5

±

0.2

1.Gate

2.Drain

3.Source

0.2

4.5 ± 0.2

±

0.65

2.7

±

0.2

EQUIVALENT CIRCUIT

Drain (D)

Body

Gate (G)

Gate Protection

±

0.1

2.5

0.11.5 ± 0.2

Diode

Source (S)

Diode

Remark

The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.

Data Sheet

D13094EJ1V0DS00

7

2SK3055

• The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

• No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document.

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M7 98. 8