
Silicon N-Channel MOS FET
Application
High speed power switching
Features
• Low on-resistance
• High speed switching
• Suitable for low voltage operation
Outline
2SK1579
UPAK
G
1
2
3
4
D
1. Gate
2. Drain
3. Source
4. Drain
S

2SK1579
Absolute Maximum Ratings (Ta = 25°C unless otherwise specified.)
Item Symbol Ratings Unit
Drain to source voltage V
Gate to source voltage V
Drain current I
Drain peak current I
Body to drain diode reverse drain current I
Channel power dissipation Pch*
DSS
GSS
D
D(pulse)
DR
1
*
2
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes 1. PW ≤ 100 µs, duty cycle ≤ 10%
2. Value on the almina ceramic board (12.5 × 20 × 0.7 mm)
12 V
±7V
2A
4A
2A
1W
2

2SK1579
Electrical Characteristics (Ta = 25°C unless otherwise specified.)
Item Symbol Min Typ Max Unit Test conditions
Drain to source cutoff current I
Gate to source cutoff current I
Gate to source cutoff voltage V
Drain to source on resistance
R
DSS
GSS
GS(off)
DS(on)
(1)
Drain to source on resistance
R
DS(on)
(2)
DC forward transfer admittance |yfs| 1 2.5 — S VDS = 5 V, ID = 1 A,
Input capacitance Ciss — 110 — pF VDS = 5 V, VGS = 0,
Reverse transfer capacitance Crss — 30 — pF f = 1 MHz
Output capacitance Coss — 150 — pF
Turn-on time t
Turn-off time t
(on)
(off)
Note 1. Marking is “DY”.
——1 µAVDS = 8 V, VGS = 0
——±5µAVGS = ±6.5 V, VDS = 0
0.4 — 1.4 V VDS = 5 V, ID = 100 µA
1 — 0.36 0.7 Ω VGS = 2.2 V, ID = 0.5 A
2 — 0.25 0.35 Ω VGS = 4 V, ID = 1 A
∆V
= 0.1 V
GS
— 500 — ns ID = 0.2 A, VGS = 0,
— 1500 — ns Vin = 4 V, RL = 51 Ω
3

2SK1579
Power vs. Temperature Derating
1.5
1.0
0.5
Channel Dissipation Pch (W)
0 50 100 150
Ambient Temperature Ta (°C)
Typical Output Characteristics
5
4
(A)
D
3
4 V
3.5 V
3 V
Ta = 25°C
Pulse Test
2.5 V
Maximum Safe Operation Area
50
20
10
(A)
5
D
2
1
Operation in this area
is limited by R
0.5
Drain Current I
0.2
0.1
Ta = 25°C
0.05
0.1 0.2 1 20
DS (on)
DC Operation (T
C
= 25°C)
0.5 10 50
2 5 100
Drain to Source Voltage V
Typical Transfer Characteristics
5
4
(A)
D
3
PW = 10 ms
1 Shot
(V)
DS
Ta = –25°C
25°C
75°C
2
Drain Current I
1
0
268
Drain to Source Voltage V
2
Drain Current I
1
V
GS
2 V
= 1.5 V
410
(V)
DS
V
DS
Pulse Test
1340
2
Gate to Source Voltage V
= 5 V
(V)
GS
5
4

2SK1579
Drain to Source on State Resistance
(Ω)
0.5
DS (on)
0.4
vs. Gate to Source Voltage
ID = 0.1 A
0.2 A
0.3
0.2
Ta = 25°C
0.1
Pulse Test
25
Drain to Source on State Resistance R
1340
Gate to Source Voltage V
0.5 A
GS
(V)
Static Drain to Source on State
Resistance vs. Temperature
1.0
Pulse Test
0.8
0.6
(Ω)
DS (on)
0.4
R
ID = 1 A
0.5 A
ID = 0.5 A
V
GS
V
GS
0.2
1 A
2 A
0
Static Drain to Source on State Resistance
–25
Case Temperature T
25 100
05075
(°C)
C
1 A
= 2 V
= 4 V
Static Drain to Source on State
Resistance vs. Drain Current
5
Ta = 25°C
Pulse Test
2
2 V
V
= 3 V
GS
4 V
(Ω)
0.5
DS (on)
R
0.2
1
0.1
0.05
Static Drain to Source on State Resistance
0.5 2 100.2
120
Drain Current I
D
5
(A)
Forward Transfer Admittance
vs. Drain Current
50
V
= 5 V
DS
Pulse Test
20
10
Ta = –25°C
5
25°C
75°C
2
1
Forward Transfer Admittance yfs (S)
0.05
0.2 1 5
0.5 20
Drain Current I
210
(A)
D
5

2SK1579
Reverse Drain Current vs.
Sourse to Drain Voltage
5
Pulse Test
(A)
4
DR
3
2
VGS = 2 V
1
Reverse Dratin Current I
0
0
Source to Drain Voltage V
1.0
VGS = 0
5,000
2,000
1,000
2.0
(V)
SD
Switching Characteristics
VGS = 4 V, VDD = 10 V
PW = 2 µs, Duty cycle = 1%
t
d (off)
Typical Capacitance vs.
Drain to Source Voltage
500
200
100
50
20
Capacitance C (pF)
V
= 0
GS
10
f = 1 MHz
5
0.2 1 5
0.1
0.5 10
Drain to Source Voltage V
Coss
Ciss
Crss
2
DS
(V)
500
t
f
200
Switching Time t (ns)
100
50
0.1 0.5 2
0.05
0.2 5
Drain Current I
t
r
t
d (on)
1
D
(A)
6

Unit: mm
0.53 Max
0.48 Max
4.5 ± 0.1
1.8 Max
1.5
1.5
3.0
1.5 ± 0.1
0.4
φ
1
0.44 Max
(1.5)
(2.5)
2.5 ± 0.1
4.25 Max
0.44 Max
(0.4)
(0.2)
0.8 Min
Hitachi Code
JEDEC
EIAJ
Weight
(reference value)
UPAK
—
Conforms
0.050 g

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