Page 1
2SK1299(L), 2SK1299(S)
Silicon N-Channel MOS FET
Application
High speed power switching
Features
• Low on-resistance
• High speed switching
• Low drive current
• 4 V gate drive device
Can be driven from 5 V source
• Suitable for motor drive, DC-DC converter, power switch and solenoid drive
Outline
1
2
3
1
2
3
4
4
DPAK-1
1. Gate
2. Drain
3. Source
4. Drain
D
G
S
Page 2
2SK1299(L), 2SK1299(S)
2
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage V
DSS
100 V
Gate to source voltage V
GSS
±20 V
Drain current I
D
3A
Drain peak current I
D(pulse)
*
1
12 A
Body to drain diode reverse drain current I
DR
3A
Channel dissipation Pch*
2
20 W
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at T
C
= 25°C
Page 3
2SK1299(L), 2SK1299(S)
3
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test conditions
Drain to source breakdown
voltage
V
(BR)DSS
100 — — V ID = 10 mA, VGS = 0
Gate to source breakdown
voltage
V
(BR)GSS
±20——V I
G
= ±100 µA, VDS = 0
Gate to source leak current I
GSS
——±10 µAV
GS
= ±16 V, VDS = 0
Zero gate voltage drain current I
DSS
— — 100 µAV
DS
= 80 V, VGS = 0
Gate to source cutoff voltage V
GS(off)
1.0 — 2.0 V ID = 1 mA, VDS = 10 V
Static Drain to source on state
resistance
R
DS(on)
— 0.25 0.35 Ω ID = 2 A, VGS = 10 V *
1
— 0.30 0.45 Ω ID = 2 A, VGS = 4 V 1*
Forward transfer admittance |yfs| 2.4 4.0 — S ID = 2 A, VDS = 10 V *
1
Input capacitance Ciss — 400 — pF VDS = 10 V, VGS = 0,
Output capacitance Coss — 165 — pF f = 1 MHz
Reverse transfer capacitance Crss — 45 — pF
Turn-on delay time t
d(on)
—5 —nsI
D
= 2 A, VGS = 10 V,
Rise time t
r
— 35 — ns RL = 15 Ω
Turn-off delay time t
d(off)
— 160 — ns
Fall time t
f
—60—ns
Body to drain diode forward
voltage
V
DF
— 1.0 — V IF = 3 A, VGS = 0
Body to drain diode reverse
recovery time
t
rr
— 135 — ns IF = 3 A, VGS = 0,
di
F
/dt = 50 A/µs
Note: 1. Pulse test
Page 4
2SK1299(L), 2SK1299(S)
4
50 1000
Case Temperature T
C
(°C)
150
10
Channel Dissipation Pch (W)
Power vs. Temperature Derating
20
30
Maximum Safe Operation Area
Drain Current I
D
(A)
5001002052
50
10
5
2
0.2
1
20
1
0.5
0.1
0.05
200
Drain to Source Voltage V
DS
(V)
100 µs
1 ms
Ta = 25°C
10 µs
Operation in this area
is limited by R
DS (on)
DC Operation
(T
C
= 25°C)
PW = 10 ms (1 Shot)
10 50 1000
Typical Output Characteristics
Drain to Source Voltage V
DS
(V)
Drain Current ID (A)
108642
10
8
6
4
2
0
VGS = 2.5 V
Pulse Test
5 V
3 V
3.5 V
10 V
4.5 V
4 V
Typical Transfer Characteristics
3
Gate to Source Voltage V
GS
(V)
42105
1
2
3
4
5
0
Drain Current I
D
(A)
VDS = 10 V
Pulse Test
25°C
75°C
TC = –25°C
Page 5
2SK1299(L), 2SK1299(S)
5
Drain to Source Saturation Voltage
vs. Gate to Source Voltage
6
Gate to Source Voltage V
GS
(V)
842010
0.8
1.2
1.6
2.0
0
0.4
Drain to Source Saturation Voltage
V
DS
(on)
(V)
Pulse Test
ID = 5 A
2 A
1 A
2
Drain Current I
D
(A)
510.5 20
0.2
0.5
1
2
5
0.2
0.1
0.05
10
Static Drain to Source on State
Resistance vs. Drain Current
Static Drain to Source on State Resistance
R
DS
(on)
(Ω)
VGS = 4 V
10 V
Pulse Test
80
Case Temperature T
C
(°C)
120400
0.1
0.2
0.3
0.4
0.5
–40
0
160
Static Drain to Source on State
Resistance vs. Temperature
Static Drain to Source on State Resistance
R
DS
(on)
(Ω)
ID = 5 A
Pulse Test
VGS = 4 V
10 V
2 A
1 A
5 A
2 A
1 A
Forward Transfer Admittance
vs. Drain Current
10
5
2
1
0.5
0.2
0.05
1.0 0.2
0.5
1
5
Drain Current I
D
(A)
2
Forward Transfer Admittance yfs (S)
0.1
TC = –25°C
VDS = 10 V
Pulse Test
25°C
75°C
Page 6
2SK1299(L), 2SK1299(S)
6
500
200
100
50
20
10
5
0.1 0.2 1
10
Reverse Drain Current I
DR
(A)
2
0.5
5
Body to Drain Diode Reverse
Recovery Time
Reverse Recovery Time t
rr
(ns)
di/dt = 50 A/µs
VGS = 0, Ta = 25°C
Pulse Test
Typical Capacitance vs.
Drain to Source Voltage
1000
100
10
1
Capacitance C (pF)
01020
50
Drain to Source Voltage VDS (V)
30 40
VGS = 0
f = 1 MHz
Ciss
Coss
Crss
200
160
120
80
40
08 24
32
Gate Charge Qg (nc)
16
20
16
12
8
4
Dynamic Input Characteristics
Drain to Source Voltage V
DS
(V)
Gate to Source Voltage V
GS
(V)
40
0
V
DS
V
GS
VDD = 80 V
50 V
25 V
ID = 3 A
VDD = 25 V
50 V
80 V
Switching Characteristics
500
200
100
50
10
5
0.1 0.2 1
10
Drain Current I
D
(A)
2
0.5
5
Switching Time t (ns)
20
td
(off)
VGS = 10 V, V
DD
PW = 2µs, duty < 0.1 %
t
d (on)
t
f
t
r
=
.
.
30 V
Page 7
2SK1299(L), 2SK1299(S)
7
10
8
6
4
2
0 0.4 1.2
1.6
2.0
Source to Drain Voltage V
SD
(V)
0.8
Reverse Drain Current vs.
Source to Drain Voltage
Reverse Drain Current I
DR
(A)
VGS = 0, – 5 V
Pulse Test
VGS = 10 V
5 V
3
1.0
0.3
0.1
0.03
0.01
10 µ 1 m
10 m
100 m
Pulse Width PW (s)
100 µ
110
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance γs (t)
θch–c (t) = γs (t) · θch–c
θch–c = 6.25°C/W, T
C
= 25°C
PW
D =
PW
T
T
TC = 25°C
P
DM
D = 1
0.5
0.05
1 Shot Pulse
0.2
0.1
0.02
0.01
Vin Monitor
Vout Monitor
R
L
50 Ω
Vin = 10 V
D.U.T
.
V
DD
= 30 V
.
Switching Time Test Circuit
Vin
10 %
90 %
90 %
90 %
10 %
t
d (on)
t
d (off)
t
r
t
f
Vout
10 %
Wavewforms
Page 8
Hitachi Code
JEDEC
EIAJ
Weight
(reference value)
DPAK (L)-(1)
—
Conforms
0.42 g
Unit: mm
6.5 ± 0.5 2.3 ± 0.2
0.55 ± 0.1
1.2 ± 0.3
0.55 ± 0.1
5.5 ± 0.5 1.7 ± 0.5
16.2 ± 0.5
3.1 ± 0.5
5.4 ± 0.5
1.15 ± 0.1
2.29 ± 0.5 2.29 ± 0.5
0.8 ± 0.1
Page 9
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contact Hitachi’s sales office before using the product in an application that demands especially high
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of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
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failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
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