Datasheet 2SJ505-S, 2SJ505-L Datasheet (HIT)

2SJ505(L), 2SJ505(S)

Silicon P Channel MOS FET

High Speed Power Switching

ADE-208-547

Target specification 1st. Edition

Features

• Low on-resistance

R

DS(on)

= 0.017Ω typ.

• Low drive current.

• 4V gate drive devices.

• High speed switching.

Outline

1. Gate

2. Drain

3. Source

4. Drain

1

2

3

4

1

2

3

4

LDPAK

D

G

S

2SJ505(L), 2SJ505(S)

2

Absolute Maximum Ratings (Ta = 25°C)

Item Symbol Ratings Unit

Drain to source voltage V

DSS

–60 V

Gate to source voltage V

GSS

±20 V

Drain current I

D

–50 A

Drain peak current I

D(pulse)

*

1

–200 A

Body to drain diode reverse drain current I

DR

–50 A

Avalanche current IAP*

3

–50 A

Avalanche energy EAR*

3

214 mJ

Channel dissipation Pch*

2

75 W
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C

Notes: 1. PW ≤ 10µs, duty cycle ≤ 1 %

2. Value at Tc = 25°C

3. Value at Ta = 25°C, Rg ≥ 50 Ω, L=100µH

2SJ505(L), 2SJ505(S)

3

Electrical Characteristics (Ta = 25°C)

Item Symbol Min Typ Max Unit Test Conditions

Drain to source breakdown
voltage

V

(BR)DSS

–60 — — V ID = –10mA, VGS = 0

Gate to source breakdown
voltage

V

(BR)GSS

±20——V I

G

= ±100µA, VDS = 0

Zero gate voltege drain
current

I

DSS

— — –10 µAV

DS

= –60 V, VGS = 0

Gate to source leak current I

GSS

——±10 µAV

GS

= ±16V, VDS = 0

Gate to source cutoff voltage V

GS(off)

–1.0 — –2.0 V ID = –1mA, VDS = –10V

Static drain to source on state R

DS(on)

— 0.017 0.022 Ω ID = –25A, VGS = –10V*

1

resistance R

DS(on)

— 0.024 0.036 Ω ID = –25A, VGS = –4V*

1

Forward transfer admittance |yfs| 2739—S I

D

= 25A, VDS = 10V*

1

Input capacitance Ciss — 4100 — pF VDS = –10V
Output capacitance Coss — 2100 — pF VGS = 0
Reverse transfer capacitance Crss — 450 — pF f = 1MHz
Turn-on delay time t

d(on)

— 32 — ns VGS = –10V, ID = –10A

Rise time t

r

— 225 — ns RL = 3Ω

Turn-off delay time t

d(off)

— 530 — ns

Fall time t

f

— 330 — ns

Body to drain diode forward
voltage

V

DF

— –1.1 — V IF = –50A, VGS = 0

Body to drain diode reverse
recovery time

t

rr

— 110 — ns IF = –50A, VGS = 0

diF/ dt = 50A/µs

Note: 1. Pulse test

2SJ505(L), 2SJ505(S)

4

Main Characteristics

80

60

40

20

0

50 100 150 200

–100

–30
–10

–3
–1

–0.3
–0.1

–0.1 –0.3 –1 –3 –10

–100

–80

–60

–40

–20

0

–4 –8 –12 –16 –20

–4 V

0 –1–2–3–4–5

–30 –100

–1000

–300

–4.5 V

–3 V

–100

–80

–60

–40

–20

10 µs

1 ms

Ta = 25 °C

–3.5 V

DS

V = –10 V
Pulse Test

100 µs

PW = 10 ms (1 shot)

DC Operation (Tc = 25 °C)

–8 V

–5 V

–10 V

Tc = –25 °C

Pulse Test

V = –2.5 V

GS

75 °C

25 °C

Channel Dissipation Pch (W)

Case Temperature Tc (°C)

Power vs. Temperature Derating

Drain to Source Voltage V (V)

DS

Drain Current I (A)

D

Maximum Safe Operation Area

Operation in
this area is
limited by R

DS(on)

Drain Current I (A)

D

Typical Output Characteristics

Drain to Source Voltage V (V)

DS

Gate to Source Voltage V (V)

GS

Typical Transfer Characteristics

Drain Current I (A)

D

2SJ505(L), 2SJ505(S)

5

–2

–1.6

–1.2

–0.8

–0.4

0

–4 –8 –12 –16 –20

50

40

30

20

10

–40 0 40 80 120 160

0

100

50

5

2
1

–1 –3

–10

–30 –100 –300

–1000

–10 A

20

10

V = –4 V

GS

–10,–20A

Pulse Test

Pulse Test

Pulse Test

I = –50 A

D

GS

V = –10 V

–50 A

–20 A

–10 V

GS

V = –4 V

–10 A

–0.1 –1 –10 –100

–0.3

–3 –30

100

10

0.1

1

0.3

3

30

25 °C

75 °C

V = –10 V

DS

Pulse Test

Tc = –25 °C

I = –50 A

D

–20 A

–5 A

Drain to Source Saturation Voltage vs.

Gate to Source Voltage

V (V)

DS(on)

Drain to Source Saturation Voltage

Gate to Source Voltage V (V)

GS

Static Drain to Source on State Resistance

vs. Drain Current

Drain Current I (A)

D

Drain to Source On State Resistance

R ( )Ω

DS(on)

Static Drain to Source on State Resistance

vs. Temperature

Case Temperature Tc (°C)

R ( )

DS(on)

Static Drain to Source on State Resistance

Ω

Forward Transfer Admittance vs.

Drain Current

Drain Current I (A)

D

Forward Transfer Admittance |y | (S)

fs

2SJ505(L), 2SJ505(S)

6

1000

500

200

50

100

20
10

–0.1

–0.3

–3

0 –10 –20 –30 –40 –50

2000
1000

500

0

–20

–40

–60

–80

0

0

–4

–8

–12

–16

–20–100

40 80 120

160

200

1000

200

500

100

20

50

10

–0.1

–0.3 –1

–3

–10

–1

–30

200
100

DS

V

GS

V

V = –50 V

–25 V
–10 V

DD

–100

V = –50 V

–25 V
–10 V

DD

5000

–30 –100

r

t

d(off)

t

t

f

d(on)

t

–10

di / dt = 50 A / µs
V = 0, Ta = 25 °C

GS

V = –10 V, V = –30 V
PW = 10 µs, duty < 1 %

GS

DD

=

I = –50 A

D

10000

20000

50000

Ciss

Coss

Crss

V = 0
f = 1 MHz

GS

Body to Drain Diode Reverse

Recovery Time

Reverse Drain Current I (A)

DR

Reverse Recovery Time trr (ns)

Capacitance C (pF)

Drain to Source Voltage V (V)

DS

Typical Capacitance vs.
Drain to Source Voltage

Dynamic Input Characteristics

Gate Charge Qg (nc)

Drain to Source Voltage V (V)

DS

Gate to Source Voltage V (V)

GS

Switching Time t (ns)

Switching Characteristics

Drain Current I (A)

D

2SJ505(L), 2SJ505(S)

7

–100

–80

–60

–40

–20

0

–0.4 –0.8 –1.2 –1.6 –2.0

D. U. T

Rg

I
Monitor

AP

V
Monitor

DS

V

DD

50Ω

Vin
–15 V

0

I

D

V

DS

I

AP

V

(BR)DSS

L

V

DD

E = • L • I •

2

1

V

V – V

AR

AP

DSS

DSS DD

2

–10 V

–5 V

Pulse Test

250

200

150

100

50

25 50 75 100 125 150

0

V = 0

GS

I = –50 A
V = –25 V
duty < 0.1 %
Rg > 50

AP

DD

Ω

Reverse Drain Current vs.

Source to Drain Voltage

Source to Drain Voltage V (V)

SD

Reverse Drain Current I (A)

DR

Channel Temperature Tch (°C)

Maximun Avalanche Energy vs.

Channel Temperature Derating

Repetive Avalanche Energy E (mJ)

AR

Avalanche Test Circuit and Waveform

2SJ505(L), 2SJ505(S)

8

3

1

0.3

0.1

0.03

0.01
10 µ

100 µ 1 m 10 m

100 m 1 10

DM

P

PW

T

D =

PW

T

ch – c(t) = s (t) • ch – c
ch – c = 1.67 °C/W, Tc = 25 °C

θ γ θ
θ

Tc = 25°C

D = 1

0.5

0.2

0.1

0.05

0.02

0.01

1shot pulse

Vin Monitor

D.U.T.

Vin

-10 V

R

L

V
= –30 V

DD

tr

td(on)

Vin

90%

90%

10%

10%

Vout

td(off)

Vout
Monitor

50Ω

90%

10%

t

f

Switching Time Test Circuit

Waveforms

Normalized Transient Thermal Impedance vs. Pulse Width

Pulse Width PW (S)

Normalized Transient Thermal Impedance

s (t)

γ

2SJ505(L), 2SJ505(S)

9

Package Dimensions

Unit: mm

10.2 ± 0.3
(1.4)

8.6 ± 0.3

1.27 ± 0.2

1.2 ± 0.2

2.54 ± 0.5

11.3 ± 0.5

(1.5)

0.86

+0.2
–0.1

3.0

+0.3

–0.5

0.76 ± 0.1

10.0

+0.3

–0.5

2.54 ± 0.5

4.44 ± 0.2

1.3 ± 0.2

2.59 ± 0.2

0.4 ± 0.1

11.0 ± 0.5

10.2 ± 0.3
(1.4)

8.6 ± 0.3

1.27 ± 0.2

2.54 ± 0.5

(1.5)

0.86

+0.2
–0.1

10.0

+0.3

–0.5

2.54 ± 0.5

4.44 ± 0.2

1.3 ± 0.2

2.59 ± 0.2

0.4 ± 0.1

1.2 ± 0.2

(1.5)

0.1

+0.2
–0.1

L type S type

Hitachi Code

EIAJ

JEDEC

LDPAK

—
—

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