Datasheet 2SJ484 Datasheet (HIT)

Features

• Low on-resistance

R

= 0.18 Ω typ. (at V

DS(on)

• Low drive current

• High speed switching

• 4V gate drive devices.

Outline

2SJ484

Silicon P-Channel MOS FET

High Speed Power Switching

= –10V, ID = –1A)

GS

ADE-208-501 A

2nd. Edition

UPAK

G

1

2

3

4

D

1. Gate

2. Drain

3. Source

4. Drain

S

2SJ484

Absolute Maximum Ratings (Ta = 25°C)

Item Symbol Ratings Unit

Drain to source voltage V
Gate to source voltage V
Drain current I
Drain peak current I
Body to drain diode reverse drain current I
Channel dissipation Pch*

DSS

GSS

D

D(pulse)

DR

1

*

2

Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C

Notes: 1. PW ≤ 100µs, duty cycle ≤ 10 %

2. When using aluminium ceramic board (12.5 x 20 x 0.7 mm)

–30 V
±20 V
–2 A
–4 A
–2 A
1W

2

2SJ484

Electrical Characteristics (Ta = 25°C)

Item Symbol Min Typ Max Unit Test Conditions

Drain to source breakdown

V

(BR)DSS

voltage
Gate to source breakdown

V

(BR)GSS

voltage
Zero gate voltege drain

I

DSS

current
Gate to source leak current I
Gate to source cutoff voltage V
Static drain to source on state

R

GSS

GS(off)

DS(on)

resistance

R

DS(on)

Forward transfer admittance |yfs| 1.2 2.0 — S ID = –1A, VDS = –10V*
Input capacitance Ciss — 230 — pF VDS = –10V
Output capacitance Coss — 140 — pF VGS = 0
Reverse transfer capacitance Crss — 50 — pF f = 1MHz
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t
Body to drain diode forward

V

d(on)

r

d(off)

f

DF

voltage
Body to drain diode reverse

t

rr

recovery time
Notes: 1. Pulse test

2. Marking is “WY”.

–30 — — V ID = –10mA, VGS = 0

±20——V I

— — –10 µAV

——±10 µAV

= ±100µA, VDS = 0

G

= –30 V, VGS = 0

DS

= ±16V, VDS = 0

GS

–1.0 — –2.0 V ID = –1mA, VDS = –10V
— 0.18 0.23 Ω ID = –1A, VGS = –10V*

— 0.3 0.45 Ω ID = –1A, VGS = –4V*

— 10 — ns ID = –1A, RL = 30Ω
— 30 — ns VGS = –10V
—35—ns
—30—ns
— –0.95 — V IF = –2A, VGS = 0

— 60 — ns IF = –2A, VGS = 0

diF/ dt = 50A/µs

1

1

1

3

2SJ484

Main Characteristics

Power vs. Temperature Derating

2.0
Test Condition :

When using the aliminium Ceramic
board (12.5 x 20 x 70 mm)

1.5

1.0

0.5

Channel Dissipation Pch (W)

0

50 100 150 200

Ambient Temperature Ta (°C)

Typical Output Characteristics

–5

–10 V

–6 V

–5 V

–4.5 V

–4

D

–3

–4 V

–3.5 V

–10

Maximum Safe Operation Area

100 µs

–3

D

–1

DC Operation

1 ms

PW = 10 ms

(1 shot)

–0.3

Operation in

–0.1

Drain Current I (A)

this area is
limited by R

DS(on)

–0.03

–0.01

Ta = 25 °C

–0.1 –0.3 –1 –3 –10 –30 –100

Drain to Source Voltage V (V)

Typical Transfer Characteristics

–5

V = –10 V

DS

Pulse Test

–4

D

–3

DS

–2

Drain Current I (A)

–1

0

Drain to Source Voltage V (V)

4

–3 V

V = –2.5 V

GS

Pulse Test

–2 –4 –6 –8 –10

DS

–2

Drain Current I (A)

–1

0

Tc = 75°C

–1 –2 –3 –4 –5

Gate to Source Voltage V (V)

25°C

–25°C

GS

2SJ484

Drain to Source Saturation Voltage vs.

Gate to Source Voltage

–1.0

–0.8

DS(on)

V (V)

–0.6

–0.4

–0.2

Drain to Source Saturation Voltage

0

–4

–8

–12 –16 –20

Gate to Source Voltage V (V)

Static Drain to Source on State Resistance

vs. Temperature

0.5
Pulse Test

Ω

0.4

DS(on)

R ( )

0.3

V = –10 V

GS

0.2

Pulse Test

I = –2 A

D

–1 A

–0.5 A

GS

I = –2 A

D

–0.5, –1.0 A

Static Drain to Source on State Resistance

vs. Drain Current

2

Pulse Test

1

DS(on)

R ( )Ω

0.5
V = –4 V

GS

0.2

Drain to Source On State Resistance

0.1

–0.1 –0.2 –0.5 –1 –2 –5 –10

–10 V

Drain Current I (A)

D

Forward Transfer Admittance vs.

Drain Current

5

fs

2

Tc = –25 °C

1

0.5

0.2

75 °C

25 °C

–20

0.1

0

Static Drain to Source on State Resistance

–40 0 40 80 120 160

Case Temperature Tc (°C)

0.1

Forward Transfer Admittance |y | (S)

0.05

–0.02 –0.2 –0.5 –1 –2 –5

–0.01

–0.1–0.05

Drain Current I (A)

V = –10 V

DS

Pulse Test

D

5

2SJ484

Body to Drain Diode Reverse

Recovery Time

500

200

100

50

20
10

Reverse Recovery Time trr (ns)

5

–0.1

–0.2

di / dt = 50 A / µs
V = 0, Ta = 25 °C

GS

–0.5 –1 –2 –5 –10

Reverse Drain Current I (A)

DR

Typical Capacitance vs.
Drain to Source Voltage

1000

500

Ciss

200

Coss

100

50

Capacitance C (pF)

Crss

20

10

0 –10 –20 –30 –40 –50

Drain to Source Voltage V (V)

V = 0

GS

f = 1 MHz

DS

Dynamic Input Characteristics

0

V = –5 V

DD

–10 V

DS

–10

–25 V

V

GS

–20

V = –5 V

DD

–10 V
–25 V

–30

V

DS

–40

Drain to Source Voltage V (V)

–50

I = –2 A

0

D

4 8 12 16 20

Gate Charge Qg (nc)

0

500

V = –10 V, V = –10 V

GS

duty < 1 %

Switching Characteristics

GS

200

–4

100

–8

t

d(off)

t

f

–12

–16

50

20

Switching Time t (ns)

10

Gate to Source Voltage V (V)

–20

5

–0.1 –0.2 –0.5 –1 –2 –5 –10

Drain Current I (A)

DD

t

r

t

d(on)

D

6

DR

2SJ484

Reverse Drain Current vs.

Source to Drain Voltage

–5

–4

–3

–2

–10 V

–5 V

V = 0, 5 V

GS

–1

Reverse Drain Current I (A)

0

–0.4 –0.8 –1.2 –1.6 –2.0

Source to Drain Voltage V (V)

Pulse Test

SD

Switching Time Test Circuit Switching Time Waveform

R

Vout
Monitor

L

Vin

10%

Vin Monitor

D.U.T.

90%

Vin
10 V

50Ω

V

DD

= –10 V

Vout

td(on)

10%

90%

tr

td(off)

90%

10%

t

f

7

2SJ484

Package Dimensions

4.5 ± 0.1

1.8 max

4

0.53 max

0.48 max

1

1.5

f

1

23

1.5

3.0

0.4

2.5 ± 0.1

4.25 max

0.8 min

Unit: mm

1.5 ± 0.1

0.44 max

0.44 max

Hitachi Code

EIAJ

JEDEC

UPAK

SC–62

UPAK

8

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