Datasheet 2n6497-d Datasheet

Page 1

2N6497

High Voltage NPN Silicon Power Transistors

These devices are designed for high voltage inverters, switching regulators and line−operated amplifier applications. Especially well suited for switching power supply applications.

Features

• High Collector−Emitter Sustaining Voltage −

CEO(sus)

• Excellent DC Current Gain −

hFE = 10−75 @ IC = 2.5 Adc

• Low Collector−Emitter Saturation Voltage @ I

CE(sat)

• Pb−Free Packages are Available*

MAXIMUM RATINGS (Note 1)

Collector−Emitter Voltage V Collector−Base Voltage V Emitter−Base Voltage V Collector Current − Continuous

Base Current I Total Power Dissipation @ TC = 25_C

Derate above 25_C Operating and Storage Junction

Temperature Range

THERMAL CHARACTERISTICS

Thermal Resistance, Junction−to−Case

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Indicates JEDEC Registered Data.

= 250 Vdc (Min)

= 2.5 Adc −

= 1.0 Vdc (Max)

Rating Symbol Value Unit

CEO

CB EB

TJ, T

stg

− Peak

Characteristics Symbol Max Unit

250 Vdc 350 Vdc

6.0 Vdc

5.0 10

2.0 Adc 80

0.64

−65 to +150 °C

1.56

Adc

W/°C

_C/W

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5 AMPERE

POWER TRANSISTORS

NPN SILICON

250 VOLTS − 80 WATTS

MARKING DIAGRAM

TO−220AB

CASE 221A

STYLE 1

2N6497 = Device Code G = Pb−Free Package A = Assembly Location Y = Year WW = Work Week

ORDERING INFORMATION

Device Package Shipping

2N6497 TO−220AB 50 Units / Rail 2N6497G TO−220AB

(Pb−Free)

2N6497G

AYWW

50 Units / Rail

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

August, 2006 − Rev. 13

1 Publication Order Number:

2N6497/D

Page 2

2N6497

ELECTRICAL CHARACTERISTICS (T

= 25_C unless otherwise noted) (Note 2)

Characteristic

OFF CHARACTERISTICS

Collector−Emitter Sustaining Voltage (Note 3) (IC = 25 mAdc, IB = 0) Collector Cutoff Current

(VCE = 350 Vdc, V

ОООООООООООООООООО

(VCE = 175 Vdc, V

= 1.5 Vdc)

BE(off)

= 1.5 Vdc, TC = 100_C)

BE(off)

Emitter Cutoff Current (VBE = 6.0 Vdc, IC = 0)

ON CHARACTERISTICS (Note 3)

DC Current Gain

(IC = 2.5 Adc, VCE = 10 Vdc)

ОООООООООООООООООО

(IC = 5.0 Adc, VCE = 10 Vdc)

ОООООООООООООООООО

Collector−Emitter Saturation Voltage

(IC = 2.5 Adc, IB = 500 mAdc) (IC = 5.0 Adc, IB = 2.0 Adc)

ОООООООООООООООООО

Base−Emitter Saturation Voltage

(IC = 2.5 Adc, IB = 500 mAdc)

ОООООООООООООООООО

(IC = 5.0 Adc, IB = 2.0 Adc)

DYNAMIC CHARACTERISTICS

Current−Gain − Bandwidth Product

(IC = 250 mAdc, VCE = 10 Vdc, f = 1.0 MHz)

ОООООООООООООООООО

Output Capacitance (VCB = 10 Vdc, IE = 0, f = 100 kHz)

SWITCHING CHARACTERISTICS

Rise Time (VCC = 125 Vdc, IC = 2.5 Adc, IB1 = 0.5 Adc) Storage Time

(VCC = 125 Vdc, IC = 2.5 Adc, VBE = 5.0 Vdc, IB1 = IB2 = 0.5 Adc)

Fall Time (VCC = 125 Vdc, IC = 2.5 Adc, IB1 = IB2 = 0.5 Adc)

2. Indicates JEDEC Registered Data.

3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.

Symbol

CEO(sus)

CEX

ÎÎÎ

EBO

ÎÎÎ

CE(sat)

ÎÎÎ

BE(sat)

ÎÎÎ

Min

250

−

3.0

−

5.0

−

Typ

0.4

1.4

0.45

−

Max

−

1.0

ÎÎ

1.0

ÎÎ

−

ÎÎ

1.0

ÎÎ

5.0

1.5

ÎÎ

2.5

−

ÎÎ

150

1.0

2.5

1.0

Unit

Vdc

mAdc

−

Vdc

MHz

ms ms

25 ms

+ 11 V

RB [ 20

− 9.0 V

tr, tf v 10 ns

DUTY CYCLE = 1.0%

− 5.0 V

RB AND RC VARIED TO OBTAIN DESIRED CURRENT LEVELS

D1 MUST BE FAST RECOVERY TYPE, e.g.: 1N5825 USED ABOVE IB [ 100 mA MSD6100 USED BELOW IB [ 100 mA

Figure 1. Switching Time Test Circuit

+ 125 V

RC [ 50

SCOPE

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1.0

0.7

0.5

0.3

0.2

VCC = 125 V IC/IB = 5.0 TJ = 25°C

0.1

0.07

t, TIME (s)μ

0.05

0.03

td @ V

BE(off)

= 5.0 V

0.02

0.01

0.05 5.0

0.07 3.00.30.2 0.5 0.7

1.00.1 2.0

IC, COLLECTOR CURRENT (AMP)

Figure 2. Turn−On Time

Page 3

1.0

0.7

0.5

0.3

0.2

0.1

0.07

0.05

r(t) EFFECTIVE TRANSIENT

0.03

0.02

THERMAL RESISTANCE (NORMALIZED)

0.01

2N6497

D = 0.5

0.2

0.1

0.05

0.02

SINGLE PULSE

0.01

0.02

0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 1000500

0.03 0.3 3.0 30 300 t, TIME OR PULSE WIDTH (ms)

Figure 3. Thermal Response

(pk)

DUTY CYCLE, D = t1/t

SINGLE

PULSE

JC(max)

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T

− TC = P

J(pk)

= 1.56°C/W

(pk)

JC(t)

5.0

2.0

1.0

0.5

0.2

0.1

, COLLECTOR CURRENT (AMP)

CURVES APPLY BELOW RATED V

0.05

0.02

5.0 1007.0

TC = 25°C

BONDING WIRE LIMITED THERMAL LIMIT (SINGLE PULSE) SECOND BREAKDOWN LIMIT

10 20 500

VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)

5.0 ms 1.0 ms

CEO

30 50 300200

Figure 4. Active−Region Safe Operating Area

7.0

5.0

3.0

2.0

1.0

t, TIME (s)μ

0.7

0.5

0.3

0.2

100 ms

VCC = 125 V IC/IB = 5.0 TJ = 25°C

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − V

limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 4 is based on TC = 25_C; T

J(pk)

is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% provided T v 150_C. T

may be calculated from the data in

J(pk)

Figure 3. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltage shown on Figure 4 may be found at any case temperature by using the appropriate curve on Figure 6.

100

SECOND BREAKDOWN DERATING

POWER DERATING FACTOR (%)

THERMAL DERATING

0.1

0.05 5.01.00.1 2.00.07 3.00.30.2 0.5 0.7 IC, COLLECTOR CURRENT (AMP)

Figure 5. Turn−Off Time

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0 20 40 60 80 100 120 140 160

TC, CASE TEMPERATURE (°C)

Figure 6. Power Derating

Page 4

2N6497

)

100

TJ = 150°C

VCE = 10 V

25°C

−55 °C

, DC CURRENT GAIN

7.0

5.0

0.05 0.1 0.2 0.3 1.00.07 0.70.5 2.0 3.0 5.0

IC, COLLECTOR CURRENT (AMP)

Figure 7. DC Current Gain

1.4

TJ = 25°C

1.2

1.0

0.8

BE(sat)

@ IC/IB = 5.0

4.0

3.2

2.4

1.6

IC = 1.0 A

2.0 A

3.0 A 5.0 A

0.8

, COLLECTOR−EMITTER VOLTAGE (VOLTS

0.01 0.05 0.1 0.2 1.0 10

0.02 0.5

2.0 5.0

IB, BASE CURRENT (mA)

Figure 8. Collector Saturation Region

+4.0

@V

*APPLIES FOR IC/IB v

+3.0

+2.0

+1.0

*qVC for V

FE

CE(sat)

+10V

CE

25°C to 150°C

TJ = 25°C

0.6

V, VOLTAGE (VOLTS)

0.4

0.2

0.05 0.1 0.2 0.3 1.00.07 0.70.5 2.0 3.0 5.0 0.05 0.1 0.2 0.3 1.00.07 0.70.5 2.0 3.0 5.0

VBE @ VCE = 10 V

@ IC/IB = 5.0

CE(sat)

IC/IB = 2.5

IC, COLLECTOR CURRENT (AMP)

Figure 9. “On” Voltages

VCE = 200 V

TJ = 150°C

100°C

−55 °C to 25°C

−1.0

qVB for V

−2.0

, TEMPERATURE COEFFICIENTS (mV/C)°θ

25°C to 150°C

−55 to 25°C

−3.0

IC, COLLECTOR CURRENT (AMP)

Figure 10. Temperature Coefficients

1000

700 500

300

200

100

TJ = 25°C

, COLLECTOR CURRENT (A)μI

−1

−2

25°C

REVERSE FORWARD

−0.2−0.1

0 +0.6+0.4+0.2

VBE, BASE−EMITTER VOLTAGE (VOLTS)

Figure 11. Collector Cutoff Region

C, CAPACITANCE (pF)

0.4

4.0 6.0 10 20 60 200 400400.6 1.0 2.0

100

VR, REVERSE VOLTAGE (VOLTS)

Figure 12. Capacitance

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Page 5

2N6497

PACKAGE DIMENSIONS

TO−220AB

CASE 221A−09

ISSUE AD

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

SEATING

−T−

PLANE

123

R J

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.

DIM MIN MAX MIN MAX

A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88

F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93

J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27

L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79

S 0.045 0.055 1.15 1.39

T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27

V 0.045 −−− 1.15 −−−

Z −−− 0.080 −−− 2.04

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

MILLIMETERSINCHES

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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2N6497/D