Datasheet 2N 6405 Datasheet (FREI)

Page 1

2N6400 Series

Preferred Device

Silicon Controlled Rectifiers

Reverse Blocking Thyristors

Designed primarily for half-wave ac control applications, such as motor controls, heating controls and power supplies; or wherever half−wave silicon gate−controlled, solid−state devices are needed.

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Features

• Glass Passivated Junctions with Center Gate Geometry for Greater

Parameter Uniformity and Stability

• Small, Rugged, Thermowatt Construction for Low Thermal

Resistance, High Heat Dissipation and Durability

• Blocking Voltage to 800 Volts

• Pb−Free Packages are Available*

SCRs 16 AMPERES RMS 50 thru 800 VOLTS

TO−220AB

CASE 221A

STYLE 3

x = 0, 1, 2, 3, 4 or 5 A = Assembly Location Y = Year WW = Work Week

PIN ASSIGNMENT

1 2 3 4

Cathode

Anode

Gate

Anode

MARKING DIAGRAM

AY WW 640x

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

 Semiconductor Components Industries, LLC, 2004

December, 2004 − Rev. 3

1 Publication Order Number:

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.

Preferred devices are recommended choices for future use and best overall value.

2N6400/D

Page 2

2N6400 Series

MAXIMUM RATINGS* (T

Peak Repetitive Off−State Voltage (Note 1)

= 40 to 125°C, Sine Wave 50 to 60 Hz; Gate Open)

On-State Current RMS (180° Conduction Angles; TC = 100°C) I Average On-State Current (180° Conduction Angles; TC = 100°C) I Peak Non-repetitive Surge Current (1/2 Cycle, Sine Wave 60 Hz, T

= 25°C unless otherwise noted)

Rating

2N6400 2N6401 2N6402 2N6403 2N6404 2N6405

= 90°C) I

Symbol Value Unit

DRM,

RRM

50 100 200 400 600 800

T(RMS)

T(AV)

TSM

16 A

10 A 160 A

Circuit Fusing Considerations (t = 8.3 ms) I2t 145 A2s Forward Peak Gate Power (Pulse Width ≤ 1.0 s, TC = 100°C) P Forward Average Gate Power (t = 8.3 ms, TC = 100°C) P Forward Peak Gate Current (Pulse Width ≤ 1.0 s, TC = 100°C) I Operating Junction Temperature Range T Storage Temperature Range T

G(AV)

stg

20 W

0.5 W

2.0 A

−40 to +125 °C

−40 to +150 °C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

1. V

and V

DRM

voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current

for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate

RRM

source such that the voltage ratings of the devices are exceeded.

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance, Junction−to−Case R Maximum Lead Temperature for Soldering Purposes 1/8 in from Case for 10 Seconds T

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted.)

Characteristic



JC L

Symbol Min Typ Max Unit

1.5 °C/W

260 °C

OFF CHARACTERISTICS

*Peak Repetitive Forward or Reverse Blocking Current

= Rated V

DRM

or V

, Gate Open) TJ = 25°C

RRM

= 125°C

DRM

RRM

−

2.0

A

ON CHARACTERISTICS

*Peak Forward On−State Voltage (ITM = 32 A Peak, Pulse Width ≤ 1 ms, Duty Cycle ≤ 2%) V *Gate Trigger Current (Continuous dc) TC = 25°C

= 12 Vdc, RL = 100 )T

= −40°C

*Gate Trigger Voltage (Continuous dc)

= 12 Vdc, RL = 100 )T

Gate Non−Trigger Voltage (VD = 12 Vdc, RL = 100 ), T

= 25°C

= −40°C

= +125°C V

*Holding Current TC = 25°C

= 12 Vdc, Initiating Current = 200 mA, Gate Open)

Turn-On Time (ITM = 16 A, IGT = 40 mAdc, VD = Rated V

Turn-Off Time (ITM = 16 A, IR = 16 A, VD = Rated V

DRM

= +125°C

= −40°C

) t

DRM

) = 25°C

− − 1.7 V

−

9.0−30 60

0.7−1.5

2.5

0.2 − − V

−

− 1.0 − s

−

s

DYNAMIC CHARACTERISTICS

Critical Rate−of−Rise of Off-State Voltage (VD = Rated V

= +125°C

*Indicates JEDEC Registered Data.

, Exponential Waveform)

DRM

dv/dt − 50 − V/s

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Page 3

2N6400 Series

Voltage Current Characteristic of SCR

+ Current

Anode +

Symbol Parameter

DRM

RRM

128

124

120

116

112

108

104

T , MAXIMUM CASE TEMPERATURE ( C)°

100

0 1.0 2.0 3.0 8.0

Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak On State Voltage Holding Current

α = CONDUCTION ANGLE

α = 30°

, AVERAGE ON-STATE FORWARD CURRENT (AMPS)

T(AV)

4.0 5.0

60°

6.0

Figure 1. Average Current Derating

90°

7.0

120°

on state

RRM

at V

RRM

+ Voltage

Reverse Blocking Region

(off state)

Reverse Avalanche Region

Forward Blocking Region

(off state)

DRM

at V

DRM

Anode −

≈ 125°C

60°

90°

120°

180°

α = 30°

8.0

180°

9.0

6.0

4.0

(AV)

P , AVERAGE POWER (WATTS)

2.0

α = CONDUCTION ANGLE

, AVERAGE ON-STATE FORWARD CURRENT (AMPS)

T(AV)

4.0 5.0 6.0

7.00 1.0 2.0 3.0 8.0

9.0 10

Figure 2. Maximum On−State Power Dissipation

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Page 4

200

100

7.0

5.0

2N6400 Series

= 25°C

125°C

3.0

2.0

, INSTANTANEOUS ON−STATE FORWARD CURRENT (AMPS)

1.0

0.7

0.5

0.3

0.2

1.0

0.7

0.5

0.3

0.2

0.1

0.07

0.05

0.03

0.02

0.8

0.4

1.6 2.42.0 4.0 4.41.2

2.8 3.63.2

vTM, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS)

Figure 3. On−State Characteristics Figure 4. Maximum Non−Repetitive Surge Current

160

150

140

130

120

TSM

I , PEAK SURGE CURRENT (AMP)

110

= 125°C

f = 60 Hz

SURGE IS PRECEDED AND FOLLOWED BY RATED CURRENT

1.0

2.0 3.0 4.0 6.0 8.0 10

NUMBER OF CYCLES

= R



JC(t)

1 CYCLE

• r(t)

0.01

0.1

r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)

0.2 0.3 0.5 1.0 2.0

3.0 5.0

30 50 100 200 300 500 2.0 k10 3.0 k 5.0 k 10 k1.0 k

t, TIME (ms)

Figure 5. Thermal Response

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Page 5

2N6400 Series

TYPICAL CHARACTERISTICS

100

70 50

30 20

7.0

5.0

, PEAK GATE CURRENT (mA)

3.0

2.0

1.0

0.9

0.8

0.7

0.6

OFF-STATE VOLTAGE = 12 V

= 50 

= −40°C

25°C

125°C

PULSE WIDTH (ms)

Figure 6. Typical Gate Trigger Current

versus Pulse Width

100

, GATE TRIGGER CURRENT (mA)

2001005020105.00.2 1.00.5 2.0

−40

, JUNCTION TEMPERATURE (°C)

125110806550355−10−25 20

Figure 7. Typical Gate Trigger Current

versus Junction T emperature

100

0.5

, GATE TRIGGER VOLTAGE (VOLTS)

0.4

0.3

0.2

−10−25 20

, JUNCTION TEMPERATURE (°C)

Figure 8. Typical Gate Trigger Voltage

versus Junction T emperature

I , HOLDING CURRENT (mA)

125110958050355−40

, JUNCTION TEMPERATURE (°C)

12511 0958050355−40 −10−25 20 65

Figure 9. Typical Holding Current

versus Junction T emperature

ORDERING INFORMATION

Device Package Shipping

2N6400 TO−220AB 2N6401 TO−220AB 2N6401G TO−220AB

2N6402 TO−220AB 2N6403 TO−220AB 2N6404 TO−220AB 2N6405 TO−220AB 2N6405G TO−220AB

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

(Pb−Free)

500 Units / Box

(Pb−Free)

†

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Page 6

2N6400 Series

PACKAGE DIMENSIONS

TO−220AB

CASE 221A−09

ISSUE AA

123

−T−

SEATING PLANE

R J

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.

DIM MIN MAX MIN MAX

A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 V 0.045 −−− 1.15 −−− Z −−− 0.080 −−− 2.04

STYLE 3:

PIN 1. CATHODE

2. ANODE

3. GATE

4. ANODE

MILLIMETERSINCHES

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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2N6400/D

Page 7

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