Datasheet 2N6107, 2N6109, 2N6111, 2N6288, 2N6292 Datasheet (ON Semiconductor)

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Page 1

PNP - 2N6107, 2N6109, 2N6111; NPN - 2N6288, 2N6292

2N6109 and 2N6292 are Preferred Devices

Complementary Silicon Plastic Power Transistors

These devices are designed for use in general-purpose amplifier and

switching applications.

Features

•DC Current Gain Specified to 7.0 Amperes

hFE= 30-150 @ I

= 3.0 Adc - 2N6111, 2N6288 = 2.3 (Min) @ IC = 7.0 Adc - All Devices

•Collector-Emitter Sustaining Voltage -

CEO(sus)

= 30 Vdc (Min) - 2N6111, 2N6288 = 50 Vdc (Min) - 2N6109 = 70 Vdc (Min) - 2N6107, 2N6292

•High Current Gain - Bandwidth Product

fT= 4.0 MHz (Min) @ IC = 500 mAdc - 2N6288, 90, 92

= 10 MHz (Min) @ IC = 500 mAdc - 2N6107, 09, 11

•TO-220AB Compact Package

•Pb-Free Packages are Available*

MAXIMUM RATINGS (Note 1)

Rating Symbol Value Unit

Collector-Emitter Voltage

2N6111, 2N6288

2N6109

2N6107, 2N6292

Collector-Base Voltage

2N6111, 2N6288

2N6109

2N6107, 2N6292

Emitter-Base Voltage V

Collector Current - Continuous

- Peak

Base Current I

Total Power Dissipation @ TC = 25_C Derate above 25_C

Operating and Storage Junction Temperature Range

CEO

TJ, T

-65 to +150 °C

stg

30 50 70

40 60 80

5.0 Vdc

7.0 10

3.0 Adc

0.32

Vdc

Adc

W/°C

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7 AMPERE

POWER TRANSISTORS

COMPLEMENTARY SILICON

30 - 50 - 70 VOLTS, 40 WATTS

MARKING DIAGRAM

TO-220AB

CASE 221A

STYLE 1

2N6xxx = Specific Device Code xxx = See Table on Page 4 G = Pb-Free Package A = Assembly Location Y = Year WW = Work Week

ORDERING INFORMATION

See detailed ordering, marking, and shipping information in the package dimensions section on page 4 of this data sheet.

Preferred devices are recommended choices for future use and best overall value.

2N6xxxG

AYWW

THERMAL CHARACTERISTICS

Characteristics Symbol Max Unit

Thermal Resistance, Junction-to-Case

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Indicates JEDEC Registered Data. *For additional information on our Pb-Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

© Semiconductor Components Industries, LLC, 2007

November, 2007 - Rev. 8

3.125

_C/W

1 Publication Order Number:

2N6107/D

Page 2

PNP - 2N6107, 2N6109, 2N6111; NPN - 2N6288, 2N6292

, POWER DISSIPATION (WATTS)

0 20 40 60 80 100 120 160

TC, CASE TEMPERATURE (°C)

Figure 1. Power Derating

140

ELECTRICAL CHARACTERISTICS (T

= 25_C unless otherwise noted) (Note 2)

Characteristic

OFF CHARACTERISTICS

Collector-Emitter Sustaining Voltage (Note 3)

(IC = 100 mAdc, IB = 0) 2N6111, 2N6288

2N6109

2N6107, 2N6292

Collector Cutoff Current (VCE = 20 Vdc, IB = 0) 2N6111, 2N6288 (VCE = 40 Vdc, IB = 0) 2N6109 (VCE = 60 Vdc, IB = 0) 2N6107, 2N6292

Collector Cutoff Current

(VCE = 40 Vdc, V (VCE = 60 Vdc, V (VCE = 80 Vdc, V (VCE = 30 Vdc, V (VCE = 50 Vdc, V (VCE = 70 Vdc, V

= 1.5 Vdc) 2N6111, 2N6288

EB(off)

= 1.5 Vdc) 2N6109

EB(off)

= 1.5 Vdc) 2N6107, 2N6292

EB(off)

= 1.5 Vdc, TC = 150_C) 2N6111, 2N6288

EB(off)

= 1.5 Vdc, TC = 150_C) 2N6109

EB(off)

= 1.5 Vdc, TC = 150_C) 2N6107, 2N6292

EB(off)

Emitter Cutoff Current (VBE = 5.0 Vdc, IC = 0)

ON CHARACTERISTICS (Note 3)

DC Current Gain

(IC = 2.0 Adc, VCE = 4.0 Vdc) 2N6107, 2N6292 (IC = 2.5 Adc, VCE = 4.0 Vdc) 2N6109 (IC = 3.0 Adc, VCE = 4.0 Vdc) 2N6111, 2N6288 (IC = 7.0 Adc, VCE = 4.0 Vdc) All Devices

Collector-Emitter Saturation Voltage (IC = 7.0 Adc, IB = 3.0 Adc)

Base-Emitter On Voltage (IC = 7.0 Adc, VCE = 4.0 Vdc)

DYNAMIC CHARACTERISTICS

Current Gain — Bandwidth Product (Note 4)

(IC = 500 mAdc, VCE = 4.0 Vdc, f

= 1.0 MHz) 2N6288, 92

test

2N6107, 09, 11

Output Capacitance (VCB = 10 Vdc, IE = 0, f = 1.0 MHz)

Small-Signal Current Gain (IC = 0.5 Adc, VCE = 4.0 Vdc, f = 50 kHz)

2. Indicates JEDEC Registered Data.

3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.

4. fT = |hfe| • f

test

Symbol

CEO(sus)

CEO

CEX

EBO

CE(sat)

BE(on)

Min

30 50 70

30 30 30

2.3

4.0 10

Max

1.0

100 100 100

2.0

1.0

150 150 150

3.5

3.0

250

Unit

Vdc

mAdc

Vdc

MHz

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Page 3

PNP - 2N6107, 2N6109, 2N6111; NPN - 2N6288, 2N6292

+30 V

25 ms

+11 V

-9.0 V

tr, tf ≤ 10 ns

-4 V

DUTY CYCLE = 1.0%

RB and RC ARE VARIED TO OBTAIN DESIRED CURRENT LEVELS

D1 MUST BE FAST RECOVERY TYPE, eg: 1N5825 USED ABOVE I MSD6100 USED BELOW I

≈ 100 mA

Figure 2. Switching Time Test Circuit

2.0

1.0

0.7

0.5

0.3

t, TIME (s)μ

0.2

0.1

0.07

0.05

0.03

0.02

0.07

0.1 0.2 0.3 0.5 2.0 3.0 7.0 IC, COLLECTOR CURRENT (AMP)

td @ V

BE(off)

≈ 5.0 V

1.0 5.0

TJ = 25°C VCC = 30 V IC/IB = 10

SCOPE

1.0

0.7 D = 0.5

0.5

0.3

0.2

0.1

0.07

0.2

0.1

0.05

0.03

0.02

0.01

r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED)

SINGLE PULSE

0.02 0.1 0.50.2

Figure 3. Turn-On Time

= r(t) R

JC(t)

= 3.125°C/W MAX

(pk)

D CURVES APPLY FOR POWER

0.01

PULSE TRAIN SHOWN READ TIME AT t T

- TC = P

J(pk)

(pk)

(t)

DUTY CYCLE, D = t1/t

0.05 1.0 2.0 5.0 10 20 50 100 200 1.0 k500 t, TIME (ms)

Figure 4. Thermal Response

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Page 4

PNP - 2N6107, 2N6109, 2N6111; NPN - 2N6288, 2N6292

15 10

)

7.0

5.0

3.0

2.0

URRENT (AMP R

1.0

0.7

LLE

0.5

0.3

0.2

0.15

1.0

CURRENT LIMIT SECONDARY BREAKDOWN LIMIT THERMAL LIMIT @ TC = 25°C (SINGLE PULSE)

5.0 10

2.0 3.0

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

7.0

20 30 50 70 100

Figure 5. Active-Region Safe Operating Area

5.0

3.0

2.0

1.0 5.0

IC, COLLECTOR CURRENT (AMP)

t, TIME (s)μ

1.0

0.7

0.5

0.3

0.2

0.1

0.07

0.05

0.07

0.1 0.2 0.3 0.5 2.0 3.0 7.0

0.5 ms

TJ = 25°C VCC = 30 V IC/IB = 10 IB1 = I

0.1 ms

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I

- V

limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater

0.1 ms

dissipation than the curves indicate.

The data of Figure 5 is based on T

= 150_C; TC is

J(pk)

variable depending on conditions. Second breakdown

5.0 ms

pulse limits are valid for duty cycles to 10% provided T

v 150_C. T

J(pk)

may be calculated from the data in

J(pk)

Figure 4. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown.

300

200

100

C, CAPACITANCE (pF)

0.5

3.0 5.0 501.0 2.0

VR, REVERSE VOLTAGE (VOLTS)

TJ = 25°C

10 20 30

Figure 6. Turn-Off Time

ORDERING INFORMATION

Device Device Marking Package Shipping

2N6107

2N6107G TO-220AB

2N6109

2N6109G TO-220AB

2N6111

2N6111G TO-220AB

2N6288

2N6288G TO-220AB

2N6292

2N6292G TO-220AB

2N6107

2N6109

2N6111

2N6288

2N6292

TO-220AB

(Pb-Free)

TO-220AB

(Pb-Free)

TO-220AB

(Pb-Free)

TO-220AB

(Pb-Free)

TO-220AB

(Pb-Free)

Figure 7. Capacitance

50 Units / Rail

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Page 5

PNP - 2N6107, 2N6109, 2N6111; NPN - 2N6288, 2N6292

PACKAGE DIMENSIONS

TO-220

CASE 221A-09

ISSUE AE

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

SEATING

-T-

PLANE

123

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.

DIM MIN MAX MIN MAX

A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.161 3.61 4.09 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93

J 0.014 0.025 0.36 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 V 0.045 --- 1.15 --- Z --- 0.080 --- 2.04

MILLIMETERSINCHES

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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2N6107/D