Datasheet 2N6075BG Specification

2N6071A/B Series

Preferred Device

Sensitive Gate Triacs

Silicon Bidirectional Thyristors

Designed primarily for full-wave ac control applications, such as
light dimmers, motor controls, heating controls and power supplies; or
wherever full-wave silicon gate controlled solid-state devices are
needed. Triac type thyristors switch from a blocking to a conducting
state for either polarity of applied anode voltage with positive or
negative gate triggering.

• Sensitive Gate Triggering Uniquely Compatible for Direct Coupling

to TTL, HTL, CMOS and Operational Amplifier Integrated Circuit
Logic Functions

• Gate Triggering 4 Mode — 2N6071A,B, 2N6073A,B, 2N6075A,B

• Blocking Voltages to 600 Volts

• All Diffused and Glass Passivated Junctions for Greater Parameter

Uniformity and Stability

• Small, Rugged, Thermopad Construction for Low Thermal

Resistance, High Heat Dissipation and Durability

• Device Marking: Device T ype, e.g., 2N6071A, Date Code

MAXIMUM RATINGS (T

Rating

*Peak Repetitive Off-State Voltage

(TJ = *40 to 110°C, Sine Wave,
50 to 60 Hz, Gate Open)

*On-State RMS Current (TC = 85°C)

Full Cycle Sine Wave 50 to 60 Hz

*Peak Non–repetitive Surge Current

(One Full cycle, 60 Hz, TJ = +110°C)

Circuit Fusing Considerations

(t = 8.3 ms)

*Peak Gate Power

(Pulse Width ≤ 1.0 µs, TC = 85°C)

*Average Gate Power

(t = 8.3 ms, TC = 85°C)

*Peak Gate Voltage

(Pulse Width ≤ 1.0 µs, TC = 85°C)

*Operating Junction Temperature Range T

*Storage Temperature Range T

Mounting Torque (6-32 Screw)

*Indicates JEDEC Registered Data.
(1) V

(2) Torque rating applies with use of a compression washer. Mounting torque in

and V

DRM

voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.

excess of 6 in. lb. does not appreciably lower case-to-sink thermal
resistance. Main terminal 2 and heatsink contact pad are common.

RRM

= 25°C unless otherwise noted)

J

Symbol Value Unit

(1)

2N6071A,B
2N6073A,B
2N6075A,B

(2)

for all types can be applied on a continuous basis. Blocking

V

DRM,

V

RRM

200
400
600

I

T(RMS)

I

TSM

I2t 3.7 A2s

P

GM

P

G(AV)

V

GM

J

stg

— 8.0 in. lb.

4.0 Amps

30 Amps

10 Watts

0.5 Watt

5.0 Volts

–40 to

+110

–40 to

+150

Volts

°C

°C

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TRIACS

4 AMPERES RMS

200 thru 600 VOLTS

MT2

3

2

1

TO–225AA

(formerly TO–126)

CASE 077

STYLE 5

PIN ASSIGNMENT

1
2
3

Main Terminal 1
Main Terminal 2

ORDERING INFORMATION

Device Package Shipping

2N6071A TO225AA 500/Box
2N6071B TO225AA 500/Box
2N6073A TO225AA 500/Box
2N6073B TO225AA 500/Box
2N6075A TO225AA 500/Box
2N6075B TO225AA 500/Box

Preferred devices are recommended choices for future use
and best overall value.

MT1

G

Gate

 Semiconductor Components Industries, LLC, 2000

May, 2000 – Rev. 3

1 Publication Order Number:

2N6071/D

2N6071A/B Series

(Main Terminal Voltage

Vdc, R

L

100 ohms)

2N6073A

2N6073B

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

*Thermal Resistance, Junction to Case R
Thermal Resistance, Junction to Ambient R

Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds T

θJC
θJA

L

3.5 °C/W
75 °C/W

260 °C

ELECTRICAL CHARACTERISTICS (T

Characteristic

= 25°C unless otherwise noted; Electricals apply in both directions)

C

OFF CHARACTERISTICS

*Peak Repetitive Blocking Current

(VD = Rated V

DRM

, V

Gate Open) TJ = 25°C

RRM;

TJ = 110°C

ON CHARACTERISTICS

*Peak On-State Voltage

(ITM = "6 A Peak)

*Gate Trigger Voltage (Continuous dc)

(Main Terminal Voltage = 12 Vdc, RL = 100 Ohms, TJ = –40°C)
All Quadrants

Gate Non–Trigger Voltage

(Main Terminal Voltage = 12 Vdc, RL = 100 Ohms, TJ = 110°C)
All Quadrants

*Holding Current

(Main Terminal Voltage = 12 Vdc, Gate Open,
Initiating Current = "1 Adc) (TJ = –40°C)

Turn-On Time

(ITM = 14 Adc, IGT = 100 mAdc)

Gate Trigger Current (Continuous dc)

(1)

= 12

(TJ = 25°C)

=

Type

2N6071A

2N6075A
2N6071B

Symbol Min Typ Max Unit

I

DRM,

I

RRM

V

TM

V

GT

V

GD

I

H

t

gt

I

GT

@ T

J

+25°C 5 5 5 10
–40°C 20 20 20 30
+25°C 3 3 3 5

—
—

— — 2 Volts

— 1.4 2.5

0.2 — —

—
—

— 1.5 — µs

I

mA

—
—

—
—

QUADRANT

(Maximum Value)

II

mA

10

2

30
15

III

mA

µA

mA

Volts

Volts

mA

IV

mA

DYNAMIC CHARACTERISTICS

Critical Rate of Rise of Commutation Voltage

@ V
Commutating di/dt = 2.0 A/ms

*Indicates JEDEC Registered Data.
(1) Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.

, TJ = 85°C, Gate Open, ITM = 5.7 A, Exponential Waveform,

DRM

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2N6075B

2

–40°C 15 15 15 20

dv/dt(c) — 5 — V/µs

2N6071A/B Series

SAMPLE APPLICATION:

TTL-SENSITIVE GATE 4 AMPERE TRIAC

TRIGGERS IN MODES II AND III

0 V

–V

EE

Symbol Parameter

V

DRM

I

DRM

V

RRM

I

RRM

V

TM

I

H

Peak Repetitive Forward Off State Voltage
Peak Forward Blocking Current
Peak Repetitive Reverse Off State Voltage
Peak Reverse Blocking Current

Maximum On State Voltage
Holding Current

14

MC7400

4

7

VEE = 5.0 V

+

Trigger devices are recommended for gating on Triacs. They provide:

1. Consistent predictable turn-on points.

2. Simplified circuitry.

3. Fast turn-on time for cooler, more efficient and reliable operation.

510

Ω

Voltage Current Characteristic of Triacs

(Bidirectional Device)

on state

I

at V

RRM

RRM

Quadrant 3
MainTerminal 2 –

V

TM

2N6071A

+ Current

I

H

LOAD

V

I

H

off state

TM

115 VAC

60 Hz

Quadrant 1
MainTerminal 2 +

I

at V

DRM

DRM

+ Voltage

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3

2N6071A/B Series

g

Quadrant Definitions for a Triac

MT2 POSITIVE

(Positive Half Cycle)

+

(+) MT2

Quadrant II Quadrant I

(–) I

GATE

GT

MT1

REF

(+) I

GATE

(+) MT2

GT

MT1

REF

IGT – + I

(–) MT2

Quadrant III Quadrant IV

(–) I

GATE

GT

MT1

REF

(+) I

GATE

(–) MT2

GT

MT1

REF

–

MT2 NEGATIVE

(Negative Half Cycle)

All polarities are referenced to MT1.
With in–phase signals (using standard AC lines) quadrants I and III are used.

GT

SENSITIVE GATE LOGIC REFERENCE

IC Logic

Functions

TTL 2N6071A

HTL 2N6071A

CMOS (NAND) 2N6071B

CMOS (Buffer) 2N6071B

Operational

Amplifier

Zero Voltage

Switch

I II III IV

Series

2N6071A

Series

Firing Quadrant

Series

Series

Series

2N6071A

Series

2N6071A

Series

2N6071A

Series

2N6071B

Series

2N6071A

Series

2N6071B

Series

2N6071A

Series

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4

2N6071A/B Series

110

°

100

α = 30°

90

80

C

T , CASE TEMPERATURE ( C)

70

α

α = CONDUCTION ANGLE

0 1.0 2.0

a

I

, AVERAGE ON-STATE CURRENT (AMP)

T(AV)

Figure 1. Average Current Derating Figure 2. RMS Current Derating

8.0
a

6.0

4.0

a

α = CONDUCTION ANGLE

α = 30°

60°

60°

90°

90°

120°

120°

3.0

180°

180°

110

°

100

90

dc

80

C

T , CASE TEMPERATURE ( C)

α = CONDUCTION ANGLE

4.0

dc

70

0 1.0 2.0

8.0

6.0
α = CONDUCTION ANGLE

4.0

a

a

I

, RMS ON-STATE CURRENT (AMP)

T(RMS)

a

a

120°

α = 30°

120°

α = 180°

180°

3.0

60°

90°

dc

4.0

dc

2.0

(AV)

P , AVERAGE POWER (WATTS)

0

0 1.0 2.0

I

, AVERAGE ON-STATE CURRENT (AMP)

T(AV)

3.0 0

4.0

Figure 3. Power Dissipation Figure 4. Power Dissipation

3.0
OFF-STATE VOLTAGE = 12 Vdc

2.0 2.0

1.0

0.7

0.5

, GATE TRIGGER VOLTAGE (NORMALIZED)

GT

V

0.3

ALL MODES

140120100806040200–20–40–60

Figure 5. Typical Gate–Trigger Voltage Figure 6. Typical Gate–Trigger Current

2.0

(AV)

P , AVERAGE POWER (WATTS)

0

I

, RMS ON-STATE CURRENT (AMP)

T(RMS)

3.0
OFF-STATE VOLTAGE = 12 Vdc

ALL MODES

1.0

0.7

0.5

, GATE TRIGGER CURRENT (NORMALIZED)

GT

I

0.3

–60 –40 –20 0 20 40 60 80 100 140

TJ, JUNCTION TEMPERATURE (°C)TJ, JUNCTION TEMPERATURE (°C)

60°

90°

30°

4.03.02.01.0

120

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5

2N6071A/B Series

40
30

20

10

7.0

5.0

3.0

2.0

, ON-STATE CURRENT (AMP)

TM

I

1.0

0.7

0.5

0.3

0.2

0.1

TJ = 110°C

TJ = 25°C

0 1.0 2.0 3.0 4.0 5.0

VTM, ON-STATE VOLTAGE (VOLTS)

3.0

2.0

1.0

0.7

0.5

, HOLDING CURRENT (NORMALIZED)

H

I

0.3
–60 –40 –20 0 20 40 60 80 100 120 140

TJ, JUNCTION TEMPERATURE (°C)

GATE OPEN
APPLIES TO EITHER DIRECTION

Figure 8. Typical Holding Current

34
32

30
28
26
24
22
20
18

PEAK SINE WA VE CURRENT (AMP)

16
14

TJ= –40 to +110°C

f = 60 Hz

1.0 2.0 3.0 4.0 5.0 7.0 10
NUMBER OF FULL CYCLES

Figure 7. Maximum On–State Characteristics

10

°C/W)

5.0

3.0

2.0

1.0

0.5

0.3

, TRANSIENT THERMAL IMPEDANCE (

0.2

θJC(t)

0.1

Z

Figure 9. Maximum Allowable Surge Current

MAXIMUM

TYPICAL

0.20.1 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k
t, TIME (ms)

Figure 10. Thermal Response

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2N6071A/B Series

P ACKAGE DIMENSIONS

TO–225AA

(formerly TO–126)

CASE 077–09

ISSUE W

–B–

–A–

K

F

M

U

Q

132

H

V

G

0.25 (0.010) B

S

D

2 PL

M

0.25 (0.010) B

A

C

J

R

M

M

A

M

M

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

DIM MIN MAX MIN MAX

A 0.425 0.435 10.80 11.04
B 0.295 0.305 7.50 7.74
C 0.095 0.105 2.42 2.66
D 0.020 0.026 0.51 0.66
F 0.115 0.130 2.93 3.30
G 0.094 BSC 2.39 BSC
H 0.050 0.095 1.27 2.41
J 0.015 0.025 0.39 0.63
K 0.575 0.655 14.61 16.63
M 5 TYP 5 TYP

__

Q 0.148 0.158 3.76 4.01
R 0.045 0.065 1.15 1.65
S 0.025 0.035 0.64 0.88
U 0.145 0.155 3.69 3.93
V 0.040 ––– 1.02 –––

STYLE 5:

PIN 1. MT 1

2. MT 2

3. GATE

MILLIMETERSINCHES

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2N6071A/B Series

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2N6071/D