These medium−power, high−performance plastic devices are
designed for driver circuits, switching, and amplifier applications.
Features
• Low Saturation Voltage − V
• Excellent Power Dissipation, P
= 0.6 Vdc (Max) @ IC = 1.0 A
CE(sat)
= 30 W @ TC = 25_C
D
• Excellent Safe Operating Area
• Gain Specified to I
= 1.0 A
C
• Complement to NPN 2N4921, 2N4922, 2N4923
• Pb−Free Package is Available*
MAXIMUM RATINGS
RatingSymbolValueUnit
Collector − Emitter Voltage
Collector − Base Voltage
Emitter − Base VoltageV
Collector Current − Continuous
(Note 1)
Base CurrentI
Total Power Dissipation @ TA = 25°C
Derate above 25°C
Operating and Storage Junction
Temperature Range
Stresses exceeding those listed in the Maximum Ratings table may damage
the device. If any of these limits are exceeded, device functionality should not
be assumed, damage may occur and reliability may be affected.
1. The 1.0 A max I
3.0 A max value is based upon actual current−handling capability of the
device (See Figure 5).
2. Indicates JEDEC Registered Data for 2N4918 Series.
value is based upon JEDEC current gain requirements. The
C
2N4918
2N4919
2N4920
2N4918
2N4919
2N4920
THERMAL CHARACTERISTICS (Note 3)
Characteristic
Thermal Resistance,
Junction−to−Case
3. Recommend use of thermal compound for lowest thermal resistance.
V
CEO
V
CBO
EBO
I
C
(Note 2)
B
P
D
TJ, T
stg
SymbolMaxUnit
q
JC
40
60
80
40
60
80
5.0Vdc
1.0
3.0
1.0Adc
30
0.24
−65 to +150°C
4.16°C/W
Vdc
Vdc
Adc
W/°C
http://onsemi.com
3.0 A, 40−80 V, 30 W
GENERAL PURPOSE
POWER TRANSISTORS
4
1
2
3
FRONT VIEWBACK VIEW
MARKING DIAGRAM
W
xx= 18, 19, 20
Y= Year
WW= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
3
2
TO−225
CASE 077
STYLE 1
YWW
2N
49xx
1
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Small−Signal Current Gain (IC = 250 mAdc, VCE = 10 Vdc, f = 1.0 kHz)
4. Pulse Test: PW [ 300 ms, Duty Cycle [ 2.0%
Symbol
V
CEO(sus)
I
CEO
I
CEX
I
CBO
I
EBO
h
FE
V
CE(sat)
V
BE(sat)
V
BE(on)
f
T
C
ob
h
fe
Min
40
60
80
−
−
−
−
−
−
−
40
30
10
−
−
−
3.0
−
25
Max
−
−
−
0.5
0.5
0.5
0.1
0.5
0.1
1.0
−
150
−
0.6
1.3
1.3
−
100
−
Unit
Vdc
mAdc
mAdc
mAdc
mAdc
−
Vdc
Vdc
Vdc
MHz
pF
−
ORDERING INFORMATION
DevicePackageShipping
2N4918TO−225500 Unit / Bulk
2N4919TO−225500 Unit / Bulk
2N4920TO−225500 Unit / Bulk
2N4920GTO−225
500 Unit / Bulk
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifi-
cations Brochure, BRD8011/D.
†
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2
Page 3
V
BE(off)
V
in
APPROX
-11 V
APPROX
-11 V
0
t
1
t
2
in
TURN-OFF PULSE
APPROX 9.0 V
0V
t
100 < t
t
t
DUTY CYCLE ≈ 2.0%
3
< 15 ns
1
< 15 ns
3
2N4918 − 2N4920 Series
40
30
20
10
, POWER DISSIPATION (WATTS)
D
P
0
255075100125150
TC, CASE TEMPERATURE (°C)
Figure 1. Power Derating
5.0
V
CC
V
Cjd<<C
< 500 ms
2
R
C
in
R
B
eb
SCOPE
+4.0 V
RB and R
C
varied to
obtain desired
current levels
t, TIME (s)μ
3.0
2.0
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
VCC = 30 V
t
d
VCC = 30 V
V
BE(off)
10
= 0
20 3050 70 100200700 1000
V
= 30 V
CC
= 20
I
C/IB
VCC = 60 V
IC/IB = 10, UNLESS NOTED
t
r
V
= 2.0 V
BE(off)
IC, COLLECTOR CURRENT (mA)
TJ = 25°C
= 150°C
T
J
VCC = 60 V
300500
Figure 2. Switching Time Equivalent Test Circuit
Figure 3. Turn−On Time
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3
Page 4
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
(NORMALIZED)
0.03
0.02
r(t), TRANSIENT THERMAL RESISTANCE
0.01
0.01
D = 0.5
0.2
0.1
0.05
0.01
SINGLE PULSE
0.02 0.03
2N4918 − 2N4920 Series
P
qJC(t) = r(t) q
qJC = 4.16°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
T
J(pk)
0.050.10.2 0.30.51.02.0 3.05.01020 3050100200 3001000500
t, TIME (ms)
- TC = P
JC
1
(pk) qJC
(t)
Figure 4. Thermal Response
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
2
10
dc
= 25°C
C
1.0 ms
5.0
2.0
1.0
0.5
, COLLECTOR CURRENT (AMP)
C
I
0.2
0.1
1.0
TJ = 150°C
SECOND BREAKDOWN LIMITED
BONDING WIRE LIMITED
THERMALLY LIMIT @ T
PULSE CURVES APPLY BELOW
RATED V
2.0 3.05.01020 305010070
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
5.0 ms
CEO
7.0
Figure 5. Active−Region Safe Operating Area
5.0
100
IC/IB = 20
200 300
3.0
2.0
1.0
0.7
0.5
0.3
, STORAGE TIME (s)
0.2
′
s
tμ
0.1
0.07
0.05
10
IC/IB = 10
ts′ = ts - 1/8 t
20 3050 70500 700 1000
f
IC, COLLECTOR CURRENT (mA)
TJ = 25°C
= 150°C
T
J
IB1 = I
B2
100 ms
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
− V
C
CE
operation i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 5 is based on T
= 150_C; TC is
J(pk)
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T
J(pk)
v 150_C. At high case temperatures, thermal limitations
will reduce the power that can be handled to values less than
the limitations imposed by second breakdown.
5.0
3.0
2.0
1.0
0.7
0.5
0.3
, FALL TIME (s)
f
tμ
0.2
0.1
0.07
0.05
10
IC/IB = 20
IC/IB = 10
20 3050 70500 700 1000
IC, COLLECTOR CURRENT (mA)
100
200 300
TJ = 25°C
= 150°C
T
J
VCC = 30 V
= I
I
B1
B2
Figure 6. Storage Time
Figure 7. Fall Time
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4
Page 5
2N4918 − 2N4920 Series
TYPICAL DC CHARACTERISTICS
1000
700
500
300
TJ = 150°C
200
100
, DC CURRENT GAIN
FE
h
70
50
30
25°C
-55°C
20
10
2.0
3.0 5.01020 30200 300 5002000
5010010003.030100
IC, COLLECTOR CURRENT (mA)
Figure 8. Current Gain
8
10
IC = 10 I
7
10
6
10
5
10
4
10
IC ≈ I
CES
I
VALUES
CES
OBTAINED FROM
CES
IC = 2x I
FIGURE 13
, EXTERNAL BASE-EMITTER RESISTANCE (OHMS)
3
10
BE
0
R
306090120150
TJ, JUNCTION TEMPERATURE (°C)
Figure 10. Effects of Base−Emitter Resistance
VCE = 1.0 V
VCE = 30 V
CES
1.0
IC = 0.1 A
0.25 A0.5 A1.0 A
0.8
0.6
TJ = 25°C
0.4
0.2
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
V
0
0.2
0.3 0.51.02.05.0102050200
IB, BASE CURRENT (mA)
Figure 9. Collector Saturation Region
1.5
1.2
TJ = 25°C
0.9
V
@ IC/IB = 10
BE(sat)
0.6
VOLTAGE (VOLTS)
VBE @ VCE = 2.0 V
0.3
V
@ IC/IB = 10
CE(sat)
0
5.01020 30 50100 200 3002000
2.0
3.0500 1000
, COLLECTOR CURRENT (mA)
I
C
Figure 11. “On” Voltage
2
10
1
10
TJ = 150°C
0
10
-1
10
100°C
-2
10
, COLLECTOR CURRENT (A)μI
4
C
10
IC = I
CES
VCE = 30 V
25°C
REVERSE
3
10
-0.2
-0.10+0.1+0.2+0.3+0.4+0.5
FORWARD
VBE, BASE-EMITTER VOLTAGE (VOLTS)
Figure 12. Collector Cut−Off Region
+2.5
h
@V
FE
+2.0
+1.5
+1.0
+0.5
*APPLIES FOR I
0
*qVC FOR V
CE(sat)
C/IB
<
CE
2
TJ = 100°C to 150°C
TJ = -55°C to +100°C
-0.5
-1.0
-1.5
-2.0
TEMPERATURE COEFFICIENTS (mV/ C)°
-2.5
2.0
3.0 5.01020 30 50100 2002000
qVB FOR V
BE
300 500 1000
IC, COLLECTOR CURRENT (mA)
Figure 13. Temperature Coefficients
+1.0V
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5
Page 6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
4
TO−225
CASE 77−09
ISSUE AD
DATE 25 MAR 2015
1
2
3
3
2
1
FRONT VIEWBACK VIEW
SCALE 1:1
Q
P
2X
b2
e
2X
E
A1
D
123
L1
b
c
FRONT VIEWSIDE VIEW
A
PIN 4
BACKSIDE TAB
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. NUMBER AND SHAPE OF LUGS OPTIONAL.
MILLIMETERS
DIM MINMAX
A2.403.00
A11.001.50
b0.600.90
b20.510.88
c0.390.63
D 10.60 11.10
E7.407.80
e2.042.54
L 14.50 16.63
L11.272.54
P2.903.30
Q3.804.20
GENERIC
MARKING DIAGRAM*
YWW
XX
XXXXXG
Y= Year
WW= Work Week
XXXXX = Device Code
G= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 1:
PIN 1. EMITTER
2., 4. COLLECTOR
3. BASE
STYLE 6:
PIN 1. CATHODE
2., 4. GATE
3. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
STYLE 4:
PIN 1. ANODE 1
2., 4. ANODE 2
3. GATE
STYLE 9:
PIN 1. GATE
2., 4. DRAIN
3. SOURCE
STYLE 5:
PIN 1. MT 1
2., 4. MT 2
3. GATE
STYLE 10:
PIN 1. SOURCE
2., 4. DRAIN
3. GATE
PAGE 1 OF 1
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Page 7
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