Datasheet 2N4264 Datasheet (ON Semiconductor)

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SEMICONDUCTOR TECHNICAL DATA

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NPN Silicon

2

BASE

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector–Emitter Voltage V
Collector–Base Voltage V
Emitter–Base Voltage V
Collector Current — Continuous I
Total Device Dissipation @ TA = 25°C

Derate above 25°C

Total Device Dissipation @ TC = 25°C

Derate above 25°C

Operating and Storage Junction

T emperature Range

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance, Junction to Ambient R
Thermal Resistance, Junction to Case R

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

A

Characteristic

OFF CHARACTERISTICS

Collector–Emitter Breakdown Voltage

(IC = 1.0 mAdc, IB = 0)

Collector–Base Breakdown Voltage

(IC = 10 mAdc, IE = 0)

Emitter–Base Breakdown Voltage

(IE = 10 mAdc, IC = 0)

Base Cutoff Current

(VCE = 12 Vdc, V
(VCE = 12 Vdc, V

Collector Cutoff Current

(VCE = 12 Vdc, V

= 0.25 Vdc)

EB(off)

= 0.25 Vdc, TA = 100°C)

EB(off)

= 0.25 Vdc)

EB(off)

CEO
CBO
EBO

P

P

TJ, T

q

q

C

D

D

stg

JA
JC

15 Vdc
30 Vdc

6.0 Vdc
200 mAdc
350

2.8

1.0

8.0

–55 to +150 °C

357 °C/W
125 °C/W

COLLECTOR

3

1

EMITTER

mW/°C

mW/°C

mW

Watts

Order this document

by 2N4264/D

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1

2

3

CASE 29–04, STYLE 1

TO–92 (TO–226AA)

Symbol Min Max Unit

V

(BR)CEO

V

(BR)CBO

V

(BR)EBO

I

BEV

I

CEX

15 —

30 —

6.0 —

—
—

— 100

0.1
10

Vdc

Vdc

Vdc

µAdc

nAdc

REV 2

Motorola Small–Signal Transistors, FETs and Diodes Device Data

 Motorola, Inc. 1997

1

2N4264

)

(

CC

,

EB(off)

,

(I

100 mA f

tf)

ELECTRICAL CHARACTERISTICS

(TA = 25°C unless otherwise noted) (Continued)

Characteristic Symbol Min Max Unit

ON CHARACTERISTICS

DC Current Gain

(IC = 1.0 mAdc, VCE = 1.0 Vdc)
(IC = 10 mAdc, VCE = 1.0 Vdc)
(IC = 10 mAdc, VCE = 1.0 Vdc, TA = –55°C)

(IC = 30 mAdc, VCE = 1.0 Vdc)
(IC = 100 mAdc, VCE = 1.0 Vdc)
(IC = 200 mAdc, VCE = 1.0 Vdc)

Collector–Emitter Saturation Voltage

(IC = 10 mAdc, IB = 1.0 mAdc)
(IC = 100 mAdc, IB = 10 mAdc)

Base–Emitter Saturation Voltage

(IC = 10 mAdc, IB = 1.0 mAdc)
(IC = 100 mAdc, IB = 10 mAdc)

(1)
(1)

(1)

(1)

SMALL–SIGNAL CHARACTERISTICS

Current–Gain — Bandwidth Product

(IC = 10 mAdc, VCE = 10 Vdc, f = 100 MHz)

Input Capacitance

(VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz)

Output Capacitance

(VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz, IE = 0)

SWITCHING CHARACTERISTICS

Delay Time
Rise Time
Storage Time

Fall Time
Turn–On Time (VCC = 3.0 Vdc, V

Turn–Off Time (VCC = 3.0 Vdc, IC = 10 mAdc,

Storage Time (VCC = 10 Vdc, IC = 10 mA,

Total Control Charge (VCC = 3.0 Vdc, IC = 10 mAdc, IB = mAdc)

1. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2.0%.

(VCC = 10 Vdc, V
IC = 100 mAdc, IB1 = 10 mAdc) (Fig. 1, Test Condition C)

VCC = 10 Vdc, (IC = 10 mAdc, for ts)

=

C

(IB1 = –10 mA) (IB2 = 10 mA) (Fig. 1, Test Condition C)

IC = 10 mAdc, IB1 = 3.0 mAdc) (Fig. 1, Test Condition A)

IB1 = 3.0 mAdc, IB2 = 1.5 mAdc) (Fig. 1, Test Condition A)

IB1 = IB2 = 10 mAdc) (Fig. 1, Test Condition B)

(Fig. 3, Test Condition A)

or

EB(off

EB(off)

= 2.0 Vdc,

= 1.5 Vdc,

h

FE

V

CE(sat)

V

BE(sat)

f

C

ibo

C

obo

t

t

t

t

on

t

off

t

Q

25
40
20
40
30
20

—
—

0.65

0.75

T

d

r

s

t

f

s

T

300 — MHz

— 8.0 pF

— 4.0 pF

— 8.0 ns
— 15 ns
— 20 ns

— 15 ns
— 25 ns

— 35 ns

— 20 ns

— 80 pC

—

160

—
—
—
—

0.22

0.35

0.8

0.95

—

Vdc

Vdc

Test

Condition

A

B

C

2

Figure 1. Switching Time Equivalent Test Circuit

V

ICV

mA

10
10

100

CC

V

3
10
10

R

S

Ω

3300

560
560

R

Ω

270
960

96

C

C

S(max)

pF

12

t

V

BE(off)

4
4

–1.5

—

–2.0

V

V

1

V

V

10.55
—

6.35

–4.15
–4.65
–4.65

V

2

3

V

V

10.70

6.55

6.55

00

V

EB(off)

on
t

1

V

1

<2 ns <2 ns

PULSE WIDTH (t1) = 300 ns DUTY CYCLE = 2%

t

off
t

1

V

3

V

2

CC

R

C

R

B

C

S

Motorola Small–Signal Transistors, FETs and Diodes Device Data

CURRENT GAIN CHARACTERISTICS

2N4264

100

70

50

30

20

FE

h , DC CURRENT GAIN

1.0

t

+10 V

∆

V

0

PULSE WIDTH (t1) = 5

TJ = 125°C

25°C

–15°C

–55°C

2.0 3.0 10 50
IC, COLLECTOR CURRENT (mA)

30205.0 7.0

Figure 2. Minimum Current Gain

Ω

270

3 V

<1 ns

8 pF

9.2 k

CS < 4 pF

Ω

C

C

OPT

1

µ

s DUTY CYCLE = 2%

C < C

TIME

7010100

OPT

2N4264

VCE = 1 V

200

C = 0

Figure 3. QT T est Circuit Figure 4. T urn–Off Waveform

When a transistor is held in a conductive state by a base current, IB,
a charge, QS, is developed or “stored” in the transistor. QS may be
written: QS = Q1 + QV + QX.

Q1 is the charge required to develop the required collector current.
This charge is primarily a function of alpha cutoff frequency . QV is the
charge required to charge the collector–base feedback capacity. QX is
excess charge resulting from overdrive, i.e., operation in saturation.

The charge required to turn a transistor “on” to the edge of saturation
is the sum of Q1 and QV which is defined as the active region charge,
QA. QA = IB1tr when the transistor is driven by a constant current step

(IB1) and IB1 < <

I

C

.

h

FE

NOTE 1

If IB were suddenly removed, the transistor would continue to
conduct until QS is removed from the active regions through an
external path or through internal recombination. Since the internal
recombination time is long compared to the ultimate capability of a
transistor, a charge, QT, of opposite polarity, equal in magnitude, can
be stored on an external capacitor, C, to neutralize the internal charge
and considerably reduce the turn–off time of the transistor. Figure 3
shows the test circuit and Figure 4 the turn–off waveform. Given Q
from Figure 13, the external C for worst–case turn–off in any circuit is:
C = QT/∆V, where ∆V is defined in Figure 3.

T

Motorola Small–Signal Transistors, FETs and Diodes Device Data

3

2N4264

“ON” CONDITION CHARACTERISTICS

1.0

0.8

0.6

0.4

VOLTAGE (VOLTS)

0.2

CE

V , MAXIMUM COLLECTOR–EMITTER

0

0.1

1.2
IC/IB = 10
TJ = 25

1.0

0.8

2N4264

TJ = 25

°

C

IC = 10 mA 50 mA

0.5 2.0 3.0 500.2 0.3

1.00.7 5.0 7.0
IB, BASE CURRENT (mA)

100 mA

200 mA

20 3010

Figure 5. Collector Saturation Region

1.0

°

C

MAX V

MIN V

BE(sat)

BE(sat)

°θ

0.5

q

for V

VC

CE(sat)

0

(25°C to 125°C)

(–55°C to 25°C)

0.6

0.4

, SATURATION VOLTAGE (VOLTS)

0.2

sat

V

1.0 2.0 5.0 10 20

3.0 7.0 30
IC, COLLECTOR CURRENT (mA)

Figure 6. Saturation Voltage Limits

MAX V

500100

CE(sat)

70

200

, TEMPERATURE COEFFICIENTS (mV/ C)

–0.5

–1.0

–1.5

V

–2.0

qVB for V

BE

0 80 120 16040

IC, COLLECTOR CURRENT (mA)

Figure 7. T emperature Coefficients

(25°C to 125°C)

(–55°C to 25°C)

200

4

Motorola Small–Signal Transistors, FETs and Diodes Device Data

DYNAMIC CHARACTERISTICS

2N4264

200

100

70
50

30
20

, DELAY TIME (ns)

d

t

10

7.0

5.0

1.0 2.0 5.0 10 20
IC, COLLECTOR CURRENT (mA)

Figure 8. Delay Time

50

30

20

, STORAGE TIME (ns)

10

s

t

7.0

5.0

1.0 2.0 5.0 10 20

IC/IB = 20

IC, COLLECTOR CURRENT (mA)

td @ V

0 V

EB(off)

= 3 V

2 V

IC/IB = 10

VCC = 10 V

TJ = 25

50

ts′ ^

ts – 1/8 t

IB1 = I

50

°

C

100 200

°

TJ = 25
TJ = 125

f

B2

100 200

200

100

70
50

30
20

, RISE TIME (ns)

r

t

10

7.0

5.0

1.0 2.0 5.0 10 20

VCC = 3 V

VCC = 10 V

IC, COLLECTOR CURRENT (mA)

IC/IB = 10
TJ = 25
TJ = 125

50

°

C

°

C

100 200

Figure 9. Rise Time

200

C

°

C

100

70
50

30
20

, FALL TIME (ns)

f

t

10

7.0

5.0

1.0 2.0 5.0 10 20
IC, COLLECTOR CURRENT (mA)

IC/IB = 20

IC/IB = 10

VCC = 10 V
TJ = 25

°

C

TJ = 125

°

C

50 100 200

Figure 10. Storage Time

10

MAX
TYP

7.0

5.0

CAPACITANCE (pF)

3.0

2.0

0.1 0.2 0.5 1.0 2.0

C

ibo

REVERSE BIAS (Vdc)

C

obo

5.0

10

Figure 12. Junction Capacitance

Motorola Small–Signal Transistors, FETs and Diodes Device Data

Figure 11. Fall T ime

1000

700
500

300
200

100

Q, CHARGE (pC)

70

50
30

20

1.0 2.0 5.0 10 20

IC/IB = 10
TJ = 25
TJ = 125

VCC = 3 V

VCC = 10 V

VCC = 3 V

3.0 7.0

°

C

°

C

IC, COLLECTOR CURRENT (mA)

Figure 13. Maximum Charge Data

Q

A

Q

T

50 100 200

30 70

5

2N4264

SEATING
PLANE

P ACKAGE DIMENSIONS

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

A

B

R

P

L

F

K

D

XX

G

J

H

V

1

C

N

SECTION X–X

N

CASE 029–04

(TO–226AA)

ISSUE AD

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.

4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSION D AND J APPLY BETWEEN L AND K
MINIMUM. LEAD DIMENSION IS UNCONTROLLED
IN P AND BEYOND DIMENSION K MINIMUM.

DIM MIN MAX MIN MAX

A 0.175 0.205 4.45 5.20
B 0.170 0.210 4.32 5.33
C 0.125 0.165 3.18 4.19
D 0.016 0.022 0.41 0.55
F 0.016 0.019 0.41 0.48
G 0.045 0.055 1.15 1.39
H 0.095 0.105 2.42 2.66
J 0.015 0.020 0.39 0.50
K 0.500 ––– 12.70 –––
L 0.250 ––– 6.35 –––
N 0.080 0.105 2.04 2.66
P ––– 0.100 ––– 2.54
R 0.115 ––– 2.93 –––
V 0.135 ––– 3.43 –––

STYLE 1:

PIN 1. EMITTER

2. BASE

3. COLLECTOR

MILLIMETERSINCHES

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Motorola Small–Signal Transistors, FETs and Diodes Device Data

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2N4264/D