Datasheet 28C256TRT4FS15, 28C256TRT4FS12, 28C256TRT4FI15, 28C256TRT4FI12, 28C256TRT4FE15 Datasheet (MAXWELL)

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Memory

All data sheets are subject to change without notice

(858) 503-3300 - Fax: (858) 503-3301- www.maxwell.com

256K EEPROM (32K x 8-Bit)

28C256T

EEPROM

12.19.01 Rev 5

1000584

FEATURES:

•RAD-PAK® radiation-hardened against natural space radia- tion

• Total dose hardness:

- > 100 Krad (Si), dependent upon space mission

• Excellent Single Event Effects:

- SEL

TH

LET: > 120 MeV/mg/cm

2

- SEUTH LET (read mode): > 90 MeV/mg/cm

2

- SEUTH LET (write mode): > 18 MeV/mg/cm

2

• Package:

- 28 pin R

AD-PAK® flat pack

- 28 pin R

AD-PAK® DIP

- JEDEC approved byte wide pinout

• High Speed:

- 120, 150 ns maximum access times available

• High endurance:

- 10,000 erase/write (in Page Mode), 10-year data

retention

• Page Write Mode:

- 1 to 64 bytes

• Low power dissipation:

- 15 mA active current (cycle = 1 µs)

- 20 µA standby current (CE

= VCC)

DESCRIPTION:

Maxwell Technologies’ 28C256T high density 256k-bit EEPROM microcircuit features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 28C256T is capable of in-system electrical byte and page programmability. It has a 64-Byte page programming function to make its erase and write operations faster. It also features data

polling to indicate the completion of erase and program-

ming operations.

Maxwell Technologies' patented R

AD-PAK® packaging technol-

ogy incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, R

AD-PAK provides greater than 100

krad (Si) radiation dose tolerance. This product is available with screening up to Class S.

OE, CE, and WE

LOGIC

Y DECODER

X DECODER

DATA LATCH

INPUT/OUTPUT

BUFFERS

Y-GATING

CELL MATRIX

IDENTIFICATION

OE

WE

CE

ADDRESS

INPUTS

V

CC

GND

DATA INPUTS/OUTPU

T

I/O0 - I/O7

Logic Diagram

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

*Refer to diagram on Page 1 for pin relationship.

TABLE 1. 28C256T PINOUT DESCRIPTION

PIN SYMBOL DESCRIPTION

*10-3, 25, 24,

21, 23, 2, 26, 1

A0-A14 Address

11-13, 15-19 I/O0-I/O7 Input/Output

22 OE

Output Enable

20 CE

Chip Enable

27 WE

Write Enable

28 V

CC

Power Supply

14 V

SS

Ground

TABLE 2. 28C256T ABSOLUTE MAXIMUM RATINGS

PARAMETER SYMBOL MIN MAX UNITS

Supply Voltage (Relative to VSS)V

CC

-0.6 7.0 V

Input Voltage (Relative to V

SS

)V

IN

-0.5

1

1. VIN = -3.0 V for pulse width > 50 ns.

7.0 V

Operating Temperature Range

2

2. Including electrical characteristics and data retention.

T

OPR

-55 125

°

C

Storage Temperature Range T

STG

-65 150

°

C

TABLE 3. 28C256T DELTA LIMITS

PARAMETER VARIATION

ICC1 ±10%

I

CC

2 ±10%

I

CC

3A ±10%

I

CC

3B ±10%

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

TABLE 4. 28C256T RECOMMENDED OPERATING CONDITIONS

PARAMETER SYMBOL MIN MAX UNITS

Supply Voltage V

CC

4.5 5.5 V

Input Voltage V

IL

V

IH

V

H

-0.3

1

2.2

V

CC

-0.5

1. V

IL

min= -1.0V for pulse width < 50 ns.

0.8

V

CC

+0.3

V

CC

+1

V V V

Thermal Impedance — Flat Package

Θ

JC

-- 0.87 °C/W

Thermal Impedance — DIP Package

Θ

JC

-- 0.86 °C/W

Operating Temperature Range T

OPR

-55 125

°

C

TABLE 5. 28C256T CAPACITANCE

(TA = 25 °C, f = 1 MHz)

P

ARAMETER SYMBOL MIN MAX UNITS

Input Capacitance: VIN = 0V

1

1. Guaranteed by design.

C

IN

-- 6 pF

Output Capacitance: V

OUT

= 0V

1

C

OUT

-- 12 pF

TABLE 6. 28C256T DC ELECTRICAL CHARACTERISTICS

(VCC = 5 V ± 10%, TA = -55 TO +125 °C UNLESS OTHERWISE SPECIFIED)

P

ARAMETER CONDITIONS SYMBOL MIN MAX UNITS

Input Leakage Current VCC = 5.5 V, VIN = 5.5 V I

LI

-- 2 uA

Output Leakage Current V

CC

= 5.5 V, V

OUT

= 5.5 V/0.4 V I

LO

-- 2 uA

Standby V

CC

Current CE = V

CC

I

CC1

-- 20 uA

CE

= V

IH

I

CC2

-- 1 mA

Operating V

CC

Current I

OUT

= 0 mA Duty = 100%

V

CC

= 5.5 V Cycle = 1 us

I

CC3

-- 15 mA

I

OUT

= 0mA Duty = 100%

V

CC

= 5.5 V Cycle = 150 ns

-- 50

Input Low Voltage V

IL

-- 0.8 V

Input High Voltage V

IH

2.2 -- V

V

H

VCC -0.5 -- V

Output Low Voltage I

LO

= 2.1 mA V

OL

-- 0.4 V

Output High Voltage I

OH

= -400 uA V

OH

2.4 -- V

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

TABLE 7. 28C256T AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION

1

(VCC = 5V ±10%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED)

1. Test conditions: Input pulse levels - 0V to 3V; input rise and fall times < 20 ns; output load - 1 TTL gate + 100 pF (including scope and jig); reference levels for measuring timing - 0.8V/1.8V.

P

ARAMETER SYMBOL MIN MAX UNITS

Address Access Time CE = OE = VIL, WE = VIH

-120

-150

t

ACC

--

120 150

ns

CE

to Output Delay OE = VIL, WE = VIH

-120

-150

t

CE

--

120 150

ns

OE

to Output Delay CE = VIL, WE = VIH

-120

-150

t

OE

0 0

50 75

ns

Output Hold from Address CE

= OE = VIL, WE = VIH

-120

-150

t

OH

0 0

--

ns

OE

(CE) High to Output Float CE = VIL, WE = VIH

2

-120

-150

2. t

DF

and t

DFR

are defined as the time at which the output becomes an open circuit and data is no longer driven.

t

DF

0 0

45 50

ns

TABLE 8. 28C256T AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND WRITE OPERATIONS

(VCC = 5V ±10%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED)

PARAMETER SYMBOL

MIN

1

TYP MAX UNITS

Address Setup Time

-120

-150

t

AS

0 0

--

ns

CE

to Write Setup Time

-120

-150

t

CS

2

0 0

--

ns

WE

to Write Setup Time

-120

-150

t

WS

3

0 0

--

ns

WE

Hold Time

-120

-150

t

WH

3

0 0

--

ns

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

WE Pulse Width

-120

-150

CE

Pulse Width

-120

-150

t

WP

2

t

CW

3

200 250

--

ns

Address Hold Time

-120

-150

t

AH

150 150

--

ns

Data Setup Time

-120

-150

t

DS

75

100

--

ns

Data Hold Time

-120

-150

t

DH

10 10

--

ns

Chip Enable Hold Time

2

-120

-150

t

CH

0 0

--

ns

Output Enable to Write Setup Time

-120

-150

t

OES

0 0

--

ns

Output Enable Hold Time

-120

-150

t

OEH

0 0

--

ns

Data Latch Time

4

-120

-150

t

DL

--

230 280

--

ns

Write Cycle Time

-120

-150

t

WC

--

10 10

ms

Byte Load Window

4

-120

-150

t

BL

--

100 100

--

us

Byte Load Cycle

4

-120

-150

t

BLC

0.55

--

30 30

us

Write Start Time

-120

-150

t

DW

120 150

--

ns

1. Use this device in a longer cycle than this value.

2. WE controlled operation.

3. CE

controlled operation.

4. Not tested.

TABLE 8. 28C256T AC ELECTRICAL CHARACTERISTICS FOR PAGE/BYTE ERASE AND WRITE OPERATIONS

(VCC = 5V ±10%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED)

PARAMETER SYMBOL

MIN

1

TYP MAX UNITS

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

TABLE 9. 28C256T MODE SELECTION

1

MODE CE OE WE I/O

Write V

IL

V

IL

V

IH

D

OUT

Standby V

H

XXHIGH-Z

Write V

IL

V

IH

V

IL

D

IN

Deselect V

IL

V

IH

V

IH

HIGH-Z

Write Inhibit X X V

IH

--

XV

IL

X--

Data

\ Polling V

IL

V

IL

V

IH

DATA-OUT

(I/O7)

1. X = Does not matter.

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

FIGURE 1. READ TIMING WAVEFORM

FIGURE 2. BYTE WRITE TIMING WAVEFORM (1) (WE CONTROLLED)

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED)

F

IGURE 4. PAGE WRITE TIMING WAVEFORM (1) (WE CONTROLLED)

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

FIGURE 5. PAGE WRITE TIMING WAVEFORM (2) (CE CONTROLLED)

F

IGURE 6. DATA POLLING TIMING WAVEFORM

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

EEPROM APPLICATION NOTES

This application note describes the programming procedures for the EEPROM modules and the details of various techniques to preserve data protection.

Automatic Page Write

Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write cycle, and allows the undefined data within 64 bytes to be written corresponding to the undefined address (A0 to A5). Loading the first byte of data, the data load window opens 30 µs for the second byte. In the same manner each additional byte of data can be loaded within 30 µs. In case CE

and WE are kept high for 100(s after data input, EEPROM enters erase and

write mode automatically and only the input data are written into the EEPROM.

WE CE Pin Operation

During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE

or CE.

Data Polling

Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation.

Data Protection

To protect the data during operation and power on/off, the EEPROM has the internal functions described below.

1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation.

During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20ns or less in programming mode. Be careful not to allow noise of a width of more than 20ns on the control pins.

Memory

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All data sheets are subject to change without notice

256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

F28-03

Note: All dimensions in inches.

28 PIN RAD-PAK® FLAT PACKAGE

SYMBOL

DIMENSION

MIN NOM MAX

A 0.165 0.177 0.189

b 0.015 0.017 0.022

c 0.003 0.005 0.009

D -- 0.720 0.740

E 0.380 0.410 0.420

E1 -- -- 0.440

E2 0.180 0.240 --

E3 0.030 0.085 --

e 0.050 BSC

L 0.390 0.400 0.410

Q 0.040 0.050 0.053

S1 0.005 0.027 --

N28

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

D28-03

Note: All dimensions in inches.

28 PIN RAD-PAK® DUAL IN LINE PACKAGE

SYMBOL

DIMENSION

MIN NOM MAX

A -- 0.177 0.225

b 0.014 0.018 0.026

b2 0.045 0.050 0.065

c 0.008 0.010 0.018

D -- 1.400 1.485

E 0.510 0.595 0.620

eA 0.600 BSC

eA/2 0.300 BSC

e 0.100 BSC

L 0.140 0.150 0.160

Q 0.015 0.040 0.060

S1 0.005 0.025 --

S2 0.005 -- --

N28

Memory

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256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

Important Notice:

These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization.

The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information.

Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies.

Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.

Memory

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All data sheets are subject to change without notice

256K EEPROM (32K x 8-Bit) EEPROM

28C256T

12.19.01 Rev 5

1000584

Product Ordering Options

Model Number

Feature

Option Details

28C256T

XX

X X

-XX

Access Time

Screening Flow

Package

Radiation Feature

Base Product Nomenclature

12 = 120 ns 15 = 150 ns

Monolithic S = Maxwell Class S B = Maxwell Class B E = Engineering (testing @ +25°C

)

I = Industrial (testing @ -55°C, +25°C, +125°C)

D = Dual In-line Package (DIP) F = Flat Pack

RP = R

AD-PAK® package

RT1 = Guaranteed to 10 krad at die level RT2 = Guaranteed to 25 krad at die level RT4 = Guaranteed to 40 krad at die level

256K EEPROM (32K x 8-Bit) EEPROM