Datasheet 28C011TRPFB15, 28C011TRPFB12, 28C011TRT2FI15, 28C011TRT2FI12, 28C011TRT2FE20 Datasheet (MAXWELL)

1

Memory

All data sheets are subject to change without notice

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

FEATURES:

• 128k x 8-bit EEPROM

•R

AD-PAK® radiation hardened against natural space radia-

tion

• Total dose hardness:

- > 100 krad (Si), depending upon space mission

• Excellent Single Event Effects:

- No Latchup > 120 MeV/mg/cm

2

- SEU > 90 MeV/mg/cm

2

read mode

• Package:

- 32-pin R

AD-PAK® flat pack package

- JEDEC-approved byte-wide pinout

• High speed:

- 120, 150, and 200 ns maximum access times available

• High endurance:

- 10,000 cycles/byte, 10-year data retention

• Page write mode:

- 1 to 128 byte page

• Low power dissipation

- 20 mW/MHz active (typical)

- 110 µW standby (maximum)

• Screening per TM 5004

• QCI per TM5005

DESCRIPTION:

Maxwell Technologies’ 28C011T high-density 1 Megabit

(128K x 8-Bit) EEPROM microcircuit features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 28C011T is capable of in-system electrical byte and page programmability. It has a 128-byte page programming function to make its erase and write operations faster. It also features Data

Polling and a Ready / Busy signal to indicate the completion of erase and programming operations. In the 28C011T, hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on power on and off. Software data protection is implemented using the JEDEC optional standard algorithm.

Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, R

AD-PAK provides greater than

100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S.

High Voltage

Generator

Control Logic Timing

Address

Buffer and

Latch

Y Decoder

X Decoder

Y Gating

Memory Array

I/O Buffer and

Input Latch

Data Latch

V

CC

V

SS

RES

OE

CE

WE

RES

A0

A6

A7

A16

I/O0 I/O7 RDY/Busy

Logic Diagram

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

TABLE 1. 28C011T PINOUT DESCRIPTION

PIN SYMBOL DESCRIPTION

12-4, 27, 26, 23,

25, 4,28, 3, 31, 2

A0-A16 Address

13-21 I/O 0 - 7 Data Input/Output

24 OE

Output Enable

22 CE

Chip Enable

29 WE

Write Enable

32 V

CC

Power Supply

16 V

SS

Ground

1 RDY/BUSY

Ready/Busy

30 RES

Reset

TABLE 2. 28C011T ABSOLUTE MAXIMUM RATINGS

PARAMETER SYMBOL MIN MAX UNITS

Supply Voltage (Relative to VSS)V

CC

-0.6 +7.0 V

Input Voltage (Relative to V

SS

)V

IN

-0.5

1

1. VIN min = -3.0V for pulse width < 50ns.

+7.0 V

Operating Temperature Range T

OPR

-55 +125

°

C

Storage Temperature Range T

STG

-65 +150

°

C

TABLE 3. DELTA LIMITS

PARAMETER VARIATION

ICC1 ±10%

I

CC

2 ±10%

I

CC

3 ±10%

I

LI

±10%

I

LO

±10%

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

TABLE 4. 28C011T RECOMMENDED OPERATING CONDITIONS

PARAMETER SYMBOL MIN MAX UNITS

Supply Voltage V

CC

4.5 5.5 V

Input Voltage

RES

_PIN

V

IL

-0.3

1

1. VIL min = 1.0V for pulse width < 50 ns

0.8 V

V

IH

2.2 VCC +0.3

V

H

VCC -0.5 VCC +1

Thermal Impedance — Flat Package

Θ

JC

-- 2.17 °C/W

Operating Temperature Range T

OPR

-55 +125

°

C

TABLE 5. 28C011T CAPACITANCE

(TA = 25 °C, f = 1 MHZ)

P

ARAMETER SYMBOL MIN MAX UNITS

Input Capacitance: VIN = 0V

1

1. Guaranteed by design.

C

IN

-- 6 pF

Output Capacitance: V

OUT

= 0V

1

C

OUT

-- 12 pF

TABLE 6. 28C011T DC ELECTRICAL CHARACTERISTICS

(VCC = 5V ± 10%, TA = -55 TO +125 °C, UNLESS OTHERWISE SPECIFIED)

P

ARAMETER TEST CONDITION SYMBOL MIN MAX UNITS

Input Leakage Current VCC = 5.5V, VIN = 5.5V I

IL

-- 2

1

1. ILI on RES = 100 uA max.

µA

Output Leakage Current V

CC

= 5.5V, V

OUT

= 5.5V/0.4V I

LO

-- 2 µA

Standby V

CC

Current

CE = V

CC

ICC1 -- 20 µA

CE

= V

IH

ICC2 -- 1 mA

Operating V

CC

Current I

OUT

= 0mA, Duty = 100%, Cycle = 1µs at

V

CC

= 5.5V

ICC3 -- 15 mA

I

OUT

= 0mA, Duty = 100%, Cycle = 150ns at

V

CC

= 5.5V

-- 50

Input Voltage

RES

_PIN

V

IL

-- 0.8 V

V

IH

2.2 --

V

H

VCC -0.5 --

Output Voltage I

OL

= 2.1 mA V

OL

-- 0.4 V

I

OH

= -0.4 mA V

OH

2.4 --

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

TABLE 7. 28C011T AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION

1

(VCC = 5V + 10%, TA = -55 TO +125 °C)

1. Test conditions: Input pulse levels - 0.4V to 2.4V; input rise and fall times < 20ns; output load - 1 TTL gate + 100pF (including scope and jig); reference levels for measuring timing - 0.8V/1.8V.

P

ARAMETER SYMBOL MIN MAX UNITS

Address Access Time CE

= OE = VIL, WE = V

IH

-120

-150

-200

t

ACC

--

120 150 200

ns

Chip Enable Access Time OE

= VIL, WE = V

IH

-120

-150

-200

t

CE

--

120 150 200

ns

Output Enable Access Time CE

= VIL, WE = V

IH

-120

-150

-200

t

OE

0 0 0

75 75

100

ns

Output Hold to Address Change CE

= OE = VIL, WE = V

IH

-120

-150

-200

t

OH

0 0 0

--

ns

Output Disable to High-Z

2

CE = VIL, WE = V

IH

-120

-150

-200

CE

= OE = VIL, WE = V

IH

-120

-150

-200

2. t

DF

and t

DFR

are defined as the time at which the output becomes an open circuit and data is no longer driven.

t

DF

t

DFR

0 0 0

50 50 60

300 350 450

ns

RES

to Output Delay

3

CE = OE = VIL, WE = V

IH

-120

-150

-200

3. Guaranteed by design.

t

RR

0 0 0

400 450 650

ns

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

TABLE 8. 28C011T AC ELECTRICAL CHARACTERISTICS FOR BYTE ERASE AND BYTE WRITE OPERATIONS

(VCC = 5V + 10%, TA = -55 TO +125 °C)

P

ARAMETER SYMBOL

MIN

1

MAX UNITS

Address Setup Time

-120

-150

-200

t

AS

0 0 0

--

ns

Chip Enable to Write Setup Time (WE

controlled)

-120

-150

-200

t

CS

0 0 0

--

ns

Write Pulse Width CE

controlled

-120

-150

-200

WE

controlled

-120

-150

-200

t

CW

t

WP

200 250 350

150 250 350

--

ns

Address Hold Time

-120

-150

-200

t

AH

150 150 200

--

ns

Data Setup Time

-120

-150

-200

t

DS

75 120 200

--

ns

Data Hold Time

-120

-150

-200

t

DH

10

20

--

ns

Chip Enable Hold Time (WE

controlled)

-120

-150

-200

t

CH

0 0 0

--

ns

Write Enable to Write Setup Time (CE

controlled)

-120

-150

-200

t

WS

0 0 0

--

ns

Write Enable Hold Time (CE

controlled)

-120

-150

-200

t

WH

0 0 0

--

ns

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

Output Enable to Write Setup Time

-120

-150

-200

t

OES

0 0 0

--

ns

Output Enable Hold Time

-120

-150

-200

t

OEH

0 0 0

--

ns

Write Cycle Time

2

-120

-150

-200

t

WC

--

10 10 20

ms

Data Latch Time

-120

-150

-200

t

DL

250 300 400

--

ns

Byte Load Window

-120

-150

-200

t

BL

100 100 200

--

µs

Byte Load Cycle

-120

-150

-200

t

BLC

0.55

0.95

30 30 30

µs

Time to Device Busy

-120

-150

-200

t

DB

100 120 170

--

ns

Write Start Time

3

-120

-150

-200

t

DW

150 150 250

--

ns

RES

to Write Setup Time

-120

-150

-200

t

RP

100 100 200

--

µs

V

CC

to RES Setup Time

4

-120

-150

-200

t

RES

1 1 3

--

µs

1. Use this device in a longer cycle than this value.

2. t

WC

must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically com-

pletes the internal write operation within this value.

TABLE 8. 28C011T AC ELECTRICAL CHARACTERISTICS FOR BYTE ERASE AND BYTE WRITE OPERATIONS

(VCC = 5V + 10%, TA = -55 TO +125 °C)

P

ARAMETER SYMBOL

MIN

1

MAX UNITS

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

FIGURE 1. READ TIMING WAVEFORM

3. Next read or write operation can be initiated after tDW if polling techniques or RDY/BUSY are used.

4. Guaranteed by design.

TABLE 9. 28C011T MODE SELECTION

1, 2

1. X = Don’t care.

2. Refer to the recommended DC operating conditions.

P

ARAMETER CE OE WE I/O RES RDY/BUSY

Read V

IL

V

IL

V

IH

D

OUT

V

H

High-Z

Standby V

IH

X X High-Z X High-Z

Write V

IL

V

IH

V

IL

D

IN

V

H

High-Z --> V

OL

Deselect V

IL

V

IH

V

IH

High-Z V

H

High-Z

Write Inhibit X X V

IH

-- X --

XV

IL

X--X--

Data Polling V

IL

V

IL

V

IH

Data Out (I/O7) V

H

V

OL

Program X X X High-Z V

IL

High-Z

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

FIGURE 2. BYTE WRITE TIMING WAVEFORM(1) (WE CONTROLLED)

F

IGURE 3. BYTE WRITE TIMING WAVEFORM(2) (CE CONTROLLED)

Memory

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

FIGURE 4. PAGE WRITE TIMING WAVEFORM(1) (WE CONTROLLED)

F

IGURE 5. PAGE WRITE TIMING WAVEFORM(2) (CE CONTROLLED)

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

FIGURE 6. DATA POLLING TIMING WAVEFORM

FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM(1) (IN PROTECTION MODE)

FIGURE 8. SOFTWARE DATA PROTECTION TIMING WAVEFORM(2) (IN NON-PROTECTION MODE)

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

EEPROM APPLICATION NOTES

This application note describes the programming procedures for the EEPROM modules and with details of various techniques to preserve data protection.

Automatic Page Write

Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle, and allows the undefined data within 128 bytes to be written corresponding to the undefined address (A0 to A6). Loading the first byte of data, the data load window opens 30µs for the second byte. In the same manner each additional byte of data can be loaded within 30µs. In case CE

and WE are kept high for 100 µs after data input, EEPROM enters

erase and write mode automatically and only the input data are written into the EEPROM.

WE CE Pin Operation

During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE

or CE.

Data Polling

Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation.

RDY/Busy Signal

RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal has high impedance except in write cycle and is lowered to V

OL

after the first write signal. At the-end of a write cycle,

the RDY/Busy

signal changes state to high impedance.

RES Signal

When RES is LOW, the EEPROM cannot be read and programmed. Therefore, data can be protected by keeping RES

low when VCC is switched. RES should be high during read and programming because it doesn’t provide a latch

function.

Data Protection

To protect the data during operation and power on/off, the EEPROM has the internal functions described below.

1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation.

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20ns or less in programming mode. Be careful not to allow noise of a width of more than 20ns on the control pins.

2. Data Protection at V

CC

on/off

When V

CC

is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable state during V

CC

on/off by using a CPU reset signal to RES pin.

RES

should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES

become low, programming operation doesn’t finish correctly in case that RES

falls low during programming operation. RES

should be kept high for 10 ms after the last data input.

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

3. Software Data Protection

The software data protection function is to prevent unintentional programming caused by noise generated by external circuits. In software data protection mode, 3 bytes of data must be input before write data as follows. These bytes can switch the nonprotection mode to the protection mode.

Software data protection mode can be canceled by inputting the following 6 bytes. Then, the EEPROM turns to the non-protection mode and can write data normally. However, when the data is input in the canceling cycle, the data cannot be written.

Memory

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

F32-03

Note: All dimensions in inches.

32-PIN RAD-PAK® FLAT PACKAGE

SYMBOL

DIMENSION

MIN NOM MAX

A 0.117 0.130 0.143

b 0.015 0.017 0.022

c 0.003 0.005 0.009

D -- 0.820 0.830

E 0.404 0.410 0.416

E1 -- -- 0.440

E2 0.234 0.240 --

E3 0.030 0.085 --

e 0.050BSC

L 0.350 0.370 0.390

Q 0.021 0.033 0.036

S1 0.005 0.027 --

N32

e

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

Important Notice:

These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization.

The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information.

Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies.

Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.

Memory

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1 Megabit (128K x 8-Bit) EEPROM

28C011T

12.19.01 Rev 7

1000580

Product Ordering Options

Model Number

Feature

Option Details

28C011T

XX

F X

-XX

Access Time

Screening Flow

Package

Radiation Feature

Base Product Nomenclature

12 = 120 ns (for example) 15 = 150 ns 20 = 200 ns

Monolithic S = Maxwell Class S B = Maxwell Class B E = Engineering (testing @ +25°C

)

I = Industrial (testing @ -55°C, +25°C, +125°C)

F = Flat Pack

RP = R

AD-PAK® package

RT1 = Guaranteed to 10 krad at die level RT2 = Guaranteed to 25 krad at die level RT4 = Guaranteed to 40 krad at die level

1 Megabit (128K x 8-Bit) EEPROM

Datasheet 28C011TRPFB15, 28C011TRPFB12, 28C011TRT2FI15, 28C011TRT2FI12, 28C011TRT2FE20 Datasheet (MAXWELL)

Specifications and Main Features

Frequently Asked Questions

User Manual