The MC145106 is a phase–locked loop (PLL) frequency synthesizer
constructed in CMOS on a single monolithic structure. This synthesizer finds
applications in such areas as CB and FM transceivers. The device contains an
oscillator/amplifier, a 210 or 211 divider chain for the oscillator signal, a
programmable divider chain for the input signal, and a phase detector. The
MC145106 has circuitry for a 10.24 MHz oscillator or may operate with an
external signal. The circuit provides a 5.12 MHz output signal, which can be
used for frequency tripling. A 29 programmable divider divides the input signal
frequency for channel selection. The inputs to the programmable divider are
standard ground–to–supply binary signals. Pull–down resistors on these inputs
normally set these inputs to ground enabling these programmable inputs to be
controlled from a mechanical switch or electronic circuitry.
The phase detector may control a VCO and yields a high level signal when
input frequency is low, and a low level signal when input frequency is high. An
out–of–lock signal is provided from the on–chip lock detector with a “0” level for
the out–of–lock condition.
• Single Power Supply
• Wide Supply Range: 4.5 to 12 V
• Provision for 10.24 MHz Crystal Oscillator
• 5.12 MHz Output
• Programmable Division Binary Input Selects up to 2
• On–Chip Pull–Down Resistors on Programmable Divider Inputs
• Selectable Reference Divider, 210 or 211 (Including ÷ 2)
• Three–State Phase Detector
• See Application Note AN535 and Article Reprint AR254
• Chip Complexity: 880 FETs or 220 Equivalent Gates
• See the MC145151–2 and MC145152–2 for Higher Performance and
Added Flexibility
9
Order this document
by MC145106/D
P SUFFIX
PLASTIC DIP
18
1
20
1
ORDERING INFORMATION
MC145106PPlastic DIP
MC145106DWSOG Package
CASE 707
DW SUFFIX
SOG PACKAGE
CASE 751D
BLOCK DIAGRAM
OSC
out
÷
2
out
÷
OSC
in
f
in
REV 3
1/98
Motorola, Inc. 1998
MC145106MOTOROLA
2
DIVIDE–BY–N COUNTER 29 – 1
P0 P1P2P3 P4P5P6P7 P8
REFERENCE
DIVIDE 29 OR 2
10
FS
PHASE
DETECTOR
φ
LD
Det
out
1
Page 2
PIN ASSIGNMENTS
PLASTIC DIP
V
1
DD
f
2
in
OSC
OSC
B
φ
Det
3
in
4
out
2
5
out
FS
6
7
out
LD
8
P8
9
SOG PACKAGE
18
17
16
15
14
13
12
11
10
V
P0
P1
P2
P3
P4
P5
P6
P7
SS
V
1
DD
f
2
in
OSC
OSC
B
φ
Det
MAXIMUM RATINGS (Voltages Referenced to V
ParameterSymbolValueUnit
DC Supply VoltageV
Input Voltage, All InputsV
DC Input Current, per PinI± 10mA
Operating Temperature RangeT
Storage Temperature RangeT
SS
DD
in
A
stg
)
3
in
4
out
2
5
out
6
FS
7
out
LD
8
P8
9
P7
10
NC = NO CONNECTION
– 0.5 to + 12V
– 0.5 to VDD + 0.5V
– 40 to + 85°C
– 65 to + 150°C
20
19
18
17
16
15
14
13
12
11
V
P0
NC
P1
P2
P3
P4
NC
P5
P6
SS
This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields; however, it is advised that
normal precautions be taken to avoid application
of any voltage higher than maximum rated
voltages to this high impedance circuit. For
proper operation it is recommended that Vin and
V
be constrained to the range VSS ≤ (Vin or
out
V
) ≤ VDD.
out
MC145106MOTOROLA
2
Page 3
ELECTRICAL CHARACTERISTICS (T
V
DD
CharacteristicSymbol
Power Supply Voltage RangeV
Supply CurrentI
Input Voltage“0” LevelV
Input Current“0” Level
FS, Pull–Up Resistor Source Current)
(P0 – P8)5.0
(FS)“1” Level5.0
(P0 – P8, Pull–Down Resistor Sink Current)5.0
(OSCin, fin)“0” Level5.0
(OSCin, fin)“1” Level5.0
Output Drive Current
(VO = 4.5 V)Source
(VO = 9.5 V)
(VO = 11.5 V)
(VO = 0.5 V)Sink
(VO = 0.5 V)
(VO = 0.5 V)
Input Amplitude
(fin @ 4.0 MHz)
(OSCin @ 10.24 MHz)
Input Resistance
(OSCin, fin)
Input Capacitance
(OSCin, fin)
Three–State Leakage Current
(φDet
Input Frequency
(– 40 to + 85°C)
Oscillator Frequency
(– 40 to + 85°C)
*Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
out
)
= 25°C Unless Otherwise Stated, Voltages Referenced to VSS)
A
V
“1” LevelV
OSC
I
I
R
C
I
DD
DD
IL
IH
I
in
OH
OL
—
in
in
OZ
f
in
Vdc
—4.5—12V
5.0
10
12
5.0
10
12
5.0
10
12
5.0
10
12
10
12
10
12
10
12
10
12
10
12
5.0
10
12
5.0
10
12
—
—
5.0
10
12
——6.0—pF
5.0
10
12
4.5
12
in
4.5
12
MinTyp*Max
—
—
—
—
—
—
3.5
7.0
8.4
– 5.0
– 15
– 20
—
—
—
—
—
—
7.5
22.5
30
– 2.0
– 6.0
– 9.0
2.0
6.0
9.0
– 0.7
– 1.1
– 1.5
0.9
1.4
2.0
1.0
1.5
—
—
—
—
—
—
0
0
0.1
0.1
All Types
6
20
28
—
—
—
—
—
—
– 20
– 60
– 80
—
—
—
—
—
—
30
90
120
– 6.0
– 25
– 37
6.0
25
37
– 1.4
– 2.2
– 3.0
1.8
2.8
4.0
0.2
0.3
1.0
0.5
—
—
—
—
—
—
—
—
10
35
50
1.5
3.0
3.6
—
—
—
– 50
– 150
– 200
– 0.3
– 0.3
– 0.3
0.3
0.3
0.3
75
225
300
– 15
– 62
– 92
15
62
92
—
—
—
—
—
—
—
—
—
—
—
1.0
1.0
1.0
4.0
4.0
10.24
10.24
Unit
mA
V
µA
mA
V p–p
Sine
MΩ
µA
MHz
MHz
MC145106MOTOROLA
3
Page 4
TYPICAL CHARACTERISTICS*
DD
V , POSITIVE POWER SUPPLY (V)
25
20
15
10
5.0
+ 25°C
+ 85°C
0
– 40°C
50403020100
V , SUPPLY VOLTAGE (V)
DD
25
20
15
10
5.0
+ 25°C
+ 85°C
0
OSCin, MAXIMUM FREQUENCY (MHz)fin, MAXIMUM FREQUENCY (MHz)
Figure 1. Maximum Divider Input Frequency
versus Supply V oltage
Figure 2. Maximum Oscillator Input Frequency
versus Supply V oltage
*Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
TRUTH TABLE
Selection
P8P7P6 P5P4P3P2 P1P0Divide by N
LD
Lock Detector (PDIP, SOG — Pin 8)
LD is high when loop is locked, pulses low when out–of–
less than the reference frequency; output low when fin/N is
greater than the reference frequency . Reference frequency is
the divided down oscillator — input frequency typically 5.0 or
10 kHz.
(PDIP, SOG — Pin 7)
out
Signal for control of external VCO, output high when fin/N is
NOTE
Phase Detector Gain = VDD/4π.
0: Voltage level = 0 or open circuit input.
*The binary setting of 00000000 and 00000001 on P8 to P0 results
in a 2 and 3 division which is not in the 2N – 1 sequence. When pin
is not connected the logic signal on that pin can be treated as a “0”.
Reference OSC frequency divided by 2 output; when using
10.24 MHz OSC frequency, this output is 5.12 MHz for frequency tripling applications.
Frequency input to programmable divider (derived from
VCO).
OSCin, OSC
out
Oscillator Input and Oscillator Output (PDIP, SOG —
Pins 3, 4)
Oscillator/amplifier input and output terminals.
V
DD
Positive Power Supply (PDIP, SOG — Pin 1)
V
SS
Ground (PDIP — Pin 18, SOG — Pin 20)
– 40°C
50403020100
MC145106MOTOROLA
4
Page 5
PLL SYNTHESIZER APPLICA TIONS
The MC145106 is well suited for applications in CB radios
because of the channelized frequency requirements. A typical 40 channel CB transceiver synthesizer, using a single
crystal reference, is shown in Figure 3 for receiver IF values
of 10.695 MHz and 455 kHz.
In addition to applications in CB radios, the MC145106 can
be used as a synthesizer for several other systems. Various
frequency spectrums can be achieved through the use of
proper offset, prescaling, and loop programming techniques.
In general, 300 – 400 channels can be synthesized using a
single loop, with many additional channels available when
multiple loop approaches are employed. Figures 4 and 5 are
examples of some possibilities.
In the aircraft synthesizer of Figure 5, the VHF loop (top)
will provide a 50 kHz, 360 channel system with 10.7 MHz
R/T offset when only the 11.0500 MHz (transmit) and
12.1200 MHz (receive) frequencies are provided to mixer #1.
When these signals are provided with crystal oscillators, the
result is a three crystal 360 channel, 50 kHz step synthesizer.
When using the offset loop (bottom) in Figure 5 to provide the
indicated injection frequencies for mixer #1 (two for transmit
and two for receive) 360 additional channels are possible.
This results in a 720–channel, 25 kHz step synthesizer which
requires only two crystals and provides R/T offset capability.
The receive offset value is determined by the 11.31 MHz
crystal frequency and is 10.7 MHz for the example.
The VHF marine synthesizer in Figure 4 depicts a single
loop approach for FM transceivers. The VCO operates on frequency during transmit and is offset downward during receive. The offset corresponds to the receive IF (10.7 MHz) for
channels having identical receive/transmit frequencies (simplex), and is (10.7 – 4.6 = 6.1) MHz for duplex channels. Carrier modulation is introduced in the loop during transmit.
OSC
10.24
MHz
R/T
X 5MIXER
25.6 MHz
MC145106
PROGRAMMABLE
DIVIDER
SWITCH WAFERS
10
÷
29/2
÷
2
5.0 kHz
1.365 – 1.805 MHz (TRANSMIT)
0.91 – 1.35 MHz (RECEIVE)
PHASE
DETECTOR
GND
V
DD
LD
LOOP
FILTER
TO RECEIVER
2ND MIXER
BUFFERVCO
MIXERBUFFER
16.270 – 16.710 MHz10.24 MHz
RECEIVER 1ST
LOCAL OSC SIGNAL
26.965 – 27.405 MHz
(TRANSMIT)
26.510 – 26.950 MHz
(RECEIVE)
Figure 3. Single Crystal CB Synthesizer Featuring On–Frequency VCO During Transmit
MC145106MOTOROLA
5
Page 6
GND
V
DD
LOCK DETECT
REF
OSC
5.12 MHz
(10.24 MHz)
NOTES:
• Receiver IF = 10.7 MHz.
• Low Side Injection.
• Duplex Offset = 4.6 MHz.
• Step Size = 25 kHz.
• Frequencies in MHz unless noted.
• Values in parentheses are for a 5.0 kHz reference frequency.
• Example frequencies for Channel 28 shown by *.#Can be eliminated by adding 184 to ÷ N for Duplex Channels.
÷
2
MC145106
÷
N 29 – 1
PROGRAMMABLE INPUTS
N = 97 TO 153 *152
BUFFER
FILTER
TRIPLER
10
29, 2
DIVIDER
2.5 kHz
(5.0 kHz)
0.2425 – 0.3825
(0.4850 – 0.7650)
*0.3800
15.36 (30.72)RECEIVE OFFSET
PHASE
DETECTOR
MODULA TION
MIXER
TRANSMIT RANGE
156.025 – 157.425 MHz
*157.4
RECEIVER L.O. RANGE
145.575 – 152.575 MHz
*151.3
÷
10 (÷ 5)
14.29
VCO AND
BUFFER
DUPLEX
14.75#
(29.50)
LOOP
FILTER
TRANSMIT
MODULATION
CIRCUIT
RECEIVETRANSMIT
OSCILLA TOR
SIMPLEX
(28.58)
Figure 4. VHF Marine Transceiver Synthesizer
MC145106MOTOROLA
6
Page 7
LOCK DETECT
10.24 MHz
5.12 MHz
REF
OSC
REF OSC
÷
AND
÷
2
PROGRAMMING
750 kHz – 2545 kHz
N = 150 – 509
2
OFFSET LOOP
PROGRAMMING
810 kHz – 812.5 kHz
N = 324 – 325
29, 2
DIVIDER
MC145106
÷
N 29 – 1
VHF LOOP
29, 2
DIVIDER
MC145106
÷
N 29 – 1
10
5.0 kHz
10
2.5 kHz
01000101
PHASE
DETECTOR
V
V
GND
DD
LOCK DETECT
PHASE
DETECTOR
GND
DD
LOOP
FILTER
MIXER
#1
LOOP
FILTER
MIXER
#2
VCO AND
BUFFER
÷
10
VCO AND
BUFFER
AMP
OSC
TRANSMIT
118.000 – 135.975 MHz
(25 kHz STEPS)
RECEIVE
128.700 – 146.675 MHz
TRANSMIT
11.0500 MHz
11.0525 MHz
RECEIVE
12.1200 MHz
12.1225 MHz
TRANSMIT
10.24 MHz
RECEIVE
11.31 MHz
(SELECT FREQUENCY TO
GIVE DESIRED R/T OFFSET)
Figure 5. VHF Aircraft 720 Channel Two Crystal Frequency Synthesizer
MC145106MOTOROLA
7
Page 8
P ACKAGE DIMENSIONS
PLASTIC DIP (DUAL IN–LINE PACKAGE)
1018
B
19
A
C
K
N
F
D
H
G
SEATING
PLANE
SOG (SMALL OUTLINE GULL–WING) PACKAGE
–A–
20
11
–B–
P10X
0.010 (0.25)
1
10
D20X
S
M
0.010 (0.25)B
A
T
S
C
SEATING
–T–
18X
G
K
PLANE
P SUFFIX
CASE 707–02
L
M
DW SUFFIX
CASE 751D–04
M
M
B
J
F
M
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D),
SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM
MATERIAL CONDITION, IN RELATION TO
SEATING PLANE AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
MILLIMETERSINCHES
MINMINMAXMAX
DIM
22.22
A
6.10
B
C
3.56
D
0.36
F
1.27
G
2.54 BSC
H
1.02
J
J
R
X 45
_
0.20
K
2.92
L
7.62 BSC
M
°
0
N
0.51
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
Mfax is a trademark of Motorola, Inc.
USA/EUROPE/ Locations Not Listed: Motorola Literature Distribution;JAPAN: Nippon Motorola Ltd.; SPD, Strategic Planning Office; 4-32-1,
P.O. Bo x 5405, Denver, Colorado, 80217. 1-303-675-2140 or 1-800-441-2447 Nishi-Gotanda; Shinagawa-ku, Tokyo 141, Japan. 81-3-5487-8488
Mfax: RMFAX0@email.sps.mot.com – TOUCHTONE 1-602-244-6609ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B T ai Ping Industrial Park,
Motorola Fax Back System– US & Canada ONL Y 1-800-774-1848 51 Ting Kok Road, T ai Po, N.T., Hong Kong. 852-26629298
– http://sps.motorola.com/mfax/
HOME PAGE: http://motorola.com/sps/CUSTOMER FOCUS CENTER: 1-800-521-6274
◊
MC145106/D
MC145106MOTOROLA
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