Datasheet 100370QIX, 100370QI, 100370QCX, 100370QC, 100370PC Datasheet (Fairchild Semiconductor)

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February 1990 Revised August 2000

100370 Low Power Universal Demultiplexer/Decoder

General Description

The 100370 univers al demultiplexer/dec oder functions as either a dual 1-of-4 decoder or as a single 1-o f-8 decoder, depending on the sign al applied to the Mode Control (M) input. In the dual mode, each half has a pair of active-LOW Enable ( E

) inputs. Pin assignments for the E inputs are such that in the 1-of-8 mode they can easily be tied together in pairs to provide two active-LOW enables (E

, E2a to E2b). Signals applied to auxiliary inputs Ha, H

and Hc determine whether the outputs are active HIGH or active LOW. In the dual 1-of-4 mode the Address inputs are

, A1a and A0b, A1b with A2a unused (i.e., left open, t ied

to V

or with LOW signal applied). In the 1-of- 8 mode , the

Address inputs are A

, A1a, A2a with A0b and A1b LOW or

OPEN. All inputs have 50 k

Ω pull-down resistors.

Features

■ 35% power reduction of the 100170

■ 2000V ESD protection

■ Pin/function compatible with 100170

■ Voltage compensated operating range

= −4.2V to −5.7V

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Connection Diagrams

24-Pin DIP 28-Pin PLCC

Order Number Package Number Package Description

100370PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 100370QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100370QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Industrial Temperature Range (

−40°C to +85°C)

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100370

Logic Symbols

Single 1-of 8 Application

Dual 1-of-4 Application-

Pin Descriptions

Truth Tables

Dual 1-of-4 Mode (M = A2a = Hc = LOW)

Single 1-of-8 Mode (M

= HIGH; A

= A1b = Ha = Hb = LOW)

H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care E1 = E1a and E1b wired; E2 = E22a and E2b wired Note 1: for H

= LOW, output s t ates are complemented

Pin Names Description

, A

Address Inputs

, E

Enable Inputs M Mode Control Input H

Z0–Z3 (Z0a–Z3a) Polarity Select Input

Z4–Z7 (Z0b–Z3b) Polarity Select Input H

Common Polarity Select Input Z

0–Z7

Single 1-of-8 Data Outputs Z

, Z

Dual 1-of-4 Data Outputs

Inputs Active HIGH Outputs Active LOW Outputs

and Hb Inputs HIGH) (Ha and Hb Inputs LOW)

1aE2aA1aA0aZ0aZ1aZ2aZ3aZ0aZ1aZ2aZ3a

E1bE2bA1bA0bZ0bZ1bZ2bZ3bZ0bZ1bZ2bZ

HXXXLLLLHHHH XHXXLLLLHHHH LLLLHLLLLHHH LLLHLHLLHLHH LLHLLLHLHHLH LLHHLL LHHHHL

Inputs Active HIGH Outputs (Note 1)

Input HIGH)

1E2A2aA1aA0aZ0Z1Z2Z3Z4Z5Z6Z7

HXXXXLLLLLLLL XHXXXLLLLLLLL LLL LLHLLLLLLL LLL LHLHLLLLLL LLLHLLLHLLLLL LLLHHLLLHLLLL LLHLLLLLLHLLL LLHLHLLLLLHLL LLHHLLLLLLLHL LLHHHLLLLLLLH

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100370

Logic Diagram

(Zn) for 1-of-4 applicati ons .

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100370

Absolute Maximum Ratings(Note 2) Recommended Operating

Conditions

Note 2: The “Absolute Maximum Ratings” are those values beyon d which

the safety of the dev ice cannot be guaranteed. T he device sh ould not be operated at these limit s. The parametric values defin ed in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recomme nded O peratin g Cond itions ” table will defin e the condition s for actual device operation.

Note 3: ESD testing conf orm s t o M I L-STD-883, Method 3015.

Commercial Version DC Electrical Characteristics

(Note 4)

= −4.2V to −5.7V, VCC = V

CCA

= GND, T

= 0°C to +85°C

Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the all owable syste m opera ti ng r ange s. Co ndi ti ons fo r t est ing shown in the ta ble s are chosen to guarantee operation under “worst case” conditions.

AC Electrical Characteristics

= −4.2V to −5.7V, VCC = V

CCA

= GND

Storage Temperature (T

STG

) −65°C to +150°C

Maximum Junction Temperature (T

) +150°C

Pin Potential to Ground Pin −7.0V to +0.5V

Input Voltage (DC) V

to +0.5V

Output Current (DC Output HIGH)

−50 mA

ESD (Note 3)

≥2000V

Case Temperature (T

)

Commercial 0

°C to +85°C

Industrial

−40°C to +85°C

Supply Voltage (V

) −5.7V to −4.2V

Symbol Parameter Min Typ Max Units Conditions

Output HIGH Voltage −1025 −955 −870 mV VIN = VIH (Max) Loading with

Output LOW Voltage −1830 −1705 −1620 mV or VIL (Min) 50Ω to −2.0V

OHC

Output HIGH Voltage −1035 mV VIN = VIH (Min) Loading with

OLC

Output LOW Voltage −1610 mV or VIL (Max) 50Ω to −2.0V

Input HIGH Voltage −1165 −870 mV Guaranteed HIGH Signal for All Inputs

Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal for All Inputs

Input LOW Current 0.50 µAVIN = VIL (Min)

Input HIGH Current 240 µAVIN = VIH (Max)

Power Supply Current −95 −50 mA Inputs OPEN

Symbol Parameter

TC = 0°CT

= +25°CT

= +85°C

Units Conditions

Min Max Min Max Min Max

PLH

Propagation Delay

0.75 1.85 0.75 1.85 0.85 2.05 ns

Figures 1, 2

PHL

Ena, Enb to Output

PLH

Propagation Delay

0.75 2.20 0.75 2.20 0.75 2.30 ns

PHL

Ana, Anb to Output

PLH

Propagation Delay

0.75 2.20 0.75 2.20 0.75 2.20 ns

PHL

Ha, Hb, Hc to Output

PLH

Propagation Delay

1.10 2.70 1.10 2.70 1.10 3.00 ns

PHL

M to Output

TLH

Transition Time

0.40 1.30 0.40 1.30 0.40 1.30 ns

THL

20% to 80%, 80% to 20%

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100370

Commercial Version (Con tinu ed) PLCC AC Electrical Characteristics

= −4.2V to −5.7V, VCC = V

CCA

= GND

Industrial Version PLCC DC Electrical Characteristics

(Note 5)

= −4.2V to −5.7V, VCC = V

CCA

= GND, T

= −40°C to +85°C

Note 5: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasin g the al l owable syste m opera ti ng ran ge s. Cond it i ons fo r t estin g sho w n in the tabl es are chosen to guarantee operation under “worst case” conditions.

PLCC AC Electrical Characteristics

= −4.2V to −5.7V, VCC = V

CCA

= GND

Symbol Parameter

TC = 0°CT

= +25°CT

= +85°C

Units Conditions

Min Max Min Max Min Max

PLH

Propagation Delay

0.75 1.65 0.75 1.65 0.85 1.85 ns

Figures 1, 2

PHL

Ena, Enb to Output

PLH

Propagation Delay

0.75 2.00 0.75 2.00 0.75 2.10 ns

PHL

Ana, Anb to Output

PLH

Propagation Delay

0.75 2.00 0.75 2.00 0.75 2.00 ns

PHL

Ha, Hb, Hc to Output

PLH

Propagation Delay

1.10 2.50 1.10 2.50 1.10 2.80 ns

PHL

M to Output

TLH

Transition Time

0.40 1.20 0.40 1.20 0.40 1.20 ns

THL

20% to 80%, 80% to 20%

Symbol Parameter

TC = −40°CTC = 0°C to +85°C

Units Conditions

Min Typ Min Max

Output HIGH Voltage −1085 −870 −1025 −870 mV VIN = VIH (Max) Loading with

Output LOW Voltage −1830 −1575 −1830 −1620 mV or VIL (Min) 50Ω to −2.0V

OHC

Output HIGH Voltage −1095 −1035 mV VIN = VIH (Min) Loading with

OLC

Output LOW Voltage −1565 −1610 mV or VIL (Max) 50Ω to −2.0V

Input HIGH Voltage −1170 −870 −1165 −870 mV Guaranteed HIGH Signal

for All Inputs

Input LOW Voltage −1830 −1480 −1830 −1475 mV Guaranteed LOW Signal

for All Inputs

Input LOW Current 0.50 0.50 µAVIN = VIL (Min)

Input HIGH Current 300 240 µAVIN = VIH (Max)

Power Supply Current −95 −50 −95 −50 mA Inputs OPEN

Symbol Parameter

= −40°CT

= +25°CT

= +85°C

Units Conditions

Min Max Min Max Min Max

PLH

Propagation Delay

0.75 1.65 0.75 1.65 0.85 1.85 ns

Figures 1, 2

PHL

Ena, Enb to Output

PLH

Propagation Delay

0.65 2.00 0.75 2.00 0.75 2.10 ns

PHL

Ana, Anb to Output

PLH

Propagation Delay

0.70 2.00 0.75 2.00 0.75 2.00 ns

PHL

Ha, Hb, Hc to Output

PLH

Propagation Delay

1.10 2.50 1.10 2.50 1.10 2.80 ns

PHL

M to Output

TLH

Transition Time

0.40 1.30 0.40 1.20 0.40 1.20 ns

THL

20% to 80%, 80% to 20%

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100370

Test Circuit

Notes:

, V

CCA

= +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines R

= 50Ω terminator internal to scope

Decoupling 0.1 µF from GND to V

and V

All unused outputs are loaded with 50Ω to G ND C

= Fixture and stray capacitance ≤ 3 pF

FIGURE 1. AC Test Circuit

Switching Waveforms

FIGURE 2. Propagation Delay and Transition Times

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100370

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

Package Number N24E

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100370 Low Power Universal Demultiplexer/Decoder

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Package Number V28A

Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant inju ry to the user.

2. A critical component in any com ponen t of a life su pport device or system whose failure t o perform can be reasonably expected to ca use the failure of the life supp ort device or system, or to affect its safety or effectiveness.

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