Datasheet 100324 Datasheet (Fairchild)

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100324
Low Power Hex TTL-to-ECL Translator

100324 Low Power Hex TTL-to-ECL Translator

July 1988
Revised August 2000

General Description

The 100324 is a he x translator, designed to convert TT L
logic levels to 100K ECL logic levels. The inp uts are com­patible with standard or Schottky TTL. A com mon Enable
(E), when LOW, holds all inverting outputs HIGH and holds
all true outputs LOW. The d ifferential outputs allow each
circuit to be used as an inverting/non-inverting translator, or
as a differential line driver. The output level s are voltage
compensated over the full

When the circuit is used in the differential mode, the
100324, due to its high common mode rejection, over­comes voltage gradients between the TTL and ECL ground
systems. The V

order.
The 100324 is pin and function compatible with the 100124

with similar AC p erformance, but features power dissipa­tion roughly half of the 100124 to ease system cooling
requirements.

EE

−4.2V to −5.7V range.

and V

power may be applied in either

TTL

Features

■ Pin/function compatible with 100124

■ Meets 100124 AC specifications

■ 50% power reduction of the 100124

■ Differential outputs

■ 2000V ESD protection

■

−4.2V to −5.7V operating range

■ Available to MIL-STD-883

■ Available to industrial grade temperature range

(PLCC package only)

Ordering Code:

Order Number Package Number Package Description

100324SC M24B 28-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
100324PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100324QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100324QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.

Industrial Temperature Range (

−40°C to +85°C)

Connection Diagrams

24-Pin DIP/SOIC 28-Pin PLCC

© 2000 Fairchild Semiconductor Corporation DS009878 www.fairchildsemi.com

Pin Descriptions Truth Table

100324

Pin Names Description

D

0–D5

E Enable Input
Q

0–Q5

Q

0–Q5

Data Inputs

Data Outputs
Complementary
Data Outputs

H = HIGH Voltage Level
L = LOW Voltage Level

Logic Diagram

Inputs Outputs

D

n

XLLH
LHLH
HHHL

E

Q

Q

n

n

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Absolute Maximum Ratings(Note 1) Recommended Operating

Storage Temperature (T
Maximum Junction Temperature (T
V

Pin Potential to Ground Pin −7.0V to +0.5V

EE

Pin Potential to Ground Pin −0.5V to +6.0V

V

TTL

Input Voltage (DC)

) −65°C to +150°C

STG

) +150°C

J

−0.5V to +6.0V

Output Current (DC Output HIGH)
ESD (Note 2)

−50 mA
≥2000V

Conditions

Case Temperature (T

Commercial 0
Industrial

Supply Voltage (V

Note 1: The “Absolute Maximum Ratings” are those value s beyond which
the safety of the d evice cannot b e guaranteed . The device sh ould not be
operated at these limit s. The parametric values defi ned in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recomm ended O peratin g Cond itions ” table will defin e the condition s
for actual device operation.

Note 2: ESD testing conforms to MIL-STD-883, Method 3015.

)

C

) −5.7V to −4.2V

EE

Commercial Version

100324

°C to +85°C

−40°C to +85°C

DC Electrical Characteristics

V

= −4.2V to −5.7V, VCC = V

EE

Symbol Parameter Min Typ Max Units Conditions

V

OH

V

OL

V

OHC

V

OLC

V

IH

V

IL

V

CD

I

IH

I

IL

I

EE

I

TTL

Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasin g the a l lowa ble syste m opera ti ng ran ges. Cond it i ons fo r t estin g sho w n in the tables are cho­sen to guarantee operation under “worst case” conditions.

Output HIGH Voltage −1025 −955 −870
Output LOW Voltage −1830 −1705 −1620 or V
Output HIGH Voltage −1035
Output LOW Voltage −1610 or V
Input HIGH Voltage 2.0 5.0 V Guaranteed HIGH

Input LOW Voltage 0 0.8 V Guaranteed LOW

Input Clamp Diode Voltage −1.2 V IIN = −18 mA
Input HIGH Current VIN = +2.4V,
Data 20 µA All Other Inputs V
Enable 120
Input HIGH Current
Breakdown Test, All Inputs All Other Inputs = GND
Input LOW Current VIN = +0.4V,
Data −0.9 mA All Other Inputs V
Enable −5.4
VEE Power Supply Current −70 −45 −22 mA All Inputs VIN = +4.0V
V

Power Supply Current 25 38 mA All Inputs VIN = GND

TTL

= GND, TC = 0°C to +85°C, V

CCA

(Note 3)

= +4.5V to +5.5V

TTL

1.0 mA

mV

mV

VIN =V

IH (Max)

IL (Min)

VIN = V

IH(Min)

IL (Max)

Signal for All Inputs

Signal for All Inputs

V

= +5.5V,

IN

= GND

IN

= V

IN

Loading with
50Ω to −2.0V
Loading with
50Ω to −2.0V

IH

DIP AC Electric Characteristics

V

= −4.2V to −5.7V, VCC = V

EE

Symbol Parameter

t
t
t
t

PLH
PHL
TLH
THL

Propagation Delay
Data and Enable to Output Figures 2, 1
Transition Time
20% to 80%, 80% to 20%

= GND, V

CCA

= +4.5V to +5.5V

TTL

= 0°CT

T

C

MinMaxMinMaxMinMax

0.50 3.00 0.50 2.90 0.50 3.00 ns

0.45 1.80 0.45 1.80 0.45 1.80 ns

= +25°CT

C

= +85°C

C

Units Conditions

3 www.fairchildsemi.com

Commercial Version (Continued)
SOIC and PLCC AC Electrical Characteristics

100324

V

= −4.2V to −5.7V, VCC = V

EE

Symbol Parameter

t

PLH

t

PHL

t

TLH

t

THL

t

OSHL

Propagation Delay
Data and Enable to Output Figures 2, 1
Transition Time
20% to 80%, 80% to 20%
Maximum Skew Common Edge PLCC Only
Output-to-Output Variation 0.95 0.95 0.95 ns (Note 4)
Data to Output Path

t

OSLH

Maximum Skew Common Edge PLCC Only
Output-to-Output Variation 0.70 0.70 0.70 ns (Note 4)
Data to Output Path

t

OST

Maximum Skew Opposite Edge PLCC Only
Output-to-Output Variation 1.60 1.60 1.60 ns (Note 4)
Data to Output Path

t

PS

Maximum Skew PLCC Only
Pin (Signal) Transition Variation 1.20 1.20 1.20 ns (Note 4)
Data to Output Path

Note 4: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack­aged device. Th e specif ications apply to any out puts s witchin g in the s ame d irection e ither H IGH-to -LOW ( t

directions both H L and LH (t

OST

= GND, V

CCA

). Parameters t

= +4.5V to +5.5V

TTL

TC = 0°CT

= +25°CT

C

= +85°C

C

Min Max Min Max Min Max

0.50 2.80 0.50 2.70 0.50 2.80 ns

0.45 1.70 0.45 1.70 0.45 1.70 ns

), or LOW-to-HIGH ( t

and tPS guaranteed by design.

OST

OSHL

Units Conditions

), or in opposite

OSLH

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Industrial Version

100324

DC Electrical Characteristics

V

= −4.2V to −5.7V, VCC = V

EE

Symbol Parameter

V

OH

V

OL

V

OHC

V

OLC

V

IH

Output HIGH Voltage −1085 −870 −1025 −870
Output LOW Voltage −1830 −1575 −1830 −1620 or V
Output HIGH Voltage −1095 −1035
Output LOW Voltage −1565 −1610 or V
Input HIGH Voltage 2.0 5.0 2.0 5.0 V Guaranteed HIGH

= GND, TC = −40°C to +85°C, V

CCA

(Note 5)

= +4.5V to +5.5V

T

= −40°CT

C

Min Max Min Max

TTL

= 0°C to +85°C

C

Units Conditions

mV

mV

VIN =V

VIN = V

IH (Max)

IL (Min)

IH(Min)

IL (Max)

Loading with
50Ω to −2.0V
Loading with
50Ω to −2.0V

Signal for All Inputs

V

IL

Input LOW Voltage 0 0.8 0 0.8 V Guaranteed LOW

Signal for All Inputs

V

CD

I

IH

Input Clamp Diode Voltage −1.2 −1.2 V IIN = −18 mA
Input HIGH Current VIN = +2.4V,
Data 20 20 µA All Other Inputs VIN = GND
Enable 120 120
Input HIGH Current
Breakdown Test, All Inputs All Other Inputs = GND

I

IL

Input LOW Current VIN = +0.4V,

1.0 1.0 mA

Data −0.9 −0.9 mA All Other Inputs VIN = V

VIN = +5.5V,

IH

Enable −5.4 −5.4

I

EE

I

TTL

Note 5: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasin g the a l lowa ble syste m opera ti ng ran ges. Cond it i ons fo r t estin g sho w n in the tables are cho­sen to guarantee operation under “worst case” conditions.

VEE Power Supply Current −70 −22 −70 −22 mA All Inputs VIN = +4.0V

V

Power Supply Current 38 38 mA All Inputs VIN = GND

TTL

AC Electrical Characteristics

V

= −4.2V to −5.7V, VCC = V

EE

Symbol Parameter

t

PLH

t

PHL

t

TLH

t

THL

Propagation Delay
Data and Enable to Output
Transition Times
20% to 80%, 80% to 20%

= GND, V

CCA

= +4.5V to +5.5V

TTL

T

= −40°CT

C

Min Max Min Max Min Max

= +25°CT

C

= +85°C

C

Units Conditions

0.50 2.80 0.50 2.70 0.50 2.80 ns Figures 2, 1

0.35 1.80 0.45 1.70 0.45 1.70 ns Figures 2, 1

5 www.fairchildsemi.com

Test Circuit

100324

Note:

, V

• V

• L1, L2 and L3 = equal length 50Ω impedance lines

• R

• Decoupling 0.1 µF from GND to V

• All unused outputs are loaded with 50Ω to −2V or with equiv alent ECL terminator network

• C

= 0V, VEE = −4.5V, V

CC

CCA

= 50Ω terminator internal to scope

T

= Fixture and stray capacitance ≤ 3 pF

L

= +5.0V, VIH = +3.0V

TTL

, VEE and V

CC

TTL

FIGURE 1. AC Test Circuit

Switching Waveform

FIGURE 2. Propagation Delay and Transition Times

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Physical Dimensions inches (millimeters) unless otherwise noted

100324

28-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

Package Number M24B

Package Number N24E

7 www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

100324 Low Power Hex TTL-to-ECL Translator

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square)

Fairchild does not assume any responsibility for use of any circuitr y described, no circuit patent licenses are implied a nd
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are device s or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the
user.

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Package Number V28A

2. A critical component in any compon ent of a l ife supp ort
device or system whose failu re to perform can be rea­sonably expected to cause the failure of the li fe su pp ort
device or system, or to affect its safety or effectiveness.

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