Datasheet 100323FMQB, 100323DMQB Datasheet (NSC)

100323
Low Power Hex Bus Driver

General Description

The 100323 is a monolithic device containing six bus drivers
capable of driving terminated lines with terminations as low
as 25Ω. To reduce crosstalk, each output has its own re­spective ground connection. Transition times were designed
to be longer than on other F100K devices. The driver itself
performs the positive logic AND of a data input (D

1–D6

) and

the OR of two select inputs (E and either DE

1

,DE2,orDE3).

Enabling of dataispossible in multiples of two, i.e., 2, 4 or all
6 paths. All inputs have 50 kΩ pull-down resistors.

The output voltage LOW level is designed to be more nega­tive than normal ECL outputs (cut off state). This allows an

emitter-follower output transistor to turn off when the termi­nation supply is −2.0V and thus present a high impedance to
the data bus.

Features

n 50%power reduction of the 100123
n 2000V ESD protection
n −4.2V to −5.7V operating range
n Drives 25Ω load

Logic Symbol

Pin Names Description

D

1–D6

Data Inputs

DE

1

–DE

3

Dual Enable Inputs
E Common Enable Input
O

1–O6

Data Outputs

DS100312-7

August 1998

100323 Low Power Hex Bus Driver

© 1998 National Semiconductor Corporation DS100312 www.national.com

Connection Diagrams

Logic Diagram

Truth Table

EDEnDnD

n+1

O

n

O

n+1

L L X X Cutoff Cutoff
X H L L Cutoff Cutoff
X H L H Cutoff H
X H H L H Cutoff
XH H H H H
H X L L Cutoff Cutoff
H X L H Cutoff H
H X H L H Cutoff
HX H H H H

H

=

High
Cutoff=Lower-than-LOW state
L=Low
X=Don’t Care

24-Pin DIP

DS100312-3

24-Pin Quad Cerpak

DS100312-4

DS100312-1

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

Storage Temperature −65˚C to +150˚C
Maximum Junction Temperature

Ceramic +175˚C

V

EE

Pin Potential to Ground Pin −7.0V to +0.5V

Input Voltage (DC) V

EE

to +0.5V
Output Current (DC Output High) −50 mA
ESD ≥2000V

Recommended Operating
Conditions

Case Temperature

Military −55˚C to +125˚C

Supply Voltage (V

EE

) −5.7V to −4.2V

Note 1: Absolutemaximumratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.

Note 2: ESD testing conforms to MIL-STD-883, Method 3015.

Military Version

DC Electrical Characteristics

V

EE

=

−4.2V to −5.7V, V

CC

=

V

CCA

=

GND, T

C

=

−55˚C to +125˚C

Symbol Parameter Min Max Units T

C

Conditions Notes

V

OH

Output HIGH −1025 −870 mV 0˚C to +125˚C V

IN

=

V

IH (max)

Loading with (Notes 3, 4, 5)

Voltage −1085 −870 mV −55˚C or V

IL (min)

25Ω to −2.0V

V

OHC

Output HIGH −1035 mV 0˚C to +125˚C V

IN

=

V

IH (min)

or V

IL (max)

Loading with
25Ω to −2.0V

(Notes 3, 4, 5)

Voltage −1085 mV −55˚C

V

OLC

Output LOW −1610 mV 0˚C to +125˚C
Voltage −1555 MV −55˚C

V

OLZ

Cut-Off LOW −1950 mV 0˚C to +125˚C V

IN

=

V

IH (min)

Loading with (Notes 3, 4, 5)

Voltage −1850 −55˚C or V

IL (max)

25Ω to −2.0V

V

IH

Input HIGH −1165 −870 mV −55˚C to +125˚C Guaranteed HIGH Signal (Notes 3, 4, 5, 6)
Voltage for All Inputs

V

IL

Input LOW −1830 −1475 mV −55˚C to +125˚C Guaranteed LOW Signal (Notes 3, 4, 5, 6)
Voltage for All Inputs

I

IL

Input LOW
Current

0.50 µA −55˚C to +125˚C V

EE

=

4.2V, V

IN

=

V

IL (min)

(Notes 3, 4, 5)

I

IH

Input HIGH 240 µA 0˚C to +125˚C V

EE

=

−5.7V, V

IN

=

V

IH (max)

(Notes 3, 4, 5)

Current 340 µA −55˚C

I

EE

Power Supply Inputs Open
Current −155 −53 mA −55˚C to +125˚C V

EE

=

−4.2V to −5.7V (Notes 3, 4, 5)

Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.

Note 4: Screen tested 100%on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.
Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.
Note 6: Guaranteed by applying specified input condition and testing V

OH/VOL

.

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AC Electrical Characteristics

V

EE

=

−4.2V to −5.7V, V

CC

=

V

CCA

=

GND

Symbol Parameter T

C

=

−55˚C T

C

=

+25˚C T

C

=

+125˚C Units Conditions

Min Max Min Max Min Max

t

PZH

Propagation Delay 0.70 3.70 1.10 3.60 1.20 3.60 ns

Figures 1, 2

t

PHZ

Data to Output 0.50 3.60 1.10 3.10 1.20 3.50

t

PZH

Propagation Delay 0.60 3.60 1.10 3.60 1.30 3.80 ns

t

PHZ

Data Enable to Output 1.00 4.20 1.50 3.60 1.60 4.00

t

PZH

Propagation Delay 0.70 3.60 1.00 3.50 1.20 3.60 ns

t

PHZ

Common Enable to Output 0.90 4.00 1.40 3.40 1.40 3.80

t

TZH

Transition Time 0.20 2.00 0.20 2.00 0.20 2.00 ns

t

THZ

20%to 80%,80%to 20

%

0.20 1.80 0.20 1.60 0.20 1.60

Note 7: The specified limits represent the “worst case” value for the parameter. Since these “worst case” values normally occur at the temperature extremes, ad­ditional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges.

Note 8: Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions.

Test Circuitry

DS100312-5

Notes:

V

CC,VCCA

=

+2V, V

EE

=

−2.5V
L1 and L2=equal length 50Ω impedance lines
R

T

=

50Ω terminator internal to scope

Decoupling 0.1 µF from GND to V

CC

and V

EE

All unused outputs are loaded with 25Ω to GND
C

L

=

Fixture and stray capacitance ≤ 3pF

Pin numbers shown are for flatpak; for DIP see logic symbol

FIGURE 1. AC Test Circuit

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Timing Waveform

DS100312-6

FIGURE 2. Propagation Delay and Transition Times

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6

Physical Dimensions inches (millimeters) unless otherwise noted

24 Lead Ceramic Dual-In-Line Package (0.400" Wide) (D)

NS Package Number J24E

24 Lead Quad Cerpak (F)

NS Package Number W24B

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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE­VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI­CONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or sys-

tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose fail­ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.

2. A critical component in any component of a life support
device or system whose failure to perform can be rea­sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.

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100323 Low Power Hex Bus Driver

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.