Datasheet 100314MW8, 100314MDS Datasheet (NSC)

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100314 Low Power Quint Differential Line Receiver
General Description
The 100314 is a monolithic quint differential line receiver with emitter-follower outputs. An internal reference supply (V
BB
) is available for single-ended reception. When used in single-ended operation the apparent input threshold of the true inputs is 25 mV to 30 mV higher (positive) than the threshold of the complementary inputs. Unlike other F100K ECL devices, the inputs do not have input pull-down resis­tors.
Active current sources provide common-mode rejection of
EE
and VCC. The defined
state is logic HIGH on the O
a–Oe
outputs.
Features
n 35%power reduction of the 100114 n 2000V ESD protection n Pin/function compatible with 100114 n Voltage compensated operating range=−4.2V to −5.7V n Standard Microcircuit Drawing
(SMD) 5962-9162901
Logic Symbol
Pin Names Description
D
a–De
Data Inputs
D
a–De
Inverting Data Inputs
O
a–Oe
Data Outputs
O
a–Oe
Complementary Data Outputs
DS100299-1
August 1998
100314 Low Power Quint Differential Line Receiver
© 1998 National Semiconductor Corporation DS100299 www.national.com
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Connection Diagrams
24-Pin DIP
DS100299-2
24-Pin Quad Cerpak
DS100299-3
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Above which the useful life may be impaired (Note 1)
Storage Temperature (T
STG
) −65˚C to +150˚C
Maximum Junction Temperture (T
J
)
Ceramic +175˚C
Pin Potential to Ground Pin (V
EE
) −7.0V to +0.5V
Input Voltage (DC) V
EE
to +0.5V
Output Current (DC Output HIGH) −50 mA
ESD (Note 2) 2000V
Recommended Operating Conditions
Case Temperature (TC)
Military −55˚C to +125˚C
Supply Voltage (V
EE
) −5.7V to −4.2V
Note 1: Absolute maximum ratings are those values beyond which the de­vice may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Military Version DC Electrical Characteristics
V
EE
=
−4.2V to −5.7V, V
CC
=
V
CCA
=
GND, T
C
=
−55˚C to +125˚C (Note 5)
Symbol Parameter Min Typ Max Units T
C
Conditions Notes
V
OH
Output HIGH Voltage
−1025 −870 mV
0˚C to V
IN
=
V
IH
(Max)
or VIL(Min)
Loading with 50to −2.0V
+125˚C
−1085 −870 mV −55˚C (Notes 3, 4, 5)
V
OL
Output LOW Voltage −1830 −1620 mV 0˚C to
+125˚C
−1830 −1555 mV −55˚C
V
OHC
Output HIGH −1035 mV 0˚C to V
IN
=
V
IH
(Max)
or VIL(Min)
Loading with 50to −2.0V
Voltage +125˚C
−1085 mV −55˚C (Notes 3, 4, 5)
V
OLC
Output LOW −1610 mV 0˚C to Voltage +125˚C
−1555 mV −55˚C
V
BB
Output Reference −1260 mV 0˚C to I
VBB
=
0 µA, V
EE
=
4.2V (Notes 3, 4, 5)
Voltage +125˚C
−1380 −1260 mV 0˚C to I
VBB
=
−250 µA, V
EE
=
−5.7V
+125˚C (Notes 3, 4, 5)
−1396 mV −55˚C I
VBB
=
−350 µA, V
EE
=
−5.7V
V
DIFF
Input Voltage 150 mV −55˚C to Required for Full Output Swing (Notes 3, 4, 5) Differential +125˚C
V
CM
Common Mode VCC− 2.0 VCC− 0.5 V −55˚C to (Notes 3, 4, 5) Voltage +125˚C
V
IH
Single-Ended −1165 −870 mV −55˚C to Guaranteed HIGH Signal for All (Notes 3, 4, 5, 6) Input High Voltage +125˚C Inputs (with D
n
tied to VBB)
V
IL
Single-Ended −1830 −1475 mV −55˚C to Guaranteed LOW Signal for All (Notes 3, 4, 5, 6) Input Low Voltage +125˚C Inputs (with D
n
tied to VBB)
I
IH
Input HIGH Current 50 µA 0˚C to V
IN
=
V
IH (Max),Da–De
=
V
BB
,
+125˚C D
a–De
=
V
IL (Min)
(Notes 3, 4, 5)
70 µA −55˚C
I
CBO
Input Leakage −10 µA −55˚C to V
IN
=
V
EE,Da–De
=
V
BB
, (Notes 3, 4, 5)
Current +125˚C D
a–De
=
V
IL (Min)
I
EE
Power Supply −65 −25 mA −55˚C to Da–D
e
=
V
BB
, (Notes 3, 4, 5)
Current +125˚C D
a–De
=
V
IL (Min)
Note 3: F100K 300 Seriescoldtemperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 4: Screen tested 100%on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8. Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8. Note 6: Guaranteed by applying specified input condition and testing V
OH/VOL
.
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AC Electrical Characteristics
V
EE
=
−4.2V to −5.7V, V
CC
=
V
CCA
=
GND
Symbol Parameter
T
C
=
−55˚C
T
C
=
+25˚C
T
C
=
+125˚C
Units Conditions Notes
Min Max Min Max Min Max
t
PLH
Propagation Delay 0.40 2.30 0.60 2.20 0.60 2.70 ns (Notes 7, 8, 9)
t
PHL
Data to Output
Figures 1, 2
t
TLH
Transition Time 0.20 1.40 0.20 1.40 0.20 1.40 ns (Note 10)
t
THL
20%to 80%,80%to 20
%
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 8: Screen tested 100%on each device at +25˚C temperature only, Subgroup A9. Note 9: Sample tested (Method 5005, TableI) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11. Note 10: Not tested at +25˚C, +125˚C and −55˚C temperature (design characterization data).
Test Circuit
DS100299-5
Note: VCC,V
CCA
=
+2V, V
EE
=
−2.5V L1 and L2=equal length 50impedance lines R
T
=
50terminator internal to scope
Decoupling 0.1 µF from GND to V
CC
and V
EE
All unused outputs are loaded with 50to GND C
L
=
Fixture and stray capacitance 3pF
FIGURE 1. AC Test Circuit
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Switching Waveforms
DS100299-6
FIGURE 2. Propagation Delay and Transition Times
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6
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Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Ceramic Dual-In-Line Package (0.400" Wide) (D)
NS Package Number J24E
24-Lead Quad Cerpak (F)
NS Package Number W24B
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LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE­VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI­CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into the body, or (b) support orsustain life, and whose fail­ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
2. A critical component in any component of a life support device or system whose failure to perform can be rea­sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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100314 Low Power Quint Differential Line Receiver
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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