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PCIe-DIO05 Users Manual (Rev 1.1)
-1- http://www.daqsystem.com
PCIe-DIO05
User’s Manual
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Copyrights 2007 DAQ system, All rights reserved.
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PCIe-DIO05 Users Manual (Rev 1.1)
-2- http://www.daqsystem.com
Contents
1. PCIe-DIO05 Block Diagram
2. Connecter Pin Map
2.1 External DSUB-37PIN
2.2 Internal BOX-40PIN
3. Installation
3.1 Confirm Contents
3.2 Installation Sequence
4. Board Function
4.1 Layout
4.2 Function Description
5. Sample Program
References
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PCIe-DIO05 Users Manual (Rev 1.1)
-3- http://www.daqsystem.com
1. PCIe-DIO05 Block Diagram
PCI BUS
PCIe-DIO05 INTERNAL BLOCK
PCI Target
/ Master
Local Bus
Address
Data(Mem,I/O)
Reserved
(0x00 – 0x5F)
DIO 32bit Input
(0xC0)
Interrupt controller
Ext. Address, Data, Control
Local BUS
Interrupt
Controller
(0xb0)
INT sources in Chip
IO Decoder
MEM Decoder
To each IO
Module
DPRAM
From Ext.
CLOCK syn.
MEM Decoder
BUS Mux
Reserved
(0xD0 – 0xFF)
[Figure 1-1. PCIE-DIO05 Internal Block Diagram]
The PCIe-DIO05 is a board having the function of external with the 32 TTL level input port. This
product is designed for High speed digital data logger with PCI Express Interface.
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PCIe-DIO05 Users Manual (Rev 1.1)
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2. Connecter Pin map
2.1 External DSUB-37PIN
3
10
9
8
7
6
1
2
5
4
19
18
17
16
15
14
13
12
11
25
24
23
22
21
20
DIN18
DIN16
DIN10
DIN12
DIN14
DIN8
DIN6
DIN0
DIN2
DIN4
READY
POWER
DIN19
DIN17
DIN15
DIN13
DIN11
DIN9
DIN7
DIN5
DIN3
DIN1
CLOCK
REQUEST
33
32
31
30
29
28
27
26
37
36
35
34
DIN22
DIN24
DIN26
DIN20
DIN28
DIN30
GROUND
DIN31
DIN29
DIN27
DIN25
DIN23
DIN21
[Figure 2-1. PCIe-DIO05 DSUB 37 Connecter]
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PCIe-DIO05 Users Manual (Rev 1.1)
-5- http://www.daqsystem.com
3
10 9
8 7
6125
4
19
18 17
16 15
14 13
12 11
25
24 23
22 21
20
33
32 31
30 29
28 27
26
37
36 35
34
38
3940
DIN18
DIN16
DIN10
DIN12
DIN14
DIN8
DIN6
DIN0
DIN2
DIN4
READY
POWER
DIN22
DIN24
DIN26
DIN20
DIN28
DIN30
GROUND
DIN19
DIN17
DIN15
DIN13
DIN11
DIN9
DIN7
DIN5
DIN3
DIN1
CLOCK
REQUEST
DIN31
DIN29
DIN27
DIN25
DIN23
DIN21
N.C
N.C N.C
[Figure 2-2. Internal BOX 40 Connecter]
[Table 1. PCIe-DIO05 Connecter Pin Description]