Dalsa Xtium-CL PX4 User Manual

Xtium-CL PX4

™

User's Manual

P/N: OC-Y4CM-PUSR0

sensors | cameras |

frame grabbers

| processors | software | vision solutions

Edition 1.11

www.teledynedalsa.com

NOTICE

© 2014-16 Teledyne DALSA, inc. All rights reserved.
This document may not be reproduced nor transmitted in any form or by any means, either

electronic or mechanical, without the express written permission of TELEDYNE DALSA. Every effort
is made to ensure the information in this manual is accurate and reliable. Use of the products
described herein is understood to be at the user’s risk. TELEDYNE DALSA assumes no liability
whatsoever for the use of the products detailed in this document and reserves the right to make
changes in specifications at any time and without notice.

Microsoft® is a registered trademark; Windows®, Windows® 7, Windows® 8 are trademarks of
Microsoft Corporation.

All other trademarks or intellectual property mentioned herein belongs to their respective owners.

Edition 1.11 released on February 8, 2016

Document Number:
Printed in Canada

About Teledyne DALSA

Teledyne DALSA is an international high performance semiconduc t or and electronics company that
designs, develops, manufactures, and markets digital imaging products and solutions, in addition
to providing wafer foundry service s.

Teledyne DALSA Digital Imaging offers the widest range of machine vision components in the
world. From industry-leading image sensor s through powerful and sophisticated cameras, frame
grabbers, vision processors and sof tw are to easy-to-use vision appliances and custom vision
modules.

OC-Y4CM-PUSR0

Contents

OVERVIEW 6

PRODUCT PART NUMBERS 6
ABOUT THE XTIUM-CL PX4 FRAME GRABBER 7

Series Key Features 7
User Programmable Configurations 7
ACUPlus: Acquisition Control Unit 7
DTE: Intelligent Data Transfer Engine 8

PCI Express x4 Gen2 Interface 8

Advanced Controls Overview 8

DEVELOPMENT SOFTWARE OVERVIEW 9

Sapera++ LT Library 9
Sapera Processing Library 9

INSTALLIN G XT IUM-CL PX4 10

WARNING! (GROUNDING INSTRUCTIONS) 10
INSTALLATION 10

Sapera LT Library & Xtium-CL PX4 Driver Installation 10
Xtium-CL PX4 Firmware Loader 11

Firmware Update: Automatic Mode 11
Firmware Update: Manual Mode 11
Executing the Firmware Loader from the Start Menu 12

REQUIREMENTS FOR A SILENT INSTALL 13

Silent Mode Installation 13

Creating a Response File 13
Running a Silent Mode Installation 13

Silent Mode Uninstall 14

Creating a Response File 14
Running a Silent Mode Uninstall 14

Silent Mode Installation Return Code 14
Installation Setup with CorAppLauncher. exe 14
Custom Driver Installation using install.ini 15

Creating the install.in i File 15
Run the Installation using install.ini 15

UPGRADING SAPERA OR BOARD DRIVER 16

Board Driver Upgrade Only 16
Upgrading both Sapera and Board Driver 16

USING THE CAMERA LINK SERIAL CONTROL PORT 17

COM Port Assignment 17

DISPLAYING XTIUM-CL PX4 BOARD INFORMATION 18

Device Manager – Board Viewer 18

Information Field Description 18

CONFIGURING SAPERA 20

Viewing Installed Sapera Servers 20
Increasing Contiguous Memory for Sapera Resources 20

Contiguous Memory for Sapera Messaging 21

TROUBLESHOOTING PROBLEMS 22

OVERVIEW 22
PROBLEM TYPE SUMMARY 22

First Step: Check the Status LED 22
Possible Installation Problems 22
Possible Functional Problems 23

Xtium-CL PX4 User's Manual Contents • i

TROUBLESHOOTING PROCEDURES 23

Checking for PCI Bus Conflicts 23
Windows Device Manager 24
BSOD (blue screen) Following a Board Reset 25
Sapera and Hardware Windows Drivers 25
Recovering from a Firmware Update Error 26
Driver Information via the Device Manager Program 26
Teledyne DALSA Log Viewer 27
On-board Image Memory Requirements for Acquisitions 27
Symptoms: CamExpert Detects no Boards 27

Troubleshooting Procedure 27

Symptoms: Xtium-CL PX4 Does Not Grab 28
Symptoms: Card grabs black 28
Symptoms: Card acquisition bandwidth is less than ex p ected 29

CAMEXPERT QUICK START 30

INTERFACING CAMERA S WITH CAMEXPERT 30

CamExpert Example with a Monochrome Camera 30

CAMEXPERT DEMONSTRATION AND TEST TOOLS 31

Camera Types & Files 31
Overview of Sapera Acquisition Parameter Files (*.ccf or *.cca/*.cvi) 32
Saving a Camera File 33
Camera Interfacing Check List 33

SAPERA DEMO APPLICATIONS 34

GRAB DEMO OVERVIEW 34

Using the Grab Demo 34

XTIUM-CL PX4 REFERENCE 36

BLOCK DIAGRAM 36
XTIUM-CL FLOW DIAGRAM 37
ACQUISITION TIMING 38
LINE TRIGGER SOURCE SELECTION FOR LINE SCAN APPLICATIONS 39

Parameter Values Specific to the Xtium-CL PX4 39

SHAFT ENCODER INTERFACE TIMING 39
VIRTUAL FRAME TRIGGER FOR LINE SCAN CAMERAS 41

Synchronization Signals for a 10 Line Virtual Frame 41
SAPERA ACQUISITION METHODS 43
TRIGGER TO IMAGE RELIABILITY 43

Supported Events and Transfer Methods 43

Trigger Signal Validity 45

Supported Transfer Cycling Methods 45
OUTPUT LUT AVAILABILITY 46
XTIUM-CL PX4 SUPPORTED PARAMETERS 46

Camera Related Capabilities 46
Camera Related Parameters 47
VIC Related Parameters 50
ACQ Related Parameters 55
Transfer Related Capabilities 56
Transfer Related Parameters 56
General Outputs #1: Related Capabilities (for GIO Module #0) 56
General Outputs #1: Related Parameters (for GIO Module #0) 57
General Inputs #1: Related Capabilitie s (for GIO Module #1) 57
General Inputs #1: Related Parameters (for GIO Module #1) 57
Bidirectional General I/Os: Related Capabilities (for GIO Module #2) 57
Bidirectional General I/Os: Related Parameters (for GIO Module #2) 58

ii • Contents Xtium-CL PX4 User's Manual

SAPERA SERVERS & RESOURCES 58

SERVERS AND RESOURCES 58
WINDOWS EMBEDDED 7 INSTALLATION 59

TECHNICAL SPECIFICATIONS 60

XTIUM-CL PX4 BOARD SPECIFICATIONS 60
HOST SYSTEM REQUIREMENTS 61
EMI CERTIFICATIONS 62
CONNECTOR AND SWITCH LOCATIONS 63

Xtium-CL PX4 Board Layout Drawing 63
Connector / LED Description List 63

CONNECTOR AND SWITCH SPECIFICATIONS 64

Xtium-CL PX4 End Bracket Detail 64
Status LED Functional Descriptio n 65
J3: Camera Link Connector 1 66
J2: Camera Link Connector 2 67
Camera Link Camera Control Signal Overview 68
J1: External Signals Connector (Female DH60-27P) 69

Note 1: General Inputs / External Trigger Inputs Specifications 69

Block Diagram: Connecting External Drivers to General Inputs on J1 71

External Driver Electrical Requirements 71

Note 2: General Outputs /Strobe Output Specifications 72

Block Diagram: Connecting External Receivers to the General Outputs 73

External Receiver Electrical Requirements 73

Note 3: RS-422 Shaft Encoder Input Specifications 74

Note 3.1: Interfacing to an RS-422 Driver Output 75

Note 3.2: Interfacing to a TTL (also called Pus h-Pull) Output 75

Note 3.3: Interfacing to a Line Driver (also called Open Emitter) Output 76

Note 3.4: Interfacing to an Open Collector Output 76

J5: Multi-Board Sync / Bi-directional General I/Os 77

Hardware Preparation 77

Configuration via Sapera Application Programming 77

Configuration via Sapera CamExpert 77

J7: Power Connector 78

DC Power Details 78
CABLES & ACCESSORIES 79

DH40-27S Cable to Blunt End (OR-YXCC-27BE2M1, Rev B1) 79
DH40-27S Connector Kit for Custom Wiring 80
Board Sync Cable Assembly OR-YXCC-BSYNC40 81
Power Cable Assembly OR-YXCC-PWRY00 82

CAMERA LINK INTERFACE 83

CAMERA LINK OVERVIEW 83

Rights and Trademarks 83

DATA PORT SUMMARY 83
CAMERA SIGNAL SUMMARY 84

Video Data 84

Camera Controls 84

Communication 84
CAMERA LINK CABLES 84

CONTACT INFORMATION 85

SALES INFORMATION 85
TECHNICAL SUPPORT 85

INDEX 86

Xtium-CL PX4 User's Manual Contents • iii

Tables

Table 1: Xtium-CL PX4 Board Product Numbers ....................................................................... 6

Table 2: Xtium-CL PX4 Software Product Numbers ................................................................... 6

Table 3: Xtium-CL PX4 Cables & Accessories ........................................................................... 6

Table 4: Xtium-CL PX4 Device Dri ve rs ................................................................................. 25

Table 5: Grab Demo Workspace Details ................................................................................ 34

Table 6: Acquisition Timing Specifications ............................................................................. 38

Table 7: CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE – Parameter Values ............................... 39

Table 8: Output LUT Availability ........................................................................................... 46

Table 9: Camera Related Capabilities .................................................................................... 46

Table 10: Camera Related Parameters .................................................................................. 50

Table 11: VIC Related Parameters ........................................................................................ 55

Table 12: Acquisition Related Parameters .............................................................................. 55

Table 13: Transfer Related Capabilities ................................................................................. 56

Table 14: Transfer Related Parameters ................................................................................. 56

Table 15: GIO-0 Related Capabilities .................................................................................... 56

Table 16: GIO-0 Related Parameters .................................................................................... 57

Table 17: GIO-1 Related Capabilities .................................................................................... 57

Table 18: GIO-1 Related Parameters .................................................................................... 57

Table 19: GIO-2 Related Capabilities .................................................................................... 57

Table 20: GIO-2 Related Parameters .................................................................................... 58

Table 13: Xtium-CL PX4 - Servers and Resources ................................................................... 58

Table 14: Board Specifications ............................................................................................. 61

Table 15: Environment Specifications ................................................................................... 61

Table 16: Power Specifications ............................................................................................. 61

Table 17: Board Connector List ............................................................................................ 63

Table 18: D1 Boot-up/PCIe Status LED ................................................................................. 65

Table 19: Camera Link LED Status ...................................................................................... 65

Table 20: Camera Link Connector 1 ...................................................................................... 66

Table 21: Camera Link Connector 2 ...................................................................................... 67

Table 22: DH60-27P Connector Signals ................................................................................. 69

Table 23: External Trigger Timing Spec ifications .................................................................... 70

Table 34: OR-YXCC-H270000 Custom Wiring Kit .................................................................... 80

Table 25: Camera Link Cables Suppliers ................................................................................ 84

iv • Contents Xtium-CL PX4 User's Manual

Figures

Figure 1: Automatic Firmware Update ................................................................................... 11

Figure 2: Manual Firmware Upda te ....................................................................................... 12

Figure 3: Create an install.ini File ......................................................................................... 15

Figure 4: Sapera Configuration Program ............................................................................... 17

Figure 5: Board Information via Device Manager .................................................................... 18

Figure 6: PCI Diagnostic Program ......................................................................................... 24

Figure 7: PCI Diagnostic Program – PCI bus info .................................................................... 24

Figure 8: Using Windows Device Manager ............................................................................. 25

Figure 9: Board Firmware Version ........................................................................................ 26

Figure 10: PCI Diagnostic – checking the BUS Master bit ......................................................... 28

Figure 11: CamExpert Program ............................................................................................ 30

Figure 12: Saving a New Camera File (.ccf) ........................................................................... 33

Figure 13: Grab Demo – Server Selection .............................................................................. 34

Figure 14: Grab Demo Main Window ..................................................................................... 35

Figure 15: Xtium-CL PX4 Model Block Diagram ..................................................................... 36

Figure 16: Acquisition Timing ............................................................................................... 38

Figure 17: Encoder Input with Pulse-drop Counte r .................................................................. 40

Figure 18: Using Shaft Encoder Direction Parameter ............................................................... 40

Figure 19: Synchronization Signals for a 10 Line Virtual Frame ................................................ 42

Figure 20: EMI Certifications ................................................................................................ 62

Figure 21: Board Layout...................................................................................................... 63

Figure 22: End Bracket Details ............................................................................................. 64

Figure 23: CamExpert - Camera Link Controls ....................................................................... 68

Figure 24: General Inputs Electrical Diagram ......................................................................... 69

Figure 25: External Trigger Input Validation & Delay............................................................... 70

Figure 26: General Outputs Electrical Diagram ....................................................................... 72

Figure 27: RS-422 Shaft Encoder Input Electrical Diagram ...................................................... 74

Figure 32:External RS-422 Signals Connection Diagram .......................................................... 75

Figure 33: Interfacing TTL to RS-422 Shaft Encoder Inputs ..................................................... 75

Figure 34: DH60-27P Cable No. OR-YXCC-27BE2M1 Detail ...................................................... 79

Figure 35: Photo of cable OR-YXCC-27BE2M1 ........................................................................ 79

Figure 32: Photo of cable OR-YXCC-BSYNC40 ........................................................................ 81

Figure 33: Photo of cable assembly OR-YXCC-PWRY00 ............................................................ 82

Xtium-CL PX4 User's Manual Contents • v

Overview

Product Part Numbers

Xtium-CL PX4 Board

Item Product Number

Xtium-CL PX4 OR-Y4C0-XPX00
For OEM clients, this manual in printed form, is available on request OC-Y4CM-PUSR0

Table 1: Xtium-CL PX4 Board Product Numbers

Xtium-CL PX4 Software

Item Product Number

Sapera LT version 7.40 or later for full featu r e s upport (required but sold
separately)

1. Sapera LT: Provides ever ything needed to build imaging
application.

2. Current Sapera compliant board hardware drivers

3. Sapera documentation (com piled HTML help, Adobe Acrobat®
(PDF)

(optional) Sapera Processing Imaging Development Library includes over 600
optimized image-processing routines.

Table 2: Xtium-CL PX4 Software Product Numbers

OC-SL00-0000000

Contact Sales at
Teledyne DALSA

Optional Xtium-CL PX4 Cables & Accessories

Item Product Number

DH60-27S cable assem bly to blunt end:

6 ft cable I/O 27 pin Hir os e connector to blun t e nd.
This cable assembly connects to J1.
(see "J1: External Signals Connector (Female DH60-27P)" on page 69)

DH40-27S Connector Kit for Custom Wiring:
Comprised of a DH40-27S connec tor plus screw lock housing kit

Cable assembly to connect to J5 (Board Sync)
Connecting 2 boards

Connection 3 or 4 boa r ds
Power interface cable required when supplying pow er to c a mer a s and/or J1 OR-YXCC-PWRY00
Power Over Camera Link (PoCL) Video Input Cable

2 meter H DR to M DR
2 meter H DR to H D R

OR-YXCC-27BE2M1, Rev B1

OR-YXCC-H270000

OR-YXCC-BSYNC20

OR-YXCC-BSYNC40

OR-COMC-POCLD2

OR-COMC-POCLDH

Table 3: Xtium-CL PX4 Cables & Accessories

Xtium-CL PX4 User's Manual Overview • 6

About the Xtium-CL PX4 Frame Grabber

Series Key Features

• Compliant with Camera Link specification version 2.0

• Uses a PCIe x4 Gen2 slot to maximize transfers to host computer buffers

• Acquire from Monochrome, RGB, Bayer and Bi-Color cameras, both area scan and linescan

• Supports multiple tap formats, in multiple pixels depths

• Pixel clock range from 20 to 85 MHz

• Output lookup tables

• White Balance Gain for RGB pixels

• Vertical and Horizontal Flip supporte d on board

• External Input Triggers and Shaft Encoder inputs, along with Strobe outputs

• Supports a number of acquisition events in compliance with "Trigger to Image Reliability"

• RoHS complia n t

• Supports Power Over Camera Link (PoCL)

See “Technical Specifications” on pa ge 60 for detailed information.

User Programmable Configurations

Use the Xtium-CL PX4 firmware loader funct io n in the Teledyne DALSA Device manager utility to
select firmware for one of the supported modes. Firmware selection is made either during driver
installation or ma nu ally later on (see "Firmware Update: Manual Mode" on page 11).

Full Configurations: Firmware choices are:

• One Full Camera Link Input with up to 8 Taps parallel (installation defa ult selection):
Support for 1 Base, 1 Medium or 1 Full Camera Link camera, 1 tap segmented, 2 taps
alternate, or 2/3/4/8 taps parallel — monochrome.

• Support for 1 Base or 1 Medium Camera Link camera, 1 tap and 2 taps parallel RGB.

• One Full Camera Link Bayer Input with up to 8 Taps parallel:

Support for 1 Base, 1 Medium or 1 Full Camera Link Bayer camera, 1 tap segmented, 2 taps
alternate, or 2/3/4/8 taps parallel. Note that horizontal flipping is not available with this
configuration.

• One 80-bit Camera Link Input:
Support for one 10 Tap @ 8-bit monochrome, one 8 Tap @ 10-bit monochrome camera, one
80-bit packed RGB, or one 80-bit packed Bi-Color c amera.

• One 80-bit Camera Lin k Bayer Input:
Support for one 10 Tap @ 8-bit Bayer camera or one 8 Tap @ 10-bit Bayer camera. Note that
horizontal flipping is not available with this configuration.

ACUPlus: Acquisition Control Unit

ACUPlus consists of a grab controller, one pixel packer, and one time base generator. ACUPlus
delivers a flexible acquisition front end and supports pixel clock rates of up to 85MHz.

ACUPlus acquires variable frame sizes up to 64KB per horizontal line and up to 16 million lines per
frame. ACUPlus can also capture an infinite number of lines from a line scan camera without losing
a single line of data.

Xtium-CL PX4 User's Manual Overview • 7

DTE: Intelligent Data Transfer Engine

The Xtium-CL PX4 intelligent Data Transfer Engine ensures fast image data transfers between the
board and the host computer with zero CPU usage. The DTE provides a high degree of data
integrity during continuous image acquisition in a non-real time operating system like Windows.
DTE consists of multiple independent DMA units, Tap Descr iptor Tables, and Auto-loading Scatter­Gather tables.

PCI Express x4 Gen2 Interface

The Xtium-CL PX4 is a universal PCI Express x4 Gen2 board, compliant with the PCI Express 2.0
specification. The Xtium-CL PX4 board achieves transfer rates up to 1.8Gbytes/sec. to host
memory. Note that performance can be lower depending on PC and/or programmed configuration.

The Xtium-CL PX4 board occupies one PCI Express x4 Gen2 expansion slot and one chassis
opening.

Important:

• To obtain maximum transfer rate to host memory, make sure the Xtium-CL PX4 is in a Gen2
slot. Although the board will work in a Gen1 slot, only half the performance is achieved.

• If the computer only has a PCI Express x16 slot, test directly or review the computer
documentation to know if the Xtium-CL PX4 is supported. Many computer motherboards only
support x16 products in x16 slots, which are commonly graphic video boards.

Advanced Controls Overview

Visual Indicators

Xtium-CL PX4 features 3 LED indicators to facilitate s ys tem installation and setup. These indicators
provide visual feedback on the board status and camera status.

External Event Synchronization

Trigger inputs and strobe signals precisely synchronize image captures with external events.

Camera Link Communications Ports

One PC independent communication port provides Camera Link camera configuration. This port
does not require addition PC resources like free interrupts or I/O address space. Accessible via the
board device driver, the communication port presents a seamless interface to Windows-based
standard communication applica tions like H yperTerminal, etc. The communication port is accessible
directly from the Camera Link connectors.

Quadrature Shaft Encoder

An important feature for web scanning applications, the Quadrature Shaft Encoder inputs allow
synchronized line captures from external web encoders. The Xtium-CL PX4 provides an RS-422
input that supports a tick rate of up to 5 MHz.

8 • Overview Xtium-CL PX4 User's Manual

Development Software Overview

Sapera++ LT Library

Sapera++ LT is a powerful development library for image acquisition and control. Sapera+ + LT
provides a single API across all current and future Teledyne DALSA hardware. Sapera++ LT
delivers a comprehensive feature set including program portability, versatile camera controls,
flexible display functionality and management, plus easy to use application development wizard s.
Applications are developed using either C++ or .NET frameworks.

Sapera++ LT comes bundled with CamExpert, an easy to use camera configuration utility to create
new, or modify existing camera configuration files.

Sapera Processing Library

Sapera Processing is a comprehensive set of C++ classes or .NET classes for image processing and
analysis. Sapera Processing offers highly optimized tools for image processing, blob analysis,
search (pattern recognition), OCR and barcode decoding.

Xtium-CL PX4 User's Manual Overview • 9

Installing Xtium-CL PX4

Warning! (Grounding Instructions)

Static electricity can damage electronic components. Please discharge any static electrical charge
by touching a grounded surface, such as the metal computer chassis, before performing any
hardware installation. If you do not feel comfortable performing the installation, please consult a
qualified computer technician.

Important: Never remove or install any ha rdware component with the computer power
on. Disconnect the power cord from the computer to disable the power standby mode.
This prevents the case where some c omputers unexpectedly power up when a board is
installed.

Installation

The Sapera LT Development Library (or ‘runtime librar y’ if application execution without
development is preferred) must be installed before the Xtium-CL PX4 device driver.

 Turn the computer off, disconnect the power cord (disables power standby mode), and open the

computer chassis to allow access to the expansion slot area.

 Install the Xtium-CL PX4 into a free PCI Express x4 G en 2 expansion slot (or an available x8

slot). Note that some computer's x16 slot may support the Xtium-CL PX4.

 Connect a spare power supply connector to J7 for PoC L cam e ra s or when DC power is required

on the external signals connector J1. See Power Cable Assembly OR-YXCC-PWRY00 for
information about an adapter for older computers.

 Close the computer chassis and turn the computer on.
 Logon to the workstation as administrator or with an account that has administrator privileges.
 Windows will find the Xtium-CL PX4 and start its Found New Hardware Wizard. Click on the

Cancel button to close the Wizard.

Sapera LT Library & Xtium-CL PX4 Driver Installation

 Insert the Teledyne DALSA Sapera Essential CD-ROM. If AUTORUN is enabled on your

computer, the installation menu is pre sented.

 If AUTORUN is not enabled, use Windows Explorer and browse to the root directory of the CD-

ROM. Execute autorun.exe to start the installation menu.

 From the CD Browser menu, select the Software Installation menu to install the required

Sapera components. Select the Xtium-CL PX4 Driver and required Sapera package. Click the
Next button to cycle through the various board product families.

 If the installation of Sapera and Board Drivers is not done through the CD Browse applet, make

sure Sapera LT is installed before any board drivers.

 The installation program may prompt to reboot the computer. It is not necessary to reboot the

computer between the installation of Sapera LT and the board driver. Simply reboot o nce all the
software and board drivers are installed.

 During the late stages of the installation, t he Xtium-CL PX4 firmware loader application starts.

This is described in detail in the following section.

 If Windows displays any unexpected mess a ge concerning the installed board, power off the

system and verify the Xtium-CL PX4 is installed in the slot properly.

Refer to Sapera LT User’s Manual for additional details about Sapera LT.

Xtium-CL PX4 User's Manual Installing Xtium-CL PX4 • 10

Xtium-CL PX4 Firmware Loader

The Device Manager-Firmware Loader program automatically executes at the end of the driver
installation and on every subsequent re boot of the computer. It will determine if the Xtium-CL PX4
requires a firmware update. If firmware is required, a dialog displays. This dialog also allows the
user to load firmware for alternate operational modes of the Xtium-CL PX4.

Important: In the rare case of firmware loader errors please see "Recovering from a Firmware
Update Error" on page 26.

Firmware Update: Automatic Mode

Click Automatic to update the Xtium-CL PX4 firmware. The Xtium-CL PX4 supports various
firmware configurations with the default being a Full, Medium, or Base camera.

See “Series Key Features” on page 7 and “User Programmable Configurations” on page 7 for details
on all supported modes, selected via a manual firmware update.

With multiple Xtium-CL PX4 boards in the system, all are updated with new firmware. If any
installed Xtium-CL PX4 board installed in a system already has the correct firmware version, an
update is not required. In the following screen shot, a single Xtium-CL PX4 Full board is installed
and ready for a firmware upgrade.

Figure 1: Automatic Firmware Update

Firmware Update: Man ual Mode

Select Manual mode to load firmware other then the default version or when, in the case of
multiple Xtium-CL PX4 boards in the same system, if each requires different firmware.

The following figure shows the Device Manager manual firmware screen. Displayed is information
on all installed Xtium-CL PX4 boards, their serial numbers, and their firmware components.

Do a manual firmware update as follows:

• Select the Xtium-CL PX4 to update via the board selection box (if there are multiple boar ds

in the system)

• From the Configuration field drop menu select the firmware version required (typical

required to support different cameras)

• Click on the Start Update button

• Observe the firmware update progress in the message output window

• Close the Device manager program when the device reset complete message is shown

Xtium-CL PX4 User's Manual Installing Xtium-CL PX4 • 11

Figure 2: Manual Firmware Update

Executing the Firmware Loader from the Start Menu

If required, the Xtium-CL PX4 Firmware Loader program is executed via the Windows Start Menu
shortcut Start • Programs • Teledyne DALSA • Xtium-CL PX4 Driver • Firmware Update. A
firmware change after installation would be required to select a different configuration mode. See

"User Programmable Configurations" on page 7.

12 • Installing Xtium-CL PX4 Xtium-CL PX4 User's Manual

Requirements for a Silent Install

Both Sapera LT and the Xtium-CL PX4 driver installations share the same installer technology.
When the installations of Teledyne DALSA products are embedded within a third party’s product
installation, the mode can either have user interaction or be completely silent. The following
installation mode descriptions apply to both Sapera and the hardware driver.

Note: You must reboot after the installation of Sapera LT. Howev er , to s tr e a m line the
installation process, Sapera LT can be installed without rebooting before installin g the board
hardware device drivers . The installations then complete with a single final sy s te m r eb oot.

Perform Teledy n e DALSA embedded installations in either of these two ways:
 Normal Mode

The default mode is interactive. This is id e n t ical to running the setup.exe program manually
from Windows (either run from Windows Explor er or the Windows command line).

 Silent Mode

This mode requires no user interaction. A preconfigured “response” file provides the user input.
The installer disp lays nothing.

Silent Mode Installation

A Silent Mode installation is recommended when integrating Teledyne DALSA products into your
soft ware installation. The silent installation mode allows the device driver installation to proceed
without the need for mouse clicks or other input from a user.

Preparing a Silent Mode Installation requires two steps:

 Prepare the response file, which emulates a user.
 Invoke the device driver installer with command options to use the prepared response file.

Creating a Response File

Create the installer response file by performing a dev ice driver installation with a command line
switch "-r". The response file is automatically named setup.iss and is saved in the \windows

folder. If a specific directory is desired, the switch –f1 is used.
As an example, to save a response file in the same directory as the installation executable of the

Xtium-CL PX4, the command line would be:

Xtium-CL_PX4_1.00.00.0000 –r –f1”.\setup.iss”

Running a Silent Mode Installation

A device driver silent installation, whether done alone or within a larger softw are installation
requires the device driver executable and the generated response file setup.iss.

Execute the device driver installer with the following command line:

Xtium-CL_PX4_1.00.00.0000 -s -f1".\setup.iss"

Where the –s switch specifies the silent mode and the –f1 switch specifies the location of the
response fil e. In this example, the switch –f1".\setup.iss" specifies that the setup.iss file be in the

same folder as the device driver installer.

Note: On Windows 7 and 8, the Windows Security d ia log b ox will appear unless one has alre a dy
notified Windows to ‘Always tru s t software from “Teledyne DALSA Inc.” during a previous
installation of a dr iver.

Xtium-CL PX4 User's Manual Installing Xtium-CL PX4 • 13

Silent Mode Uninstall

Similar to a silent installation, a response file must be prepared first as follows.

Creating a Response File

The installer response file is created by performing a device driver un-installation with a command
line switch "-r". The response file is automatically named setup_uninstall.iss which is saved in
the \windows folder. If a specific directory is desired, the switch “–f1” is used.

As an example, to save a response file in the same directory as the installation executable of the
Xtium-CL PX4, the command line would be:

Xtium-CL_PX4_1.00.00.0000 –r –f1”.\setup_uninstall.iss”

Running a Silent Mode Uninstall

Similar to the device driver silent mode installation, the un-installation requires the device driver
executable and the generated resp on s e fi le setup.iss.

Execute the device driver installer with the following command line:

Xtium-CL_PX4_1.00.00.0000 -s -f1".\setup_uninstall.iss"

Where the –s switch specifies the silent mode and the –f1 switch specifies the location of the
response fil e. In this example, the switch –f1".\setup_uninstall.iss" specifies that the
setup_uninstall.iss file be in the same folder as the device driver installer.

Silent Mode Installation Return Code

A silent mode installation creates a file “corinstall.ini” in the Windows directory. A section called
[SetupResult] contains the ‘status’ of the installation. A value of 1 indicates that the installation has
started and a value of 2 indicates that the instal lation has terminated.

A silent mode installation also creates a log file “setup.log” which by default is created in the same
directory and with the same name (except for the extension) as the response file. The /f2 option
enables you to spec ify an alternative log file location and file name, as in
Setup.exe /s /f2"C:\Setup.log".

The “setup.log” file contains three sect ions. The first section, [InstallShield Silent], id entifies th e
version of InstallShield used in the silent installation. It als o identifies the file as a log file. The
second section, [Application], identifies the installed appl ication name, ver sion, and the company
name. The third section, [ResponseResult], contains the ‘ResultCode’ indicating whether the silent
installation succeeded. A value of 0 means the installation was successful.

Installation Setup with CorAppLauncher.exe

The installation se t u p can be run with the CorAppLauncher.exe tool provided with the drive r.

 Install the board driver and get CorAppLauncher.exe from the \bin directory of the installation.
 When running the installation, CorAppLauncher.exe will return only when the installation is

finished.

 When run from within a batch file, obtain the installation exit code from the ERRORLEVEL value.
 The arguments to CorAppLauncher.exe are

-l: Launch application

-f: Application to launch. Specify a fully qualified path.

As an example:

 CorAppLauncher –l –f”c:\driver_install\Xtium-cl_PX4_1.00.00.0000.exe”
 IF %ERRORLEVEL% NEQ 0 goto launch error

14 • Installing Xtium-CL PX4 Xtium-CL PX4 User's Manual

Note: There is a 32-bit and 64-bit version of CorAppLauncher.exe. When installing the driver, only
the version related to the OS is installed. However, the 32-bit version is usable on either 32-bit or
64-bit Windows.

Custom Driver Installation using install.ini

Customize the driver installation by parameters defined in the file “install.ini”. By using this file, the
user can:

 Select the user default configuration.
 Select different configurations for systems with multiple boards.
 Assign a standard Serial COM port to board.

Creating the install.ini File

 Install the driver in the target computer. All Xtium-CL PX4 boards required in the system must

be installed.

 Configure each board’s acquisition firmware using the Teledyne DALSA Device Manager tool

(see Device Ma n ag er – Board Viewer).

 If a standard Serial COM port is required for any board, use the Sapera Configuration tool (see

COM Port Assignment).

 When each board setup is complete, using the Teledyne DALSA Device Manager tool, click on

the Save Config File button. This will create the “install.ini” file.

Figure 3: Create an install.ini File

Run the Inst allation using install. ini

Copy the install.ini file into the same directory as the se tup installation file. Run the setup
installation as normal. The installation will automat ically check for an instal l.ini file and if found, use
the configuration defined in it.

Xtium-CL PX4 User's Manual Installing Xtium-CL PX4 • 15

Upgrading Sapera or Board Driver

When installing a new version of Sapera or a Teledyne DALSA acquisition board driver in a
computer with a previous insta llation, the current version must be un-installed first. Described
below are two upgrade situations. Note that if the board is installed in a different slot, the new
hardware wizard opens. Answer as instructed in section “Installation” on page 10.

Board Driver Upgrade Only

Minor upgrades to acquisition board drivers are distributed as ZIP files available in the Teledyne
DALSA web site www.teledynedalsa.com/mv/support. Board driver revisions are also available on
the next release of the Sapera Essential CD-ROM.

Often minor board driver upgrades do not require a new revision of Sapera. To confirm that the
current Sapera version will work with the new board driver:

• Check the new board driver ReadMe file before installing, for information on the minimum

Sapera version required.

• If the ReadMe file does not specify the Sapera version required, contact Teledyne DALSA

Technical Support (see "Technical Supp ort" on page 85 ).

To upgrade the board driver only:

• Logon the computer as an administrator or with an account that has administrator

privileges.

• In Windows 7, from the start menu select Start • Settings • Control Panel • Programs

and Features. Double-click the Teledyne DALSA Xcelera board driver and click Remove.

• Install the new board driver. Run Setup.exe if installing manually from a downloaded driver

file.

• In Windows 8 & Windows 10, just type Control Panel while in the start screen, or click

the arrow in the lower left side to bring up the all applications window. Select Programs and
Features, then double-click the Teledyne DALSA Xcelera board driver and click Remove.

• If the new driver is on a Sapera Essential CD-ROM follow the installation procedure

described in "& Xtium-CL PX4 Driver" on page 10.

• Important: You cannot install a Teledyne DALSA board driver without Sapera LT installed

on the computer.

Upgrading both Sapera and Board Driver

When upgrading both Sapera and the acquis it ion board driver, follow the procedure described
below.

• Logon the computer as an administrator or with an account that has administrator

privileges.

• In Windows 7, from the start menu select Start • Settings • Control Panel • Programs

and Features. Double-click the Teledyne DALSA Xcelera board driver and click Remove.

Follow by also removing the older version of Sapera LT.

• In Windows 8 & Windows 10, just type Control Panel while in the start screen, or click

the arrow in the lower left side to bring up the all applications window. Select Programs

and Features, then double-click the Teledyne DALSA Xcelera board driver and click
Remove.

• Reboot the computer and logon the computer as an administrator again.

• Install the new versions of Sapera and the board driver as if this was a first time

installation. See "Sapera LT Library & Xtium-CL PX4 Driver Installation" on page 10 and "&
Xtium-CL PX4 Driver" on page 10 for installation procedures.

16 • Installing Xtium-CL PX4 Xtium-CL PX4 User's Manual

Using the Camera Link Serial Control Port

The Camera Link cabling specif ication includes a serial communication port for direct camera
control by the frame grabber (see "J3: Camera Link Connector 1 " on page 66). The Xtium-CL PX4
driver supports this serial communication port either directly (such as the Serial Command window
in CamExpert) or by mapping it to a host computer COM port. Any serial port communication
program, such as Windows HyperTerminal, can connect to the camera in use and modify its
function modes via its serial port controls. The Xtium-CL PX4 serial port supports communication
speeds from 9600 to 921600bps. The serial port is created by the kernel driver, so it will be
available even if no Sapera LT application has started.

Note: if the serial communic a tion program can directly select the Xtium-CL PX4 serial p ort then
mapping to a system COM port is not necessary.

When required, map the Xtium-CL PX4 serial port to an available COM port by using the Sapera
Configuration tool. Run the program from the Windows s ta rt menu: Start • Programs • DALSA •
Sapera LT • Sapera Configuration.

COM Port Assignment

The lower section of the Sapera Configuration program screen contains the serial port configuration
menu. Configure as follows:

• Use the Physical Port drop menu to select the Sapera board device from all available

Sapera boards with serial ports (when more then one board is in the system).

• Use the Optional COM Ports Mapping drop menu to assign an available COM number to

that Sapera board serial port.

• Click on the Sav e Settings Now button then the Close button. Reboot the computer at the

prompt to enable the serial port mapping.

Figure 4: Sapera Configuration Program

Xtium-CL PX4 User's Manual Installing Xtium-CL PX4 • 17

Displaying Xtium-CL PX4 Board Information

The Device Manager program also displays information about the Xtium-CL PX4 boards installed in
the system. To view board information run the program via the Windows Start Menu shortcut Start

• Programs • Teledyne DALSA • Xtium-CL PX4 Device Driver • Device Manager.

Device Manager – Board Viewer

The following screen image shows the Device Manager program with the Information/Firmware tab
active. The left window displays all Teledyne DALSA boards in the system and their individual
device components. The right window displays the information stored in the selecte d board device.
This example screen shows the Xtium-CL PX4 board information.

Generate the Xtium-CL PX4 device manager report file (BoardInfo.txt) by clicking File • Save
Device Info. Teledyn e D A LS A Technical Support may requ est this report to aid in troubleshooting
installation or operational problems.

Figure 5: Board Information via Device Manager

Information Field Description

 Serial Number [Read-Only]: Serial Number of the board
 Hardware ID [Read-Only]: This field will identify future hardware changes that affect the

operation of the board. Currently there are no such changes.

 Hardware Configuration [Read-Only]: This field will state the presence o r abs en ce of optional

components. Currently there are no optional components available.

 User Data [Read/Write]: This is a 64 byte general purpose user storage area. For information

on how to read/write this field at the application level, contact Teledyne DALSA Technical
Support.

 User Interface GIO s R eservation [Read/Write]: Use this field to reserve User Interface GIOs

for use by the acquisition module. By default, boards are shipped with User Interface General
Inputs 1 & 2 reserved for External Triggers and User Interface General Outputs 1 & 2 reserved
for Strobe Outputs.

Click on the ‘Value’ field to open the dialog box show below. Disable any GIO reservations that

18 • Installing Xtium-CL PX4 Xtium-CL PX4 User's Manual

are not required. Click the OK button to update the value field.

 User Interface GIOs Default Input Level [Read/Write]: Use this field to select the default

input level of the User Interface GIOs. By default, boards are shipped with User Interface
General Inputs set to 24V. Note that the input level can also be modified at the application
level.

Click on the ‘Value’ field to open the drop selection box show below. Select the input signal
level detection required.

 Open Interface GIOs Reservation [Read/Write]: Use this field to reserve Open Interface

GIOs for use by the acquisition module. By default, boards are shipped with Open Interface
GIOs 1 & 2 reserved for Board Sync 1 & 2.

Click on the ‘Value’ field to open the dialog box show below. Disable any GIO reservations that
are not required. Click the OK button to update the value field.

Xtium-CL PX4 User's Manual Installing Xtium-CL PX4 • 19

Configuring Sapera

Viewing Installed Sapera Servers

The Sapera configuration program (Start • Programs • Teledyne DALSA • Sapera LT •
Sapera Configuration) allows the user to see all available Sapera servers for the installed

Sapera-compatible boards. The System ent r y r ep r es en t s the system server. It corresponds to the
host machine (your computer) and is the only serv er that should always be present.

Increasing Contiguous Memory for Sapera Resources

The Contiguous Memory section lets the user specify the total amount of contiguous memory (a
block of physical memory, occupying consecutive addresses) reserved for the resources needed for
Sapera buffers allocation and Sapera messaging. For both items, the Requested value dialog
box shows the ‘CorMem’ driver default memory setting while the Allocated value displays the
amount of contiguous memory allocated successfully. The default values will generally satisfy the
needs of most applications.

The Sapera buffers value determines the total amount of contiguous m emory reserved at boot
time for the allocation of dynamic resources used for frame buffer management such as scatter­gather list, DMA descriptor tables p lus other kernel needs. Adjust this value higher if your
application generates any out-of-memory error while allocating host frame buffers or when
connecting the buffers via a transfer object. You can approximate the worst-case scenario amount
of contiguous memory required as follows:

• Calculate the total amount of host memory used for one frame buffer

[number of pixels per line • number of lines • (2 - if buffer is 10/12/14 or 16 bits)].

• Provide 200 bytes per frame buffer for Sapera buffer resources.

• Provide 64 bytes per frame buffe r for metadata. Memory for this data is reserved in chunks

of 64kB blocks.

• Provide 48 bytes per frame buffer for buffer management. Memory for this data is reserved

in chunks of 64kB blo cks .

• For each frame buffer DMA table, allocate 24 bytes + 8 bytes for each 4kB of buffer. For

example, for a 120x50x8 image: 120x50 = 6000 = 1.46 4kB blocks -> roundup to 2 4kB
blocks. Therefore 24 bytes + (2 * 8 bytes) = 40 bytes for DMA tables per frame buffer.
Memory for this data is reserved in chunks of 64kB blocks. If vertical flipping is enabled, one
must add 16 bytes per line per buffer. For example, for an image 4080x3072 image: 16
bytes * 3072 = 49152 bytes.

• Note that Sapera LT reserves the 1

per frame buffer mentioned above.

• Test for any memory error when allocating host buffers. Simply use the Buffer menu of the

Sapera Grab demo program (see "Grab Demo Overview" on page 34) to allocate the
number of host buffers required for your acquisition source. Feel free to test the maximum
limit of host buffers possible on your host system – the Sapera Grab demo will not crash
when the requested number of host frame buffers is not allocated.

• The following calculation is an example of the amount of contiguous memory to reserve

beyond 5MB with 80,000 buffers of 2048x1024x8:
a) (80000 * 64 bytes)
b) (80000 * 48 bytes)
c) (80000 * (24 + (((2048*1024)/4kB) * 8))) = 323MB
d) Total = a (rounded up to nearest 64kB) + b (rounded up to nearest 64kB) + c (rounded
up to nearest 64kB).

st

5MB of its own resources, which includes the 200 bytes

20 • Installing Xtium-CL PX4 Xtium-CL PX4 User's Manual

Host Computer Frame Buffer Memory Limitations

When planning a Sapera application and its host frame buffers used, plus other Sapera me mory
resources, do not forget the Windows operating system memory needs.

A Sapera application using the preferred scatter gather buffers could consume most of the
remaining system memory, with a large allocation of frame buffers. If using frame buffers allocated
as a single contiguous memory block, Windows will limit the allocation depe ndent on the installed
system memory. Use the Buffer menu of the Sapera Grab demo program to allocate host buffer
memory until an error message signals the limit allowed by the operating system used.

Contiguous Memory for Sapera Messaging

The current value for Sapera messagin g determines the total amount of contiguous memory
reserved at boot time for messages allocation. This memory space stores arguments when a
Sapera function is ca l led. Increase this value if you are using functions with large arguments, such
as arrays and experience any memory errors.

Xtium-CL PX4 User's Manual Installing Xtium-CL PX4 • 21

Troubleshooting Problems

Overview

The Xtium-CL PX4 (and the Xtium family of products) is tested by Teledyne DALSA in a variety of
computers. Although unlikely, installation problems may occur due to the constant changing nature
of computer equipment and operating syste ms. This section describes what the user can verify to
determine the problem or the checks to make before contacting Teledyne DALSA Technical
Support.

If you require help and need to contact Teledyne DALSA Technical Support, make detailed notes on
your installation and/or test results fo r our technical support to review. See "Technical Support" on

page 85 for contact information.

Problem Type Summary

Xtium-CL PX4 problems are either installation types where the board hardware is not recognized on
the PCIe bus (i.e. trained), or function errors due to came ra connections or bandwidth issues. The
following links jump to various topics in this tro ubleshooting section.

First Step: Check the Status LED

Status LED D1 should be GREEN or flashing GREEN just after boot up. If it remains flashing RED,
the board firmware did not load corre ctly. If LED D1 is BLUE or flashing BLUE, the board is
running from the s af e mode load.

Camera Link status is indicated by the two LEDs (D3, D4) mounted next to each Camera Link
connector. Th es e LEDs show the presence of the pixel clock and an active acquisition.

The complete status LED descriptions are available in the technical reference section (see "Status
LED Functional Description" on page 65).

Possible Installation Problems

 Hardware PCI bus conflict: When a new installation produces PCI bus error messages or the

board driver does not install, it is important to ver ify that there are no conflicts with other PCI
or system devices already installed. Use the Teledyne DALSA PCI Diagnostic tool as described in

"Checking for PCI Bus Conflicts" on page 23. Also verify the instal lation via the "Windows

Device Manage r" on page 24.

 BSOD (blue screen) following a board reset: After programming the board with different

firmware, the computer displays the BSOD when the board is reset (see "BSOD (blue screen)
Following a Board Reset" on page 25).

 Verify Sapera and Board dri vers: If there are errors when running appl ications, confir m t hat

all Sapera and board drivers are running. See "Sapera and Hardware Windows Drivers" on page

25 for details. In addition, Teledyne DALSA technical support will ask for the log file of

messages by Teledyne DALSA drivers. Follow the instructions describe in "Teledyne DALSA Log
Viewer" on page 27.

 Firmware update error: There was an error during the Xtium-CL PX4 firmware update

procedure. The user can usually easily corrects this. Follow the instructions "Recovering from a
Firmware Update Error" on page 26.

 Installation went well but the board doesn't work or stopped working. Review theses steps

described in "Symptoms: CamExpert Detects no Boards" on page 27.

Xtium-CL PX4 User's Manual Troubleshooting Problems • 22

Possible Functional Problems

 Driver Information: Use the Teledyn e D AL SA device manager program to view information

about the installed Xtium-CL PX4 board and driver. See "Driver Information via the Device
Manager Program" on page 26.

 On-Board Image Memory Requirements: The Xtium-CL PX4 on-board memory can provide

two frame buffers large enough for most imaging situations. See "On-board Image Mem o ry
Requirements for Acquisitions" on page 27 for details on the on board memory and possible
limitations.

Sometimes the problem symptoms are not the re sult of an installation issue but due to other
system issues. Review the sections described below for solutions to various Xtium-CL PX4
functional problems.

 "Symptoms: Xtium-CL PX4 Does Not Grab" on page 28
 "Symptoms: Card grabs black" on page 28
 "Symptoms: Card acquisition bandwidth is less than expecte d" on page 29

Troubleshooting Procedures

The following sections provide information and solutions to possible Xtium-CL PX4 installation and
functional problems. The previous section of this manual summarizes these topics.

Checking for PCI Bus Conflicts

One of the first items to check when there is a problem with any PCI board is to examine the
system PCI configurat ion and ensure that there are no conflicts with ot h er PCI or system devices.
The PCI Diagnostic program (cpcidiag.exe) allows examination of the PCI configuration registers
and can save this information to a tex t file. Run the program via the Windows Start Menu shortcut
Start • Programs • Teledyne DALSA • Sapera LT • Tools • PCI Diagnostics.

As shown in the following screen image, use the first drop menu to select the PCI device to
examine. Select the device from Teledyne DALSA. Note the bus and slot number of the installed
board (this will be unique for each system unless systems are setup identically). Click on the
Diagnostic button to view an analysis of the system PCI configuration space.

Xtium-CL PX4 User's Manual Troubleshooting Problems • 23

Figure 6: PCI Diagnostic Program

Clicking on the Diagnostic button opens a new window with the diagnostic report. From the PCI
Bus Number drop menu, select the bus number that the Xtium-CL PX4 is installed in—in this
example the slot is bus 2.

The window now shows the I/O and memory ranges used by each device on the selected PCI bus.
The information display box will detail any PCI conflicts. If there is a problem, click o n the Save
button. A file named ‘pcidiag.txt’ is created (in the Sapera\bin directory) with a dump of the PCI
configuration registers. Email this file when requested by the Teledyne DALSA Technical Support
group along with a full description of your computer.

Figure 7: PCI Diagnostic Program – PCI bus info

Windows Device Manag er

An alternative method to confirm the installation of the Xtium-CL PX4 board and driver is to use
the Windows Device manager tool. Use the Start Menu shortcut Start • Control Panel • System

• Device Manager. As shown in the following screen images, look for Xtium-CL PX4 board under

“Imaging Devices”. Double-click and look at the device status. You should see “This device is

24 • Troubleshooting Problems Xtium-CL PX4 User's Manual

working properly.” Go to “Resources” ta b a nd make certain that the device has an interrupt
assigned to it, without conflicts.

Figure 8: Using Windows Device Manager

BSOD (blue screen) Following a Board Reset

Teledyne DALSA engineering has identified cases where a PC will falsely report a hardware
malfunction when the Xtium-CL PX4 board is reset. The symptoms will be a Windows blue screen
or PC that freezes following a board reset.

st

The 1

solution to this problem is to use the Xtium-CL PX4 driver 1.10 or higher along with Sapera
LT 7.40 or higher. If this still does not resolve the issue, then uninstall the driver and reinstall it
using the switch “/cr”, which will not reset the board at the end of the installation but requires a
reboot of the computer instead.

 Example: Xtium-CL_PX4_1.00.00.0000.exe /cr

Sapera and Hardware Windows Drivers

Any problem seen after installation, such as an error messa g e running CamExpert, first make
certain the appropriate Teledyne DALSA drivers have started successfully during the boot
sequence. Example, click on the Start • Programs • Accessories • System Tools • System
Information • Software Environment and click on System Drivers. Make cer tain the following
drivers have started for the Xtium-CL PX4.

Device Description Type Started

CorXtiumCLPX4 Xtium-CL PX4 messaging Kernel Driver Yes
CorLog Sapera Log viewer Kernel Driver Yes
CorMem Sapera Memory manager Kernel Driver Yes
CorPci Sapera PC I c onfiguration Kernel Driver Yes
CorSerial Sapera Serial Port manager Kernel Driver Yes

Table 4: Xtium-CL PX4 Device Drivers

Teledyne DALSA Technical Support may request that you check the status of these drivers as part
of the troubleshooting process.

Xtium-CL PX4 User's Manual Troubleshooting Problems • 25

Recovering from a Firmware Update Error

This procedure is required if any failure occurred while updating the Xtium-CL PX4 firmware on
installation or during a manual firmware upgrade. If on the case the board has corrupted firmware,
any Sapera application such as CamExpert or the grab demo program will not find an installed
board to control.

Possible reasons for firmware loading errors or corruption are:

• Computer system mains power failure or deep brown-out

• PCI bus or checksum errors

• PCI bus timeout conditions due to other devices

• User forcing a partial firmware upload using an inval id firmware source file

When the Xtium-CL PX4 firmware is corrupted, the board will automatically run from the Safe load
after a board and/or PC reset.

Solution: Update the board using the standard method described in section Firmware Update:
Automatic Mode.

Driver Information via the Device Manager Program

The Device Manager program provides a convenient method of collecting information about the
installed Xtium-CL PX4. System information such as operating system, computer CPU, system
memory, PCI configuration space, plus Xtium-CL PX4 firmware information is displayed or written
to a text file (default file name – BoardInfo.txt). Note that this program also manually uploads
firmware to the Xtium-CL PX4 (described elsewhere in this manual).

Execute the program via the Windows Start Menu shortcut Start • Programs • Teledyne DALSA

• Xtium-CL PX4 Device Driver • Device Manager. If the Device Manager Program does not
run, it will exit with a board was not found message. Possible reasons for an error are:

• Board is not in the computer

• Board driver did not start or was terminated

• PCI conflict after some other device was installed

Information Window

The following figure shows the Device Manager Information screen. Click to highlight one of the
board components and its information shows in the right hand window, as described below.

Figure 9: Board Firmware Version

26 • Troubleshooting Problems Xtium-CL PX4 User's Manual

• Select Information to display identification and information stored in the Xtium-CL PX4
firmware.

• Select Firmware to display version information for the firmware components.

• Select one of the firmware components to load custom firmware when supplied by Teledyne

DALSA engineering for a future feature.

• Click on File • Save Device Info to save all i nformation to a text file. Email this file when
requested by Technical Support.

Teledyne DALSA Log Viewer

The third step in the verification process is to save in a text file the information collected by the
Log Viewer program. Run the program via the Windows Start Menu shortcut Start • Programs •
Teledyne DALSA • Sapera LT • Tools • Log Viewer.

The Log Viewer lists information about the installed Teledyne DALSA drivers. Click on File • Save
and you will be prompted for a text file name to save the Log Viewer contents. Email this text file
to Teledyne DALSA Technical Support when requested or as part of your initial co ntact email.

On-board Image Memory Requirements for Acquisitions

The Xtium-CL PX4 by default will allocate the maximum number of buffers that can fit in on-board
memory based on the size of the acquired image before cropping, to a maximum of 65535 buffers.
Note that an application can change the default number of on-board frame buffers using the
Sapera LT API. Usually two buffers will ensure that the acquired video frame is complete and not
corrupted in cases where the image transfer to host system memory may be interrupted and
delayed by other host system processes. That is, there is no interruption to the image acquisition
of one buffer by any delays in transfer of the other buffer (which contains the previously acquired
video frame) to system m em o ry .

If allocation for the requested number of buffers fails, the driver will reduce the number of on­board frame buffers requested until they can all fit.

 For area scan cameras, a minimum of 2 on-board frame buffers is needed for proper operation.
 For line scan cameras, if there is not enough memory for 2 on-board buffers, the driver will

reduce the size such that it allocates two partial buffers. This mode is dependent on reading out
the image data to the host computer faster than the incoming acquisition.

The maximum number of buffers that can fit in on-boar d memory can be calculated as follows:
(Total On-Board memory / (Buffer Size in Bytes + 256 Bytes used to store the DMA)).

For example, assuming 512MB of on-board memory and acquiring 1024 x 1024 x 8 bit images, the
number of on-board buffers would be: 512 MB / [(1024 x 1024) + 256] = 511.875 => 511 on-
board buffers.

Symptoms: C a mExpert Detects no Boards

• When starting CamExpert, with no Teledyne DALSA board detected, CamExpert will start in
offline mode. There is no error message and CamExpert is functional for creating or
modifying a camera configuration file. If CamExpert should have detected an installed board
frame grabber, troubleshoot the installation problem as described below.

Troubleshooting Procedure

When CamExpert detects no installed Teledyn e D AL SA board, there could be a hardware problem,
a system bus problem, a kernel driver problem, or a software installation problem.

• Make certain that the card is properly seated in PCIe slot.

• Perform all installation checks described in this section before contacting Technical Support.

• Try the board in a different PCIe slot if available.

Xtium-CL PX4 User's Manual Troubleshooting Problems • 27

Symptoms: Xtium-CL PX4 Does Not Grab

You are able to start Sapera CamExpert but you do not see an image and the frame rate displayed
is 0.

• Verify the camera has power.

• Verify the Camera Link cable is connected to the camera.

• Verify the camera and timing parameters with the camera in free run mode.

• Verify you can grab with the camera in free run mode.

• Make certain that you provide an external trigger if the camera configuration file requires

one. Use the software trigger feature of CamExpert if you do not have a trigger source.

• Make certain that the camera configuration is the required mode. This must match the
camera configuration file. Refer to your camera datasheet.

• Try to snap one frame instead of continuous grab.

• Perform all installation checks described in this section befor e conta cting Technical Support.

Symptoms: Card grabs black

You are able to use Sapera CamExpert, the displayed frame rate is as expected, but the display is
always black.

• Set your camera to manual exposure mode and set the exposure to a longer period, plus
open the lens iris.

• Try to snap one frame instead of continuous grab.

• Make certain that the input LUT is not programmed to output all ‘0’s.

• A PCIe transfer issue sometimes causes this problem. No PCIe transfer takes place, so the

frame rate is above 0 but nevertheless no image is displayed in CamExpert.

• Make certain that BUS MASTER bit in the PCIe conf iguration space is activated. Look in PCI
Diagnostics for BM button under “Command” group. Make certain that the BM button is
activated.

Figure 10: PCI Diagnostic – checking the BUS Master bit

• Perform all installation checks described in this section before contacting Technical Support.

28 • Troubleshooting Problems Xtium-CL PX4 User's Manual

Symptoms: Card acquisition bandwidth is less than expected

The Xtium-CL PX4 acquisition bandwidth is less than expected.

• Review the system for problems or conflicts with other expansion boards or drivers.

• Remove other PCI Express, PCI-32 or PCI-64 boards and check acquisition bandwidth again.

Engineering has seen this case where other PCI boards in some systems cause limitations in
transfers. Each system, with its combination of system motherboard and PCI boards, will be
unique and must be tested for bandwidth limitations affecting the imaging application.

• Is the Xtium-CL PX4 installed in a PCI Express x16 slot?
Note that some computer's x16 slot may only support non x16 boards at x1 or not at all.
Check the computer documentation or test an Xtium-CL PX4 installation. The speed at which
the board is running can be viewed using the Diagnostic Tool provided with the driver.

• Is the Xtium-CL PX4 installed in a PCI Express Gen1 slot?
Some older computers only have PCIe Gen1 slots. The Generation at which the board is
running can be viewe d using the Sapera LT PCI Diagnostic or the Diagnostic Tool provided
with the driver.

Xtium-CL PX4 User's Manual Troubleshooting Problems • 29

CamExpert Quick Start

Interfacing Cameras with CamExpert

CamExpert is the camera-interfacing tool for Teledyne DALSA frame grabber boards supported by
the Sapera library. CamExpert generates the Sapera camera configuration file (yourcamera.ccf)
based on timing and control parameters entered. For backward compatibility with previous versions
of Sapera, CamExpert also reads and writes the *.cca and *.cvi camera parameter files.

Every Sapera demo program starts with a dialo g window to select a camera configuration file. Even
when using the Xtium-CL PX4 with common video signals, a camera file is required. Therefore,
CamExpert is typically the first Sapera application run after an installation. Obviously exist ing .ccf
files can be copied to any new board installations when similar cameras are used.

CamExpert Example with a Monochrome Camera

The image below shows CamExpert controlling the Xtium-CL PX4. The camera (a Teledyne DALS A
Falcon) is outputting an internal monochrome 8-bit test pattern. After selecting the camera model,
the timing parameters are displayed and the user can test by clicking on Grab. Descriptions of the
CamExpert sections follow the image.

Figure 11: CamExpert Program

Xtium-CL PX4 User's Manual CamExpert Quick Start • 30

CamExpert groups parameters into functional categories. The parameters shown depend on the
frame grabber used and what camera is connected. The parameter values are either the camera
defaults or the last stored value when the camera was used. The descriptions below are with the
Xtium-CL PX4 and the Teledyne DALSA Falcon camera.

 Device Selector: Two drop menus allow selection of which device and which saved

configuration to use.

• Device: Select which acquisition device to control and configu re a camera file. Required in
cases where there are multiple boards in a system and when one board supports multiple
acquisition types. Note in this example, the installed Xtium-CL PX4 has firmware to support
a monochrome Camera Link camera.

• Configuration: Select the timing for a specif ic camera model included with the Sapera
installation or a standard video standard. The User's subsection is where user created
camera files are stored.

• Detection: The Settings button opens a menu to select the form of automatic camera
detection, such as serial port text based controls or GenCP for Camera Link. The Detect
Camera button attempts to identify the connected camera.

 Parameter Groups: Select a function category and change parameter values as required.

Descriptions for the camera parameters change dependent on the camera. The following
information pertains to a Teledyne DALSA Falcon camera.

• Basic Timing: Provides or change static camera parameters.

• Advanced Controls: Advanced parameters used to select various integration methods,

frame trigger type, Camera Link controls, etc.

• External Trigger: Parameters to configure the external trigger characteristics.

• Image Buffer and ROI: Allows control of the host buffer dimension and format.

• Display: An important component of CamExpert is its live acquisition display window, which

allows immediate verification of timing or control parameters without the need to run a
separate acquisition program. Grab starts continuous acquisition (button then toggles to
Freeze to stop). Snap is a single frame grab. Trigger is a software trigger to emulate an
external source.

• Output Messages and Video Status Bar: Events and errors are logged for review. Camera
connection status is displayed where green indicates signal present.

• Camera Link Serial Command: Select this Tab to open a serial command port to the camera.
This allows the user to issue configuration c ommands if supported by the camera.

The CamExpert tool is described more fully in the Sapera Getting started and Sa p era Introduction
manuals.

CamExpert Demonstration and Test Tools

The CamExpert utility also includes a number of demonstration features, which make CamExpert
the primary tool to configure, test and calibrate your camera and imaging setup. Display tools
include, image pixel value readout, image zoom, and line profiler.

Functional tools include support for either hardware based or software Bayer filter camera decoding
with auto white balance calibration.

Camera Types & Files

The Xtium-CL PX4 supports digital area scan or line scan cameras using the Camera Link interface
standard. Browse our web site [http://www.teledynedalsa.com/imaging/] for the latest information
on Teledyne DALSA Camera Link cameras.

Xtium-CL PX4 User's Manual CamExpert Quick Start • 31

Camera Files Distributed with Sapera

The Sapera distribution includes camera files for a selection of Xtium-CL PX4 supported cameras.
Using the Sapera CamExpert program, you may use the camera files (CCA) provided to generate a
camera configuration file (CCF) that describes the desired camera and frame grabber
configuration..

Teledyne DALSA continually updates a camera application library composed of application
information and prepared camera files. Camera files are ASCII text, readable with Windows
Notepad on any computer without having Sapera insta l led.

Overview of Sapera Acquisition Parameter Files (*.ccf or *.cca/*.cvi)

Concepts and Differences b etween the Parameter Files

There are two components to the legacy Sapera acquisition parameter file set: CCA files (also
called cam-files) and CVI files (also called VIC files, i.e. video input conditioning). The files store
video-signal parameters (CCA) and video conditioning parameters (CVI), which in t u rn simplifies
programming the frame-grabber acquisition hardware for the camera in use. Sapera LT 5.0
introduces a new camera configuration file (CCF) that combines the CCA and CVI files into one file.

Typically, a camera application will use a CCF file per camera operating mode (or one CCA file in
conjunction with several CVI files, where each CVI file defines a specific camera-operating mode).
An application can also ha ve multiple CCA/CCF files to support different image format modes
supported by the camera or sensor (such as image binning or variable ROI).

CCF File Details

A file using the “.CCF” extension, (Camera Configuration files), is the camera (CCA) and frame
grabber (CVI) parameters grouped into one file for easier configuration file management. This is
the default Camera Configuration file used with Sapera LT 5.0 and the CamExpert utility.

CCA File Details

Teledyne DALSA distributes camera files using the legacy “.CCA” extension, (CAMERA files), which
contain all parameters describing the camera video signal characteristics and operation modes
(what the camera outputs). The Sapera parameter groups within the file are:

• Video format and pixel definition

• Video resolution (pixel rate, pixels per line, lines per frame)

• Synchronization source and timing

• Channels/Taps configuration

• Supported camera modes and related parameters

• External signal assignment

CVI File Details

Legacy files using the “.CVI” extension contain a ll operating parameters related to the frame
grabber board - what the frame grabber can actually do with camera controls or incoming video.
The Sapera parameter groups within the file are:

• Activate and set any supported camera control mod e or control variable.

• Define the integration mode and duration.

• Define the strobe output control.

• Allocate the frame grabber transfer ROI, the host video buffer size and buffer type

(RGB888, RGB101010, MONO8, and MONO16).

• Configuration of line/frame trigger parameters such as source (internal via the frame

grabber /external via some outside event), electrical format (TTL, RS-422, OPTO-isolated),
and signal active edge or level characterization.

32 • CamExpert Quick Start Xtium-CL PX4 User's Manual

Saving a Camera F i l e

Use CamExpert to save a camera file (*.ccf ) usable with any Sapera demo program or user
application. An example would be a camera file, which sets up parameters for a free running
camera (i.e. internal trigger) w ith exposure settings for a good image with common lighting
conditions.

When CamExpert is setup as required, click on File•Save As to save the new .ccf file. The dialog
that opens allows adding details such as camera information, mode of operation, and a file name
for the .ccf file. The following image is a sample for a Teledyne DALSA Falcon camera. Note the
default folder where User camera files are saved.

Figure 12: Saving a New Camera File (.ccf)

Camera Interfacing Check List

Before interfacing a camera from scratch with CamExpert:

• Confirm that Teledyne DALSA has not already published an application note with camera

files [ www.teledynedalsa.com ].

• Confirm that the correct version or board revision of Xtium-CL PX4 is used. Confirm that the

required firmware is loaded into the Xtium-CL PX4.

• Confirm that Sapera does not already have a .cca file for your camera installed on your hard

disk. If there is a .cca file supplied with Sapera, then use CamExpert to generate the .ccf file
with default parameter values matching the f rame grabber capabilities.

• Check if the Sapera installation has a similar type of camera file. A similar .cca file can be

loaded into CamExpert and modified to match timing and operating parameters for your
camera, and lastly save them as Camera Configuration file (.ccf).

• Finally , if there is no file for your camera, run CamExpert after installing Sapera and the

acquisition board driver, select the board acquisition server, and manually enter the camera
parameters.

Xtium-CL PX4 User's Manual CamExpert Quick Start • 33

Sapera Demo Applications

Grab Demo Overview

Program Start•Programs•DALSA•Sapera LT•Demos•Frame Grabbers•Grab Demo
Program

file
Workspace …\...\Sapera\Demos\Classes\vc\SapDemos.dsw
.NET

Solution

Description This program demonstrates the basic acquisitio n functions included in the Sapera

Remarks Based on Sapera C++ classes. See the Sapera User’s and Reference manuals for

…\...\Sapera\Demos\Classes\vc\GrabDemo\Release\GrabDemo.exe

…\...\Sapera\Demos\Classes\vc\SapDemos_2003.sln
…\...\Sapera\Demos\Classes\vc\SapDemos_2005.sln
…\...\Sapera\Demos\Classes\vc\SapDemos_2008.sln
…\...\Sapera\Demos\Classes\vc\SapDemos_2010.sln

library. The program either allows you to acquire images, in continuous or in one­time mode, while adjusting the acquisition parame ters. The program code may be
extracted for use within your own application.

more information.

Table 5: Grab Demo Workspace Details

Using the Gra b Dem o

Server Selectio n

Run the grab demo from the start menu:
Start•Programs•Sapera LT•Demos•Frame Grabbers•Grab Demo.

The demo program first displays t he acquisition configuration menu. The first drop menu displayed
permits selecting from any installed Sapera acquisition servers (installed Teledyne DALSA
acquisition hardware using Sapera drivers). The second drop menu permits selecting from the
available input devices present on the select ed server.

Figure 13: Grab Demo – Server Selection

Xtium-CL PX4 User's Manual Sapera Demo Applications • 34

CCF File Selec tion

Use the acquisition configuration menu to select the required camera configuration file for the
connected camera. Sapera camera files contain timing parameters and video conditioning
parameters. The default folder for camera configuration files is the same used by the CamExpert
utility to save user generated or modified camera files.

Use the Sapera CamExpert utility program to generate the camera configuration file based on
timing and control parameters entered. The CamExpert live acquisition window allows immediate
verification of those parameters. CamExpert reads both Sapera *.cca and *.cvi for backward
compatibility with the original Sapera camera files.

Grab Demo Main Window

The Grab Demo program provides basic acquisition control for the selected frame grabber. The
loaded camera file (.ccf) defines the Frame buffer defaults.

Figure 14: Grab Demo Main Window

Refer to the Sapera LT User's Manual (OC-SAPM-USER), in section "Demos and Examples –
Acquiring with Grab Demo", for more informatio n on the Grab Demo and others provided with
Sapera LT.

Xtium-CL PX4 User's Manual Sapera Demo Applications • 35

Xtium-CL PX4 Reference

Host PCI Express X4 (or greater) Slot

DTE

Data-Transfer-Engine

with OLUT

PCI Express Gen2 X4 Controller

Data

Xtium-CL PX4

Simplified Block Diagram

Data

Control

Data

ACU-Plus

SDR26 #1

Data

SerDes

Receiver

CC1
CC2
CC3
CC4

TX
RX

CLK

4

FVAL
LVAL
DVAL
SPARE

2

Data &

Grab

Controls

LVDS

Drivers and

Receiver

UART #1

Time Base

SDR26 #2

CLK

4

Twisted Pairs

Data

SerDes

Receiver

CLK

FVAL
LVAL
DVAL
SPARE

Twisted Pairs

2

Data &

Grab

Controls

CLK

4

Data

SerDes

Receiver

CLK

FVAL
LVAL
DVAL
SPARE

Twisted Pairs

2

Data &

Grab

Controls

CLK

4

RX

TX

Control

Dual Shaft Encoder

I/O Controller

12V

500 mA/reset

Power Out

Power Gnd

Indicators

LEDs

Camera On/Grab On

Acquisition Status Indicator 1

Acquisition Status Indicator 2

Camera On/Grab On

Frame Buffer and

DMA table Memory

(512 MB)

Opto-coupled

Quad Trigger /

General Inputs

TTL

Quad Strobe /

General Outputs

J1 - DH60-27P

RS-422

D1

Board Status

24

24

24

Block Diagram

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 36

Figure 15: Xtium-CL PX4 Model Block Diagram

Camera Link

Front-End

Image
Buffer

Color

Conversion

(Bayer or Bi-

Color)

FFC/FLC

Cropper

Host

Computer

ACU-Plus

DTE

Horizontal Flip

Look Up Table

White-Balance

Dain (RDB

Pixels)

Xtium-CL Flow Diagram

The following diagram represents the sequence in which the camera data acquired is processed
through the Xtium-CL.

 Camera Link Front End: Extracts the clock, LVAL, FVAL and data from the Camera Link ports

based on the Camera Link configuration selec ted.

 Memory: Stores the video data using the concept of video frames.
 Color Conversion: When enabled for particular cameras, converts Bayer and Bi-Color video

 White Balance Gain: Applies White Balance Gain to RGB data.
 Lookup Tables: Applies lookup table transformation to the data going to the host memory.
 Horizontal Flip: If present, performs the line data flip process.
 Cropper: Crops the resulting image when used, using a 4-byte resolution.
 Host DMA: Transfers the data from frame grabber into the host buffer memory. This module

data into RGB data.

will also perform the vert ical flip if enabled.

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 37

PCLK

2

LVAL

3

FVAL
(Vsync)

Pixel Clock Range: 20 MHz up to 85 MHz

Min/Max

9

HB

5

Min/Max

4,9

VB

6

LVAL/FVAL setup time1: Minimum 15ns

DATA

first

7

last

8

(Hsync)






3









"Horizontal Ba c k invalid = x" where ‘x’







Acquisition Timing

Figure 16: Acquisition Timing

1 The setup times for LVAL a nd FVAL are the same. Both mus t be h igh and stable before the rising

edge of the Pixel Clock.

2 Pixel Clock must always be present

LVAL must be active high to acquire camera data

4 Minimum of 1
5 HB - Horizontal Bla nking:

Minimum: 1 clock cycle
Maximum: no limits

7 First Active Pixel (unless otherwise specified in the CC A file –

defines the number of pixels to be skipped).

8 Last Active Pixel – defined in the CCA file under “Horizontal active = y" – where ‘y’ is the total

number of active pixels per ta p.

9 Maximum Valid Data:

 8-bits/pix e l x 64k Pixels/line (LVAL)
 16-bits/pixel x 32k Pixels /line (LVAL)
 32-bits/pixel x 16k Pixels /line (LVAL)
 16 Million lines (FVAL)

6 VB - Vertical Blanking:

Minimum: 1 line
Maximum: no limits

Table 6: Acquisition Timing Specifications

38 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

Line Trigger Source Selection for Line scan Applications

Line scan imaging applications require some form of external event trigger to synchronize line scan
camera exposures to the moving object. This synchronization signal is either an external trigger
source (one exposure per trigger event) or a shaft encoder source composed of a single or dual
phase signal (also known as a quadrature).

The Xtium-CL PX4 shaft encoder inputs provide additional functionality with pulse drop, pulse
multiply, and pulse direction support.

The following table describes the line-trigger source types supported by the Xtium-CL PX4. Refer to
the Sapera Acquisition Parameters Reference Manual (OC-SAPM-APR00) for descriptions of the
Sapera parameters.

Parameter Values Specific to the Xtium-CL PX4

PRM Value Input used as:

External Line Trigger

if

CORACQ_PRM_EXT_LINE_
TRIGGER_ENABLE = true

0 From Shaft Encoder Phase A (default) From Shaft Encoder Phase A & B (default)

1 From Shaft Encoder Phase A From Shaft Encoder Phase A

2 From Shaft Encoder Phase B From Shaft Encoder Phase B

3 n/a From Shaft Encoder Phase A & B

4 From Board Sync #1 n/a
5 From Board Sync #2 n/a

Table 7: CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE – Parameter Values

Input used as:
External Shaft Encoder

if
CORACQ_PRM_SHAFT_
ENCODER_ENABLE =true

CVI/CCF File Param eters Used

• External Line Trigger Source = prm value

• External Line Trigger Enable = true/false

• Shaft Encoder Enable = true/false

Shaft Encoder Interface Timing

Dual Balanced Shaft E ncoder RS-422 Inputs:

• Input Phase A: Connector J1: Pin 3 (Phase A +) & Pin 2 (Phase A -)

• Input Phase B: Connector J1: Pin 6 (Phase B+) & Pin 5 (Phase B-)

• See "J1: External Signals Connector (Female DH60-27P)" on page 69 for complete

connector signal details)

Web inspection systems with variable web speeds typically provide one or two synchronization
signals from a web mounted encoder to coord inate trigger signals. These trigger signals are used

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 39

K

D

D

K

D

D

K

D

D

K

D

D

K

D

D

Shaft Encoder phase A

Shaft Encoder phase B

K = Keep
D = Drop or Skip

Note: in this example, Number of trigger to drop = 2

Line acquired

Shaft Encoder phase A

Shaft Encoder phase B

by the acquisition linescan camera. The Xtium-CL PX4 supports single or dual phase shaf t encoder
signals. Dual encoder signals are ty pically 90 d egrees out of phase relative to each other and
provide greater web motion resolution.

Example using any Encoder Input with Pulse-drop Counter

When enabled, the triggered camera acquires one scan line for each shaft encoder pulse-edge. To
optimize the web application, a second Sapera parameter defines the number of triggers to skip
between valid acquisition triggers. The figure below depicts a system where a valid camera trigger
is any pulse edge from either shaft encoder signal. After a trigger, the two following triggers are
ignored (as defined by the Sapera pulse drop parameter).

Figure 17: Encoder Input with Pulse-drop Counter

Example using Sequential Encoder Input

Support of a dual phase encoder should consider the direction of motion of one phase signal to the
other. Such a case might exist where system vibrations and/or conveyor backlash can cause the
encoder to briefly travel backwards. The acquisition device must in those cases count the reverse
steps and subtract the forward steps such that only pulses after the reverse count reaches zero are
considered. By using the event “Shaft Encoder Reverse Counter Overflow”, an application can
monitor an overflow of this counter.

The example figure below shows shaft e ncoder signals with high jitter. If the acquisition is
triggered when phase B follows phase A, with jitter present phase B may precede phase A. Use of
the Shaft Encoder Direction parameter will prevent false trigger conditions.

Figure 18: Using Shaft Encoder Direction Parameter

Note: Modify camera file parameters easily with the Sapera CamE x per t program.

40 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

CVI/CCF File Param eters Used

Shaft Encoder Enable = X, where:

• If X = 1, Shaft Encoder is enabled

• If X = 0, Shaft Encoder is disabled

Shaft Encoder Pulse Drop = X, where:

• X = number of trigger pulses ignored between valid triggers

Shaft Encoder Pulse Multiply = X, where:

• X = number of trigger pulses generated for each shaft encoder pulses

Shaft Encoder Pulse Drop/Multiply Order = X, where:

• If X = 1, the drop operation will be done first, followed b y the multiplier operation

• If X = 0 or 2, the multiplier operation will be done first, followed by the drop operation

Shaft Encoder Direction = X, where:

• X = 0, Ignore direction

• X = 1, Forward steps are detected by pulse order A/B (forward motion)

• X = 2, Forward steps are detected by pulse order B/A (reverse motion)

Note: For information on cam e r a configuration f iles, see the Sapera Acquisition Parameters
Reference Manual (OC-SAPM-APR00).

Virtual Frame Trigger for Line Scan Cameras

When using line scan cameras, a frame buffer is allocated in host system memory to store
captured video lines. To control when a video line is stored as the first line in this “virtual” frame
buffer, an external frame trigger signal is used. For fixed length frames, the Sapera vertical
cropping parameter controls the number of lines sequentially grabbed and stored in the virtual
frame buffer. For variable length frames, the External Frame Trigger (when a level or dual input
type is selected) controls the number of lines s equentially grabbed up to the maximum of lines in
the virtual frame buffer.

Virtual Frame Trigger Timing Diag ram

The following timing diag ram shows an example of gra bbing 10 video lines from a line scan camera
and the use of a virtual frame trigger to define when a video line is stored at the beginning of the
virtual frame buffer. The virtual frame trigger signal (generated by some external event) connects
to the Xtium-CL PX4 trigger input.

 Virtual frame trigger can be RS-422, TTL, 12V, or 24V industry standard, and be rising or fa llin g

edge active, active high or low, or double pulse rising or falling edge.

 In this example, virtual frame trigger control is configured for rising edge trigger.
 Virtual frame trigger connects to the Xtium-CL PX4 via the External Trigger Input 1 & 2 inputs.

• Trigger Input #1 on connector J1: pin 8

• Trigger Input #2 on connector J1: pin 9

 Camera control signals are active at all times. These continually trigger the camera acquisition

in order to avoid corrupted video lines at the beginning of a virtual frame .

 The camera control signals are either timing controls on Xtium-CL PX4 shaft encoder inputs, or

line triggers generated internally by the Xtium-CL PX4.

 The Sapera vertical cropping parameter specifies the number of lines captured.

Synchronization Signals for a 10 Line Virtual Frame

The following timing diag ram shows the relationship between External Frame Trigger input,
External Shaft Encoder input (one phase used with the second terminated), and camera control
output to the camera.

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 41

LVAL

Notes:

• In this example -- 10 lines are acquired

• The Maximum frame rate = Max. Line Rate / nb lines (Hz)

• In / Out signal reference is relative to frame grabber

Video Line

Camera

Control

Shaft Encoder

Virtual Frame

Trigger

In

In

In

In

Out

10 Lines
Acquired

n Lines
Ignored

Figure 19: Synchronization Signals for a 10 Line Virtual Frame

CVI File (VIC) Parameters Used

The VIC parameters listed below provide the control functionality for virtual frame reset. Sapera
applications load pre-configured CVI files or change VIC parameters during runtime.

External Frame Trigger Enable = X, where: (with Virtual Frame Trigger enabled)

External Frame Trigger Detection = Y, where:

If Y= 1, External Frame Trigger is active low

External Frame Trigger Level = Z, where: (with Virtual Frame Trigger signal type)

Note: Sapera camera file parameters are easily modified by using the CamExpert program.

• If X = 1, External Frame Trigger is enabled

• If X = 0, External Frame Trigger is disabled

• If Y = 2, External Frame Trigger is active high

• If Y = 4, External Frame Trigger is active on rising edge

• If Y = 8, External Frame Trigger is active on falling edge

• If Y = 32, External Frame Trigger is dual-input rising edge

• If Y = 64, External Frame Trigger is dual-input falling edge

Note:. For dual-input triggers, Trigger Input #1 signals th e start of the frame trigger, Trigger
Input #2 signals the end of the frame trigger.

• If Z = 1, External Frame Trigger is a TTL signal

• If Z = 2, External Frame Trigger is an RS-422 signal

• If Z = 8, External Frame Trigger is a 24V signal

• If Z = 64, External Frame Trigger is a 12V signal

Note: For information on cam e r a configuration f iles, see the Sapera Acquisition Parameters
Reference Manual (OC-SAPM-APR00).

42 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

Sapera Acquisition Methods

Sapera acquisition methods define the control and timing of the camera and frame grabber board.
Various methods are available, grouped as:

• Camera Trigger Methods (method 1 supported)

• Line Trigger Methods (method 1)

• Line Integration Methods (method 1 through 4 supported)

• Time Integration Methods (method 1, 3, 5, 6, 8)

• Strobe Methods (method 1, 3, 4 supported)

Refer to the Sapera LT Acquisition Parameters Reference manual (OC-SAPM-APR00) for detailed
information concerning camera and acquisition control methods.

Trigger to Image Reliability

Trigger-to-image reliability incorporates all stages of image acquisition ins ide an integr ated
controller to increase reliability and simplify error recovery. The trigger-to-image reliability model
brings together all the requirements for image acquisition to a central management unit. These
include signals to control camera timing, on-board frame buffer memory to compensate for PCI bus
latency, and comprehensive error notification. If the Xtium-CL PX4 detects a problem, the
application can take appropriate action to return to normal operation.

The Xtium-CL PX4 is designed with a robust ACU (Acquisition and Control Unit). The ACU monitors
in real-time, the acquisition state of the input plus the DTE (Data Transfer E ngine) which transfers
image data from on-board memory into PC memory. In general, thes e m a n ag em en t pro c e ss es a re
transparent to end-user applications. With the Xtium-CL PX4, applications ensure trigger-to-image
reliability by monitoring events and controlling transfer methods as described below:

Supported Events and Transfer Methods

Listed below are the supported acquisition and transfer events. Event monitoring is a m ajor
component to the Trigger-to-Image Reliability framework.

Acquisition Events

Acquisition eve nt s pertain to the acquisition module. They provide feedback on the image capture
phase.

• External Trigger (Used/Ignored)

Generated when the external trigger pin is asserted, which indicates the start of the
acquisition process. There are two types of external trigger events: ‘Used’ or ‘Ignored’.
Following an external trigger, if the event generates a captured image, an External Trigger
Used event will be generated (CORACQ_VAL_EVENT_TYPE _EX TERNAL_TRIGGER).
If there is no captured image, an External Trigger Ignored event will be generated
(CORACQ_VAL_EVENT_TYPE_EXTERNAL_TRIGGER_IGNORED ). An external trigger event is
ignored if the event rate is higher than the possible frame rate of the camera.

• Start of Frame

Event generated during acquisition, with the detection of the start of a video frame by the
board acquisition hardware. The Sapera event value is
CORACQ_VAL_EVENT_TYPE_START_OF_FRAME.

• End of Frame

Event generated during acquisition, with the detection of the end of a video frame by the
board acquisition hardware. The Sapera event value is
CORACQ_VAL_EVENT_TYPE_END_OF_FRAME.

• Data Overflow

The Data Overfl ow event indicates that there is not enough bandwidth for the acquired data
transfer without loss. Data Overflow would occur with limitations of the acquisition module

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 43

and should never occur.
The Sapera event value is CORACQ_VAL_EVENT_TYPE_DATA_OVERFLOW.

• Frame Valid

Event generated on detection of the start of a video frame by the board acquisition
hardware. Acquisition does not need to be active; therefore, this event can verify a valid
signal is connec te d . The Sapera event value is
CORACQ_VAL_EVENT_TYPE_VERTICAL_SYNC.

• Pixel Clock (Present/Absent)

Event generated on the transition fro m de tecting or not detecting a pixel clock signal. The
Sapera event values are CORACQ_VAL_EVENT_TYPE_NO_PIXEL_CLK and
CORACQ_VAL_EVENT_TYPE_PIXEL_CLK.

• Frame Lost

The Frame Lost event indicates that an acquired image failed to transfer to on-board
memory. An example is if there are no free on-board buffers available for the new image.
This may be the case if the image transfer from onboard buffers to host PC memory is not
sustainable due to bus bandwidth issues or no host buffers are available to receive an
image.
The Sapera event value is CORACQ_VAL_EVENT_TYPE_FRAME_LOST.

• External Line Trigger Too Slow

Event which indicates that the detected shaft encoder input tick rate is too slow for the
device to take into account the specified shaft enc oder multiplier value. The Sapera event
value is CORACQ_VAL_EVENT_TYPE_EXT_LINE_TRIGGER_TOO_SLOW.

• Shaft Encoder Reverse Count Overflow

Event which indicates that the shaft encoder has travelled in the opposite direction expected
and that the number of pulses encountered d uring that travel has exceeded the acquisition
device counter. The acquisition device will thus not be able to skip the appropriate number
of pulses when the expected direction is dete cted. The Sapera event value is
CORACQ_VAL_EVENT_TYPE_SHAFT_ENCODER_REVERSE_COUNT_OVERFLOW

Transfer Events

Transfer events are the ones related to the transfer module. Transfer events provide feedback on
image transfer from onboard memory frame buffers to PC memory frame buffers.

• Start of Frame

Start of Frame event generated when the first image pixel is transferred from on-board
memory into PC memory.
The Sapera event value is CORXFER_VAL_EVENT_TYPE_START_OF_FRAME.

• End of Frame

End of Frame event generated when the last image pixel is transferred from on-board
memory into PC memory.
The Sapera event value is CORXFER_VAL_EVENT_TYPE_END_OF_FRAME.

• End of Transfer

End of Transfer event generated at the completion of the last image transfer from on-board
memory into PC memory. Issue a stop command to the transfer module to complete a
transfer (if transfers are already in progress). If a frame transfer of a fixed number of
images is requested, the transfer module will stop transfer automatically. The Sapera event
value is CORXFER_VAL_EVENT_TYPE_END_OF_TRANSFER.

44 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

Trigger Signal Validity

The ACU ignores external trigger signal noise with its programmable debounce control. Program
the debounce parameter for the minimum pulse duration considered as a valid external trigger
pulse. For more information see Note 1: General Inputs / External Trigger Inputs Specifications.

Supported Transfer Cycling Methods

The Xtium-CL PX4 supports the following transfer modes, which are either synchronous or
asynchronous. Note that the Xtium doe s not make any use of the trash buffer. Images are
accumulated in on-board memory in a FIFO type manner. When no memory is available for a new
image to be stored, the image is discarded and the CORACQ_VAL_EVENT_TYPE_FRAME_LOST is
generated. On-board memory can get filled up if the rate at which the images are acquired is
greater than the rate at which the DMA engine can write them to host buffer memory. On-board
memory can also get filled-up if there are no more empty buffers available to transfer the on-board
images.

When stopping the image acquisition, the event CORXFER_VAL_EVENT_TYPE_END_OF_TRANSFER
will occur once all im ages currently in the on-board memory are transferred to host buffer memory.
Note that if the application does not provide enough empty buffers, the Xtium event will not occur
and an acquisition abort will be required.

• CORXFER_VAL_CYCLE_MODE_SYNCHRONOUS_WITH_TRASH

Before cycling to the next buffer in the list, the transfer device will check the next buffer's
state. If its state is full, the transfer will keep the image in on-board memory until the next
buffer’s state changes to empty. If the on-board memory gets filled, frame lost events will
be generated.

• CORXFER_VAL_CYCLE_MODE_SYNCHRONOUS_NEXT_EMPTY_WITH_TRASH

When starting an acquisition, the buffer list is put in an empty buffer queue list in the exact
order they were added to the transfer. Whenever a user sets a buffer to empty, it is added
to the empty buffer queue list, so that after cycling once through the original buffe r l ist , the
buffers acquired into will follow the order in which they are put empty by the user. So in this
mode, the on-board images will be transferred to host buffer memory as long as there are
buffers in the empty buffer queue list. If the on-board memory gets filled, the frame lost
event will start occurring.

• CORXFER_VAL_CYCLE_MODE_ASYNCHRONOUS

The transfer device cycles through all buffers in the list without concern about the buffer
state.

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 45

Output LUT Availability

The following table defines the supported output LUT (look up tables) for the Xtium-CL PX4. Note
that unsupported modes are not listed.

Number of Digital

Bits

Output Pixel

Format

LUT Format Notes*

8

8
10 MONO 8 10-in, 8-out
10 MONO 16 10-in, 16-out 10 bits in 10 LSBs of 16-bit
12 MONO 8 12-in, 8-out 8 MSB
12 MONO 16 12-in, 16-out 12 bits in 12 LSBs of 16-bit

8 x 3 (RGB) RGB888 8-in, 8-out
8 x 3 (RGB) RGB8888 8-in, 8-out

10 x 3 (RGB) RGB888

12 x 3 (RGB) RGB888

MONO 8

MONO 16

RGB8888

RGB101010

RGB16161616

RGB8888

RGB101010

RGB16161616

8-in, 8-out

8-in, 16-out

10-in, 8-out

10-in, 8-out
10-in, 10-out
10-in, 16-out

12-in, 8-out

12-in, 8-out
12-in, 10-out
12-in, 16-out

8 bits in 8 LSBs of 16-bit

10 bits in 10 LSBs of 16-bit

12 bits in 12 LSBs of 16-bit

*When no LUTs are available or LUTs are disabled, the data is packed in the LSBs of the target
destination.

Table 8: Output LUT Availability

Xtium-CL PX4 Supported Parameters

The tables below describe the Sapera capabilities supported by the Xtium-CL PX4. Unless specified,
each capability applies to all configuration modes and all acquisition modes.

The information here is subject to change. The applica tion needs to verify capabilities. New board
driver releases may change product specifications.

Sapera describes the Xtium-CL PX4 family as:

• Board Server: Xtium-CL_PX4_1

• Acquisition Module: dependent on firmware used

Camera Related Capabilities

Capability Values

CORACQ_CAP_CONNECTOR_TYPE CORACQ_VAL_CONNECTOR_TYPE_CAMLINK (0x2)
CORACQ_CAP_CONNECTOR_CAMLINK

(Pin – 01, Pin – 02, Pin – 03, Pin - 04)

Table 9: Camera Related Capabilities

CORACQ_VAL_SIGNAL_NAME_NO_CONNECT (0x1)
CORACQ_VAL_SIGNAL_NAME_PULSE0 (0x8)
CORACQ_VAL_SIGNAL_NAME_PULSE1 (0x10)
CORACQ_VAL_SIGNAL_NAME_GND (0x4000)

46 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

Camera Related Parameters

Parameter Values

CORACQ_PRM_CHANNEL CORACQ_VAL_CHANNEL_SINGLE (0x1)
CORACQ_PRM_FRAME CORACQ_VAL_FRAME_PROGRESSIVE (0x2)
CORACQ_PRM_INTERFACE CORACQ_VAL_INTERFACE_DIGITAL (0x2)
CORACQ_PRM_SCAN CORACQ_VAL_SCAN_AREA (0x1)

CORACQ_PRM_SIGNAL CORACQ_VAL_SIGNAL_DIFFE RE N T IA L (0 x2)
CORACQ_PRM_VIDEO Full Mono

10T8B Mono / 8T10B Mono

Medium Color RGB

Full Packed RGB

80B Packed RGB

Full Bayer
10T8B Bayer
8T10B Bayer

80B Packed Bi-Color

CORACQ_PRM_PIXEL_DEPTH Full mono

10T8B Mono

8T10B Mono

Color RGB

Full Bayer

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

10T8B Bayer
8T10B Bayer

CORACQ_PRM_VIDEO_STD CORACQ_VAL_VIDEO_STD_NON_STD (0x1)
CORACQ_PRM_FIELD_ORDER CORACQ_VAL_FIELD_ORDER_NEXT_FIEL D (0x4)
CORACQ_PRM_HACTIVE Full Mono

Full Bayer

10T8B Mono

10T8B Bayer

8T10B Mono

8T10B Bayer

Medium Color RGB

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

CORACQ_PRM_HSYNC min = 1 pixel

CORACQ_PRM_VACTIVE min = 1 line

CORACQ_PRM_VSYNC min = 0 lin e

CORACQ_VAL_SCAN_LINE (0x2)

CORACQ_VAL_VIDEO_MONO (0x1)
CORACQ_VAL_VIDEO_BAYER (0x10)

CORACQ_VAL_VIDEO_RGB (0x8)

CORACQ_VAL_VIDEO_BAYER (0x10)

CORACQ_VAL_VIDEO_BICOLOR (0x20)
8 bits, # LUT = 1, LUT format = CORDATA_FORMAT_MONO8

8 bits, # LUT = 1, LUT format = CORDATA_FORMAT_MONO16
10 bits, # LUT = 1, LUT format = CORDATA_FORMAT_MONO8
10 bits, # LUT = 1, LUT format = CORDATA_FORMAT_MONO16
12 bits, # LUT = 1, LUT format = CORDATA_FORMAT_MONO8
12 bits, # LUT = 1, LUT format = CORDATA_FORMAT_MONO16
14 bits, # LUT = 0, LUT format = CORDATA_FORMAT_MONO16
16 bits, # LUT = 0, LUT format = CORDATA_FORMAT_MONO16

8 bits, # LUT = 1, LUT format = CORDATA_FORMAT_MONO8
8 bits, # LUT = 1, LUT format = CORDATA_FORMAT_MONO16

10 bits, # LUT = 1, LUT format = CORDATA_FORMATMONO8
10 bits, # LUT = 1, LUT format = CORDATA_FORMATMONO16

8 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI8
10 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI8
10 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI10
10 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI16
12 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI8
12 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI10
12 bits, # LUT = 1, LUT format = CO R D A T A_FORMAT_COLORNI16

8 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI8

10 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI8
10 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI10
10 bits, # LUT = 1, LUT format = CORDATA_FORMAT_COLORNI16

min = 4 pixel, max = 65536 pixel, step = 1 pixel

min = 4 pixel, max = 6553 pixel, step = 1 pixel

min = 4 pixel, max = 4096 pixel, step = 1 pixel

min = 4 pixel, max = 16384 pixel, step = 1 pixel

min = 4 pixel, max = 21845 pixel, step = 1 pixel
min = 4 pi x el, max = 32768 pixel, step = 1 pixel

max = 4294967295 pixel
step = 1 pixel

max = 16777215 line
step = 1 line

max = 4294967295 line
step = 1 line

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 47

CORACQ_PRM_HFRONT_INVALID min = 0 pixel

CORACQ_PRM_HBACK_INVALID min = 0 pixel

CORACQ_PRM_VFRONT_INVALID min = 0 l ine

CORACQ_PRM_VBACK_INVALID min = 0 line

CORACQ_PRM_PIXEL_CLK_SRC CORACQ_VAL_PIXEL_CLK_SRC_EXT (0x2)
CORACQ_PRM_PIXEL_CLK_EXT min = 20000000 Hz

CORACQ_PRM_SYNC CORACQ_VAL_SYNC_SEP_SYNC (0x4)
CORACQ_PRM_HSYNC_POLARITY CORACQ_VAL_ACTIVE_LOW (0x1)
CORACQ_PRM_VSYNC_POLARITY CORACQ_VAL_ACTIVE_LOW (0x1)
CORACQ_PRM_TIME_INTEGRATE_METHOD CORACQ_VAL_TIME_INTEGRATE_METHOD_1 (0x1)

CORACQ_PRM_CAM_TRIGGER_METHOD CORACQ_VAL_CAM_TRIGGER_METHOD_1 (0x1)
CORACQ_PRM_CAM_TRIGGER_POLARITY CORACQ_VAL_ACTIVE_LOW (0x1)

CORACQ_PRM_CAM_TRIGGER_DURATION min = 1 µs

CORACQ_PRM_CAM_NAME Full Mono

10T8B Mono
8T10B Mono

Color RGB

Full Bayer

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

10T8B Bayer
8T10B Bayer

CORACQ_PRM_LINE_INTEGRATE_METHOD CORACQ_VAL_LINE_INTEGRATE_METHOD_1 (0x1)

CORACQ_PRM_LINE_TRIGGER_METHOD CORACQ_VAL_LINE_TRIGGER_METHOD_1 (0x1)
CORACQ_PRM_LINE_TRIGGER_POLARITY CORACQ_VAL_ACTIVE_LOW (0x1)

CORACQ_PRM_LINE_TRIGGER_DELAY min = 0 pixel

CORACQ_PRM_LINE_TRIGGER_DURATION min = 0 pixel

CORACQ_PRM_TAPS Full Mono

Full Bayer

10T8B Mono

10T8B Bayer

8T10B Mono

8T10B Bayer

Medium Color RGB

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

max = 65535 pixel
step = 1 pixel

max = 65535 pixel
step = 1 pixel

max = 16777215 line
step = 1 line

max = 16777215 line
step = 1 line

max = 85000000 Hz
step = 1 Hz

CORACQ_VAL_TIME_INTEGRATE_METHOD_3 (0x4)
CORACQ_VAL_TIME_INTEGRATE_METHOD_5 (0x10)
CORACQ_VAL_TIME_INTEGRATE_METHOD_6 (0x20)
CORACQ_VAL_TIME_INTEGRATE_METHOD_8 (0x80)

CORACQ_VAL_ACTIVE_HIGH (0x2)

max = 85899345 µs
step = 1 µs

Default Area Scan 1 tap Mono
Default Area Scan 10 taps Parallel Mono
Default Area Scan 8 taps Parallel Mono
Default Area Scan 1 tap Color
Default Bayer Area Scan 1 tap Color
Default Area Scan Full Packed RGB
Default Area Scan 80-bit Pack ed RGB
Default Area Scan 80-bit Packed Bi-Color
Default Bayer Area Scan 10 taps Parallel Color
Default Bayer Area Scan 8 taps Parallel Color

CORACQ_VAL_LINE_INTEGRATE_METHOD_3 (0x4)
CORACQ_VAL_LINE_INTEGRATE_METHOD_4 (0x8)

CORACQ_VAL_ACTIVE_HIGH (0x2)

max = 85899345 pixel
step = 1 pixel

max = 85899345 pixel
step = 1 pixel

min = 1 tap, max = 8 taps, step = 1 tap

min = 10 taps, max = 10 taps, step = 1 tap

min = 8 taps, max = 8 taps, step = 1 tap

min = 1 tap, max = 2 taps, step = 1 tap
min = 1 tap, max = 1 tap, step = 1 tap

48 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

CORACQ_PRM_TAP_OUTPUT Full Mono

Full Bayer

Full Packed RGB

10T8B Mono
8T10B Mono

80B Packed RGB

80B Packed Bi-Color

10T8B Bayer
8T10B Bayer

Medium Color RGB

CORACQ_PRM_TAP_1_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR (0x1)

CORACQ_PRM_TAP_2_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR (0x1)

CORACQ_PRM_TAP_3_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR (0x1)

CORACQ_PRM_TAP_4_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR (0x1)

CORACQ_PRM_TAP_5_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR (0x1)

CORACQ_PRM_TAP_6_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR (0x1)

CORACQ_PRM_TAP_7_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR (0x1)

CORACQ_PRM_TAP_8_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR (0x1)

CORACQ_PRM_PIXEL_CLK_DETECTION CORACQ_VAL_RISING_EDGE (0x4)
CORACQ_PRM_CHANNELS_ORDER CORACQ_VAL_CHANNELS_ORDER_NORMAL (0x1)
CORACQ_PRM_CAM_LINE_TRIGGER_FREQ_MIN 1 Hz
CORACQ_PRM_CAM_LINE_TRIGGER_FREQ_MAX 16777215 Hz
CORACQ_PRM_CAM_TIME_INTEGRATE_DURATION_MIN 1 µs
CORACQ_PRM_CAM_TIME_INTEGRATE_DURATION_MAX 85899345 µs
CORACQ_PRM_TIME_INTEGRATE_PULSE1_POLARITY CORACQ_VAL _ ACTI VE_ LOW (0x1)

CORACQ_PRM_TIME_INTEGRATE_PULSE1_DELAY min = 0 µs

CORACQ_PRM_TIME_INTEGRATE_PULSE1_DURATION min = 1 µs

CORACQ_PRM_CAM_IO_CONTROL (*)
CORACQ_PRM_TIME_INTEGRATE_PULSE0_POLARITY CORACQ_VAL _ ACTI VE_ LOW (0x1)

CORACQ_PRM_TIME_INTEGRATE_PULSE0_DELAY min = 0 µs

CORACQ_PRM_TIME_INTEGRATE_PULSE0_DURATION min = 1 µs

CORACQ_PRM_LINE_INTEGRATE_PULSE1_POLARITY CORACQ_VAL_ACTIVE_LOW (0x1)

CORACQ_PRM_LINE_INTEGRATE_PULSE1_DELAY min = 0 pixel

CORACQ_PRM_LINE_INTEGRATE_PULSE1_DURATION min = 1 pixel

CORACQ_VAL_TAP_OUTPUT_ALTERNATE (0x1)
CORACQ_VAL_TAP_OUTPUT_SEGMENTED (0x2)
CORACQ_VAL_TAP_OUTPUT_PARALLEL (0x4)

CORACQ_VAL_TAP_OUTPUT_PARALLEL (0x4)

CORACQ_VAL_TAP_OUTPUT_ALTERNATE (0x1)
CORACQ_VAL_TAP_OUTPUT_SEGMENTED (0x2)

CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_ACTIVE_HIGH (0x2)

max = 85899345 µs
step = 1 µs

max = 85899345 µs
step = 1 µs

CORACQ_VAL_ACTIVE_HIGH (0x2)

max = 85899345 µs
step = 1 µs

max = 85899345 µs
step = 1 µs

CORACQ_VAL_ACTIVE_HIGH (0x2)

max = 85899345 pixel
step = 1 pixel

max = 85899345 pixel
step = 1 pixel

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 49

CORACQ_PRM_LINE_INTEGRATE_PULSE0_POLARITY CORACQ_VAL_ACTIVE_LOW (0x1)

CORACQ_PRM_LINE_INTEGRATE_PULSE0_DELAY min = 0 pixel

CORACQ_PRM_LINE_INTEGRATE_PULSE0_DURATION min = 1 pixel

CORACQ_PRM_CAMLINK_CONFIGURATION Full Mono

Full Bayer

10T8B Mono

10T8B Bayer

8T10B Mono

8T10B Bayer

Medium Color

Full Packed RGB

80B Packed Color

80B Packed Bi-

CORACQ_PRM_DATA_VALID_ENABLE Full Mono

Medium Color RGB

Full Packed RGB

10T8B Mono
8T10B Mono

80B Packed RGB

80B Packed Bi-Color

10T8B Bayer
8T10B Bayer

CORACQ_PRM_DATA_VALID_POLARITY CORACQ_VAL_ACTIVE_HIGH (0x2)
CORACQ_PRM_TAP_9_DIRECTION 10T8B Mono

10T8B Bayer

CORACQ_PRM_TAP_10_DIRECTION 10T8B Mono

10T8B Bayer

CORACQ_PRM_TIMESLOT CORACQ_VAL_TIMESLOT_1 (0x1)
CORACQ_PRM_COLOR_ALIGNMENT Full Bayer

10T8B Bayer
8T10B Bayer

CORACQ_PRM_CAM_CONTROL_DURING_READOUT TRUE

CORACQ_VAL_ACTIVE_HIGH (0x2)

max = 85899345 pixel
step = 1 pixel

max = 85899345 pixel
step = 1 pixel

CORACQ_VAL_CAMLINK_CONFIGURATION_BASE (0x1)
CORACQ_VAL_CAMLINK_CONFIGURATION_MEDIUM (0x2)
CORACQ_VAL_CAMLINK_CONFIGURATION_FULL (0x4)

CORACQ_VAL_CAMLINK_CONFIGURATION_10TAPS_FORMAT2 (0x40)

CORACQ_VAL_CAMLINK_CONFIGURATION_8TAPS_10BITS (0x80)

CORACQ_VAL_CAMLINK_CONFIGURATION_BASE (0x1)
CORACQ_VAL_CAMLINK_CONFIGURATION_MEDIUM (0x2)

RGB

CORACQ_VAL_CAMLINK_CONFIGURATION_FULL_PACKED (0x100)
CORACQ_VAL_CAMLINK_CONFIGURATION_FLAG_BGR (0x80000000)

CORACQ_VAL_CAMLINK_CONFIGURATION_80BITS_PACKED (0x200)
CORACQ_VAL_CAMLINK_CONFIGURATION_FLAG _BGR (0x80 00 0000)

CORACQ_VAL_CAMLINK_CONFIGURATION_80BITS_PACKED (0x200)

Color

TRUE
FALSE

Not available

CORACQ_VAL_TAP_DIRECTION_LR (0x1)
CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_TAP_DIRECTION_LR (0x1)
CORACQ_VAL_TAP_DIRECTION_UD (0x4)
CORACQ_VAL_TAP_DIRECTION_FROM_TOP (0x10)

CORACQ_VAL_COLOR_ALIGNMENT_GB_RG (0x1)
CORACQ_VAL_COLOR_ALIGNMENT_BG_GR (0x2)
CORACQ_VAL_COLOR_ALIGNMENT_RG_GB (0x4)
CORACQ_VAL_COLOR_ALIGNMENT_GR_BG (0x8)

FALSE

Table 10: Camera Related Parameters

VIC Related Param e ters

Parameter Values

CORACQ_PRM_CAMSEL Full Mono

10T8B Mono
8T10B Mono

Full Bayer

80B Packed Bi-Color

10T8B Bayer
8T10B Bayer

Medium Color RGB

Full Packed RGB

80B Packed RGB

50 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

CAMSEL_MONO = from 0 to 0

CAMSEL_RGB = from 0 to 0

CORACQ_PRM_CROP_LEFT Full Mono

10T8B Mono

Full Bayer

10T8B Bayer

8T10B Mono

8T10B Bayer

Medium Color RGB

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

CORACQ_PRM_CROP_TOP min = 0 line

CORACQ_PRM_CROP_WIDTH Full Mono

10T8B Mono

Full Bayer

10T8B Bayer

8T10B Mono

8T10B Bayer

Medium Color RGB

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

CORACQ_PRM_CROP_HEIGHT min = 1 l ine

CORACQ_PRM_DECIMATE_METHOD CORACQ_VAL_DECIMATE_DISABLE (0x1)
CORACQ_PRM_LUT_ENABLE TRUE

CORACQ_PRM_LUT_NUMBER Default = 0
CORACQ_PRM_STROBE_ENABLE TRUE

CORACQ_PRM_STROBE_METHOD CORACQ_VAL_STROBE_METHOD_1 (0x1)

CORACQ_PRM_STROBE_POLARITY CORACQ_VAL_ACTIVE_LOW (0x1)

CORACQ_PRM_STROBE_DURATION min = 1 µs

CORACQ_PRM_STROBE_DELAY min = 0 µs

CORACQ_PRM_TIME_INTEGRATE_ENABLE TRUE

CORACQ_PRM_TIME_INTEGRATE_DURATION min = 1 µs

CORACQ_PRM_CAM_TRIGGER_ENABLE TRUE

min = 0 pixel, max = 65512 pixel, step = 2 pixel
min = 0 pixel, max = 65506 pixel, ste p = 4 pixel
min = 0 pixel, max = 65512 pixel, step = 1 pixel
min = 0 pixel, max = 65512 pixel, step = 1 pixel
min = 0 pixel, max = 32744 pixel, step = 2 pixel
min = 0 pi x el, max = 32744 pixel, step = 4 pixel
min = 0 pi x el, max = 16380 pixel, step = 1 pixel

min = 0 pixel, max = 16380 pixel, step = 1 pixel
min = 0 pi x el, max = 32764 pixel, step = 1 pixel

max = 16777215 line
step = 1 line

min = 24 pixel, max = 65536 pixel, step = =2 pixel
min = 24 pixel, max = 65530 pixel, step = =4 pixel
min = 24 pixel, max = 65536 pixel, step = 1 pixel
min = 24 pixel, max = 65536 pixel, step = 1 pixel
min = 24 pixel, ma x = 32768 pixel, step = 2 pixel
min = 24 pixel, max = 32768 pixel, step = 1 pixel
min = 4 pixel, max = 16384 pixel, step = 1 pixel

min = 4 pixel, max = 16384 pixel, step = 1 pixel
min = 4 pi x el, max = 32768 pixel, step = 1 pixel

max = 16777215 line
step = 1 line

FALSE

FALSE

CORACQ_VAL_STROBE_METHOD_3 (0x4)
CORACQ_VAL_STROBE_METHOD_4 (0x8)

CORACQ_VAL_ACTIVE_HIGH (0x2)

max = 85899345 µs
step = 1 µs

max = 85899345 µs
step = 1 µs

FALSE

max = 85899345 µs
step = 1 µs

FALSE

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 51

CORACQ_PRM_OUTPUT_FORMAT Full Mono

10T8B / 8T10B

Medium Color RGB

Full Bayer

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

10T8B Bayer

8T10B Bayer

CORACQ_PRM_EXT_TRIGGER_ENABLE CORACQ_VAL_EXT_TRIGGER_OFF (0x1)

CORACQ_PRM_VIC_NAME Full Mono

10T8B
8T10B

Medium Color RGB

Full Bayer

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

10T8B Bayer

8T10B Bayer
CORACQ_PRM_LUT_MAX 1
CORACQ_PRM_EXT_TRIGGER_DETECTION CORACQ_VAL_ACTIVE_LOW (0x1 )

CORACQ_PRM_LUT_FORMAT Full mono/10T8B

8T10B

Medium Color RGB

Full Bayer

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

10T8B Bayer

8T10B Bayer

CORACQ_PRM_VSYNC_REF CORACQ_VAL_SYNC _REF_END (0x2)
CORACQ_PRM_HSYNC_REF CORACQ_VAL_SYNC_REF_END (0x2)
CORACQ_PRM_LINE_INTEGRATE_ENABLE TRUE

CORACQ_PRM_LINE_INTEGRATE_DURATION min = 1 pixel

CORACQ_PRM_LINE_TRIGGER_ENABLE TRUE

CORACQ_PRM_EXT_FRAME_TRIGGER_ENABLE TRUE

CORACQ_PRM_EXT_FRAME_TRIGGER_DETECTION CORACQ_VAL_ACTIVE_LOW (0x1)

CORACQ_VAL_OUTPUT_FORMAT_MONO8
CORACQ_VAL_OUTPUT_FORMAT_MONO16

CORACQ_VAL_OUTPUT_FORMAT_RGB8888
CORACQ_VAL_OUTPUT_FORMAT_RGB888
CORACQ_VAL_OUTPUT_FORMAT_RGB101010
CORACQ_VAL_OUTPUT_FORMAT_RGB16161616

CORACQ_VAL_OUTPUT_FORMAT_RGB8888
CORACQ_VAL_OUTPUT_FORMAT_RGB888
CORACQ_VAL_OUTPUT_FORMAT_RGB101010
CORACQ_VAL_OUTPUT_FORMAT_RGB16161616
CORACQ_VAL_OUTPUT_FORMAT_MONO8
CORACQ_VAL_OUTPUT_FORMAT_MONO16

CORACQ_VAL_OUTPUT_FORMAT_RGB8888
CORACQ_VAL_OUTPUT_FORMAT_RGB888

CORACQ_VAL_OUTPUT_FORMAT_RGB8888
CORACQ_VAL_OUTPUT_FORMAT_RGB888
CORACQ_VAL_OUTPUT_FORMAT_BICOLOR88

CORACQ_VAL_OUTPUT_FORMAT_RGB8888
CORACQ_VAL_OUTPUT_FORMAT_RGB888
CORACQ_VAL_OUTPUT_FORMAT_MONO8

CORACQ_VAL_OUTPUT_FORMAT_RGB8888
CORACQ_VAL_OUTPUT_FORMAT_RGB888
CORACQ_VAL_OUTPUT_FORMAT_RGB101010
CORACQ_VAL_OUTPUT_FORMAT_RGB16161616
CORACQ_VAL_OUTPUT_FORMAT_MONO16

CORACQ_VAL_EXT_TRIGGER_ON (0x8)
Default Area Scan 1 tap Mono

Default Area Scan 10 taps Parallel Mono
Default Area Scan 8 taps Parallel Mono
Default Area Scan 1 tap Color
Default Bayer Area Scan 1 tap Color
Default Area Scan Full Packed RGB
Default Area Scan 80-bit Packed RGBr
Default Area Scan 80-bit Packed Bi-Color
Default Bayer Area Scan 10 taps Parallel Color
Default Bayer Area Scan 8 taps Parallel Color

CORACQ_VAL_ACTIVE_HIGH (0x2)
CORACQ_VAL_RISING_EDGE (0x4)
CORACQ_VAL_FALLING_EDGE (0x8)

Default = CORDATA_FORMAT_MONO8
Default = CORDATA_FORMAT_MONO16
Default = CORDATA_FORMAT_COLORNI8
Default = CORDATA_FORMAT_COLORNI8
Default = CORDATA_FORMAT_COLORNI8

Default = CORDATA_FORMAT_COLORNI8
Default = CORDATA_FORMAT_COLORNI10

FALSE

max = 85899345 pixel
step = 1 pixel

FALSE

FALSE

CORACQ_VAL_ACTIVE_HIGH (0x2)
CORACQ_VAL_RISING_EDGE (0x4)
CORACQ_VAL_FALLING_EDGE (0x8)
CORACQ_VAL_DOUBLE_PULSE_RISING_ EDG E (0x20)
CORACQ_VAL_DOUBLE_PULSE_FALLING_EDGE (0x40)

52 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

CORACQ_PRM_EXT_LINE_TRIGGER_ENABLE TRUE

CORACQ_PRM_EXT_LINE_TRIGGER_DETECTION CORACQ_VAL_RISING_EDGE (0x4)

CORACQ_PRM_SNAP_COUNT Not available
CORACQ_PRM_INT_LINE_TRIGGER_ENABLE TRUE

CORACQ_PRM_INT_LINE_TRIGGER_FREQ Default = 5000 Hz
CORACQ_PRM_BIT_ORDERING CORACQ_VAL_BIT_ORDERING_STD (0x1)
CORACQ_PRM_EXT_TRIGGER_LEVEL CORACQ_VAL_LEVEL_TTL (0x1)

CORACQ_PRM_STROBE_LEVEL CORACQ_VAL_LEVEL_TTL (0x1)
CORACQ_PRM_EXT_FRAME_TRIGGER_LEVEL CORACQ_VAL_LEVEL_TTL (0x1)

CORACQ_PRM_EXT_LINE_TRIGGER_LEVEL CORACQ_VAL_LEVEL_422 (0x2)
CORACQ_PRM_INT_LINE_TRIGGER_FREQ_MIN 8 Hz
CORACQ_PRM_INT_LINE_TRIGGER_FREQ_MAX 500000 Hz
CORACQ_PRM_MASTER_MODE Not available
CORACQ_PRM_SHAFT_ENCODER_DROP min = 0 tick

CORACQ_PRM_SHAFT_ENCODER_ENABLE TRUE

CORACQ_PRM_EXT_TRIGGER_FRAME_COUNT min = 1 frame

CORACQ_PRM_INT_FRAME_TRIGGER_ENABLE TRUE

CORACQ_PRM_INT_FRAME_TRIGGER_FREQ min = 1 milli-Hz

CORACQ_PRM_FRAME_LENGTH CORACQ_VAL_ FRAME_LENGTH_FIX (0x1)

CORACQ_PRM_FLIP Full Mono

10T8B / 8T10B

Medium Color RGB

80B Packed RGB

80B Packed Bi-Color

Full Bayer
10T8B Bayer
8T10B Bayer

CORACQ_PRM_EXT_TRIGGER_DURATION min = 0 µs

CORACQ_PRM_TIME_INTEGRATE_DELAY min = 0 µs

CORACQ_PRM_CAM_RESET_DELAY min = 0 µs

CORACQ_PRM_CAM_TRIGGER_DELAY min = 0 µs

CORACQ_PRM_SHAFT_ENCODER_LEVEL CORACQ_VAL_LEVEL_422 (0x2)
CORACQ_PRM_LUT_NENTRIES 8-bit/pix el component

10-bit/pixel component
12-bit/pixel component

14/16-bit/pixel co m ponen t

CORACQ_PRM_EXT_FRAME_TRIGGER_SOURCE (*) min = 0

FALSE

CORACQ_VAL_FALLING_EDGE (0x8)

FALSE

CORACQ_VAL_LEVEL_422 (0x2)
CORACQ_VAL_LEVEL_12VOLTS (0x040)
CORACQ_VAL_LEVEL_24VOLTS (0x8)

CORACQ_VAL_LEVEL_422 (0x2)
CORACQ_VAL_LEVEL_12VOLTS (0x040)
CORACQ_VAL_LEVEL_24VOLTS (0x8)

max = 254 tick
step = 1 tick

FALSE

max = 262142 frame
step = 1 frame
Note: Infinite not supported

FALSE

max = 1000000000 milli-Hz
step = 1 milli-Hz

CORACQ_VAL_FRAME_LENGTH_VARIABLE (0x2)
CORACQ_VAL_FLIP_OFF (0x00)

CORACQ_VAL_FLIP_HORZ (0x01)

Not Available

max = 255 µs
step = 1 µs

max = 85899345 µs
step = 1 µs

max = 0 µs
step = 1 µs

max = 85899345 µs
step = 1 µs

256 entries
1024 entries
4096 entries
0 entries

max = 5
step = 1

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 53

CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE (*) min = 0

CORACQ_PRM_EXT_TRIGGER_SOURCE (*) min = 0

CORACQ_PRM_SHAFT_ENCODER_MULTIPLY min = 1

CORACQ_PRM_EXT_TRIGGER_DELAY min = 0

CORACQ_PRM_EXT_TRIGGER_DELAY_TIME_BASE CORACQ_VAL_TIME_BASE_LINE_VALID (0x4)

CORACQ_PRM_COLOR_DECODER_ENABLE Full Mono

10T8B/8T10B

Medium Color RGB

Full Packed RGB

80B Packed RGB

Full Bayer
10T8B Bayer
8T10B Bayer

CORACQ_PRM_COLOR_DECODER_METHOD Full Bayer

10T8B Bayer
8T10B Bayer

CORACQ_PRM_WB_GAIN Full Bayer

Full Packed RGB

10T8B Bayer
8T10B Bayer

CORACQ_PRM_WB_GAIN_RED Full Bayer

Full Packed RGB

10T8B Bayer
8T10B Bayer

CORACQ_PRM_WB_GAIN_GREEN Full Bayer

Full Packed RGB

10T8B Bayer
8T10B Bayer

CORACQ_PRM_WB_GAIN_BLUE Full Bayer

Full Packed RGB

10T8B Bayer
8T10B Bayer

CORACQ_PRM_EXT_TRIGGER_IGNORE_DELAY Not available
CORACQ_PRM_BOARD_SYNC_OUTPUT1_SOURCE (*) min = 0

CORACQ_PRM_BOARD_SYNC_OUTPUT2_SOURCE (*) min = 0

CORACQ_PRM_EXT_TRIGGER_SOURCE_STR [0] = Automatic

CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE_STR [0] = Automatic

CORACQ_PRM_VERTICAL_TIMEOUT_DELAY Not available
CORACQ_PRM_POCL_ENABLE TRUE

CORACQ_PRM_SHAFT_ENCODER_DIRECTION CORACQ_VAL_SHAFT_ENCODER_DIRECTION_IGNORE (0x00)

CORACQ_PRM_LINE_TRIGGER_AUTO_DELAY Not Available

max = 5
step = 1

max = 5
step = 1

max = 32
step = (2

max = 16777215
step = 1

CORACQ_VAL_TIME_BASE_LINE_TRIGGER (0x8)
CORACQ_VAL_TIME_BASE_SHAFT_ENCODER (0x40)
CORACQ_VAL_TIME_BASE_NS (0x80)

Not available

TRUE
FALSE

CORACQ_VAL_COLOR_DECODER_METHOD_1 (0x1)

Min = 100000, max = 900000, step = 1

Min = 100000, max = 900000, step = 1

Min = 100000, max = 900000, step = 1

Min = 100000, max = 900000, step = 1

max = 6
step = 1

max = 6
step = 1

[1] = External Trigger #1
[2] = External Trigger #2
[3] = Board Sync #1
[4] = Board Sync #2
[5] = Software Trigger

[1] = Shaft Encoder Phase A
[2] = Shaft Encoder Phase B
[3] = Shaft Encoder Phase A & B
[4] = Board Sync #1
[5] = Board Sync #2

FALSE

CORACQ_VAL_SHAFT_ENCODER_DIRECTION_FORWARD (0x01)
CORACQ_VAL_SHAFT_ENCODER_DIRECTION_REVERSE ( 0x0 2)

N

)

54 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

CORACQ_PRM_TIME_STAMP_BASE CORACQ_VAL_TIME_BASE_US (0x1)

CORACQ_PRM_BOARD_SYNC_OUTPUT1_SOURCE_STR [0] = Disabled

CORACQ_PRM_BOARD_SYNC_OUTPUT2_SOURCE_STR [0] = Disabled

CORACQ_PRM_SHAFT_ENCODER_ORDER CORACQ_VAL_SHAFT_ENCODER_ORDER_AUTO (0X0)

CORACQ_PRM_CAM_FRAMES_PER_TRIGGER Not available
CORACQ_PRM_LINE_INTEGRATE_TIME_BASE CORACQ_VAL_TIME_BASE_PIXEL_CLK (0X100)

CORACQ_VAL_TIME_BASE_LINE_VALID (0X4)
CORACQ_VAL_TIME_BASE_LINE_TRIGGER (0X8)
CORACQ_VAL_TIME_BASE_SHAFT_ENCODER (0X40)
CORACQ_VAL_TIME_BASE_100NS (0x200)

[1] = External Frame Trigger
[2] = Reserved
[3] = CC1
[4] = CC2
[5] = CC3
[6] = CC4

[1] = External Frame Trigger
[2] = Reserved
[3] = CC1
[4] = CC2
[5] = CC3
[6] = CC4

CORACQ_VAL_SHAFT_ENCODER_ORDER_DROP_MULTIPLY (0X1)
CORACQ_VAL_SHAFT_ENCODER_ORDER_MULTIPL Y_ DROP (0X2)

Table 11: VIC Related Parameters

ACQ Related Parameters

Parameter Values

CORACQ_PRM_LABEL Full mono

8T10B
10T8B

Full Bayer

Full Packed RGB

80B Packed RGB

80B Packed Bi-Color

10T8B Bayer
8T10B Bayer

CORACQ_PRM_EVENT_TYPE
CORACQ_PRM_EVENT_TYPE_EX

CORACQ_PRM_SIGNAL_STATUS CORACQ_VAL_SIGNAL_HSYNC_PRESENT

CORACQ_PRM_FLAT_FIELD_ENABLE Not Available
CORACQ_PRM_TIME_STAMP Available
CORACQ_CAP_SERIAL_PORT_INDEX Supported

Camera Link Full Mono
Camera Link 8-Tap/10-Bit Mono
Camera Link 10-Tap/8-Bit Mono
Camera Link Full Bayer
Camera Link Full Packed RGB
Camera Link 80-Bit Packed/8-Bit RGB
Camera Link 80-Bit Packed/8-Bit Bi-Color
Camera Link 10-Tap/8-Bit Bayer
Camera Link 8-Tap/10-Bit Bayer

CORACQ_VAL_EVENT_TYPE_START_OF_FRAME
CORACQ_VAL_EVENT_TYPE_END_OF_FRAME
CORACQ_VAL_EVENT_TYPE_EXTERNAL_TRIGGER
CORACQ_VAL_EVENT_TYPE_VERTICAL_SYNC
CORACQ_VAL_EVENT_TYPE_NO_PIXEL_CLK
CORACQ_VAL_EVENT_TYPE_PIXEL_CLK
CORACQ_VAL_EVENT_TYPE_FRAME_LOST
CORACQ_VAL_EVENT_TYPE_DATA_OVERFLOW
CORACQ_VAL_EVENT_TYPE_EXTERNAL_TRIGGER_IGNORED
CORACQ_VAL_EVENT_TYPE_EXT_LINE_TRIGGER_TOO_SLOW
CORACQ_VAL_EVENT_TYPE_SHAFT_ENCODER_REVERSE_COUNT_OVERFLOW

CORACQ_VAL_SIGNAL_VSYNC_PRESENT
CORACQ_VAL_SIGNAL_PIXEL_CLK_1_PRESENT
CORACQ_VAL_SIGNAL_PIXEL_CLK_2_PRESENT
CORACQ_VAL_SIGNAL_PIXEL_CLK_3_PRESENT
CORACQ_VAL_SIGNAL_PIXEL_CLK_ALL_PRESENT
CORACQ_VAL_SIGNAL_POWER_PRESENT
CORACQ_VAL_SIGNAL_POCL_ACTIVE
CORACQ_VAL_SIGNAL_POCL_ACTIVE_2

Table 12: Acquisition Related Parameters

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 55

Transfer Related Capabilities

Capability Values

CORXFER_CAP_NB_INT_BUFFERS C O RX FE R_ V A L _ NB _INT_BUFFE RS_AUTO (0x2)
CORXFER_CAP_MAX_XFER_SIZE 4294967040 Bytes
CORXFER_CAP_MAX_FRAME_COUNT 16777215 Frames
CORXFER_CAP_COUNTER_STAMP_AVAILABLE FALSE

Table 13: Transfer Related Capabilities

Transfer Related Parameters

Parameter Values

CORXFER_PRM_EVENT_TYPE
CORXFER_PRM_EVENT_TYPE_EX

CORXFER_PRM_START_MODE CORXFER_VAL_START_MODE_ASYNCHRONOUS (0x0)

CORXFER_PRM_CYCLE_MODE CORXFER_VAL_CYCLE_MODE_ASYNCHRONOUS (0x0)

CORXFER_PRM_FLIP CORXFER_VAL_FLIP_OFF (0x0)

CORXFER_PRM_INT_BUFFERS * Depends on acquired image size.

CORXFER_PRM_EVENT_COUNT_SOURCE CORXFER_VAL_EVENT_COUNT_SOURCE_DST (0x1)

CORXFER_PRM_BUFFER_TIMESTAMP_MODULE CORXFER_VAL_BUFFER_TIMESTAMP_MODULE_XFER (0x13)
CORXFER_PRM_BUFFER_TIMESTAMP_EVENT CORXFER_VAL_EVENT_TYPE_END_OF_FRAME
CORXFER_PRM_LINE_MERGING CORXFER_VAL_LINE_MERGING_AUTO (0x0)

CORXFER_VAL_EVENT_TYPE_START_OF_FRAME
CORXFER_VAL_EVENT_TYPE_END_OF_FRAME
CORXFER_VAL_EVENT_TYPE_END_OF_TRANSFER

CORXFER_VAL_START_MODE_SYNCHRONOUS (0x1)
CORXFER_VAL_START_MODE_HALF_ASYNCHRONOUS (0x2)
CORXFER_VAL_START_MODE_SEQUENTIAL (0x3)

CORXFER_VAL_CYCLE_MODE_SYNCHRONOUS_WITH_TRASH (0x2)
CORXFER_VAL_CYCLE_MODE_OFF (0x3)
CORXFER_VAL_CYCLE_MODE_SYNCHRONOUS_NEXT_EMP TY_WI T H_TRASH ( 0x5)

CORXFER_VAL _ F LIP _ V ERT (0x2)

By default driver will optimize the number of on-board buffers.

CORXFER_VAL_EVENT_COUNT_SOURCE_SRC (0x2)

CORXFER_VAL_LINE_MERGING_OFF (0x2)

Table 14: Transfer Related Parameters

General Outputs #1: Related Capabil i ties (for GIO Module #0)

These are the User Interface Outputs available on connector J1.

Capability Values

CORGIO_CAP_IO_COUNT 4 I/Os
CORGIO_CAP_DIR_OUTPUT 0xf
CORGIO_CAP_DIR_TRISTATE 0xf
CORGIO_CAP_EVENT_TYPE Not Available
CORGIO_CAP_READ_ONLY 0x03 (* depends on strobe outputs reserved for acquisition device)

Table 15: GIO-0 Related Capabilities

56 • Xtium-CL PX4 Reference Xtium-CL PX4 User's Manual

General Outputs #1: Related Parameters (for GIO Module #0)

Parameter Values

CORGIO_PRM_LABEL General Outputs #1
CORGIO_PRM_DEVICE_ID 0
CORGIO_PRM_OUTPUT_TYPE CORGIO_VAL_OUTPUT_TYPE_TTL (0x10)
CORGIO_PRM_CONNECTOR CORGIO_VAL_CONNECTOR_1 (0x1)

Table 16: GIO-0 Related Parameters

General Inputs #1: Related Capabilities (for GIO Module #1)

These are the User Interface Inputs available on connector J1.

Capability Values

CORGIO_CAP_IO_COUNT 4 I/Os
CORGIO_CAP_DIR_OUTPUT 0x0
CORGIO_CAP_DIR_TRISTATE 0x0
CORGIO_CAP_EVENT_TYPE CORGIO_VAL_EVENT_TYPE_RISING_EDGE (0x1 )

CORGIO_CAP_READ_ONLY 0x03 (* depends on external trigger inputs reserved for acq ui sition device)

CORGIO_VAL_EVENT_TYPE_FALLING_EDGE (0x2)

Table 17: GIO-1 Related Capabilities

General Inputs #1: Related Parameters (for GIO Module #1)

Parameter Values

CORGIO_PRM_LABEL General Inputs #1
CORGIO_PRM_DEVICE_ID 1
CORGIO_PRM_INPUT_LEVEL CORGIO_VAL_INPUT_LEVEL_TTL (0x1)

CORGIO_PRM_CONNECTOR CORGIO_VAL_CONNECTOR_1 (0x1)

CORGIO_VAL_INPUT_LEVEL_422 (0x2)
CORGIO_VAL_INPUT_LEVEL_24VOLTS (0x8)
CORGIO_VAL_INPUT_LEVEL_12VOLTS (0x40)

Table 18: GIO-1 Related Parameters

Bidirectional General I/Os: Related Capabilities (for GIO Module #2)

These are the Open In terface I/Os available on connector J5

Capability Values

CORGIO_CAP_IO_COUNT 8 I/Os
CORGIO_CAP_DIR_OUTPUT 0xff
CORGIO_CAP_DIR_TRISTATE 0xff
CORGIO_CAP_EVENT_TYPE Not Available
CORGIO_CAP_READ_ONLY 0x03 (* depends on board syncs reserved for acquisition device)

Table 19: GIO-2 Related Capabilities

Xtium-CL PX4 User's Manual Xtium-CL PX4 Reference • 57

Bidirectional General I/Os: Related Parameters (for GIO Module #2)

Parameter Values

CORGIO_PRM_LABEL Bidirectional General I/Os #1
CORGIO_PRM_DEVICE_ID 2
CORGIO_PRM_OUTPUT_TYPE CORGIO_VAL_OUTPUT_TYPE_LVTTL (0x20)
CORGIO_PRM_INPUT_LEVEL CORGIO_VAL_INPUT_LEVEL_LVTTL (0x20)
CORGIO_PRM_CONNECTOR CORGIO_VAL_CONNECTOR_2 (0x2)

Table 20: GIO-2 Related Parameters

Sapera Servers & Resources

Servers and Resources

The following table describes the Xtium-C L PX4 board

Servers Resources

Name Type Name Index Description

Xtium-

CL_PX4_1

(Full parallel

firmware)

Xtium-

CL_PX4_1

(Full parallel

firmware with

Bayer

conversion)

Xtium-

CL_PX4_1

(80-bit firmware)

Xtium-

CL_PX4_1

(80-bit firmware

with Bayer

conversion)

Acquisition Camera Link Full Mono

Camera Link Medium

Color RGB

Camera Link Full Packed

RGB

Acquisition Camera Link Full Bayer 0 Base, Medium a nd Full configuration,

Acquisition CameraLink 10-Tap/8-Bit

Mono

CameraLink 8-Tap/10-Bit

Mono

CameraLink 80-Bit

Packed/8-Bit RGB

CameraLink 80-Bit

Packed/8-Bit Bi-Color

Acquisition Camera Link 10-Tap/8-

Bit Bayer

Camera Link 8-Tap/10-

Bit Bayer

0

1

0

1

2

3

0

1

Base, Medium a nd Full configuration,
Monochrome Cam e r a

Base and Medium configuration,
RGB Camera

Full packed 8-bit RGB Camera

Bayer Camera

80-bit configuration, Monochrome

10 Taps @ 8 bits Camera
80-bit configuration, Monochrome

8 Taps @ 10 bits Camera
80-bit configuration , RGB

80-bit packed 8-bit Camera
80-bit configuration, Bi-Color

80-bit packed 8-bit Camera
80-bit configuration, Bayer

10 Taps @ 8 bits Camera
80-bit configuration, Bayer

8 Taps @ 10 bits Camera

Table 21: Xtium-CL PX4 - Servers and Resources

58 • Sapera Servers & Resources Xtium-CL PX4 User's Manual

Windows Embedded 7 Installation

Windows Embedded 7 is not officially supported by Teledyne DALSA due to the number of possible
configurations. However, Sapera LT and other Teledyne DALSA products should function properly
on the Windows Embedded 7 platform provided that the required components are installed.

Teledyne DALSA provides answer files (.xml) for use during Windows Embedded 7 installation that
install all necessary components for running Sapera LT 32-bit or 64-bit versions (SDK or Runtime),
Sapera Processing 32-bit or 64-bit versions (SDK or Runtime), and Teledyne DALSA
framegrabbers.

For each platform (32 or 64-bit), the answer file provided is:
 SaperaFrameGrabbers.xml:

Configuration for Sapera LT, Sapera Processing and Teledyne DALSA framegrabbers

The f ile is located in the following directory dependent on the platform used:

<Install Directory>\Sapera\Install\Win7_Embedded\Win32
<Install Directory>\Sapera\Install\Win7_Embedded\Win64

The OS footprint for these configurations is less than 1 GB. Alternatively, the Windows Thin Client
configuration template provided by Microsoft in the Windows Embedded 7 installation also provides
the necessary dependencies for Sapera LT, and Teledyne DALSA framegrabbers (with an OS
footprint of approximately 1.5 GB).

If you are installing other applications on the Windows Embedded 7 platform, it is recommended
that you verify which components are required, and if necessary, create a corresponding “Answer
File”.

For more information on performing dependency analysis to enable your application on Windows
Embedded 7, refer to the Microsoft Windows Embedded 7 documentation.

Xtium-CL PX4 User's Manual Sapera Servers & Resources • 59

Technical Specifications

CL

Xtium-CL PX4 Board Specifications

Digital Video Input & Controls

Input Type Camera Link Specifications Rev 2.0 compliant;

1 Full or 1 Medium or 1 Base or 1 80-bit
(using SDR-26 Camera Link connectors — MiniCL)
Supports PoCL cameras in:
Camera Link Base, Medium, Full/80-Bit Configurations

Common Pixel Form a ts Camera Link tap configuration:

8, 10, 12, 14 and 16-bit mon o
8, 10, 12-bit RGB
8, 10, 12-bit Bayer
8-bit Bi-Color

Tap Format Details 1 Tap – 8/10/12/14/16-bit mono

2 Taps – 8/10/12-bit mono
3 Taps – 8/10/12-bit mono
4 Taps – 8/10/12-bit mono
8 Taps – 8-bit mono
8 Taps – 10-bit mono
10 Taps – 8-bit mono

1 Tap – 8/10/12-bit RGB
2 Taps – 8-bit RGB
Full packed 8-bit RGB/BGR
80-bit packed 8-bit RGB/BGR

80-bit packed 8-bit Bi-Color

Scanning Area scan and Line scan: Progressive, Multi-Tap, Tap reversal,

Alternate Tap Configuration

Scanning Directions Left to Right, Up-Down,

From Top

Resolution

note: these are Xtium-

PX4 maximums, not

Camera Link

specifications

Pixel Clock Ran g e 20 MHz to 85 MHz

Synchronization

Minimums

Image Buffer Av ailable with 512 MB

Bandwidth to Hos t

System

Serial Port Supports communication speeds from 9600 to 921600 bps

Horizontal Minimum:
8 Pixels per tap (8-bits/pixel)

Horizontal Maxim um:
8-bits/pixel x 64k Pixels/line
16-bits/pixel x 32k Pixels/line
32-bits/pixel x 16k Pixels/line
64-bits/pixel x 8k Pixels/line

Vertical Minimum :
1 line

Vertical Maximu m :
up to 16,000,000 lines—for area scan sensors
infinite line count—for linescan sensors

Horizontal Syn c minimum: 1 pixel
Vertical Sync minimu m : 1 line

Approximately 1.7GB/s (maximum obtain ed is dependent on firmware
loaded and PC characteristics)

Xtium-CL PX4 User's Manual Technical Specifications • 60

Controls Complia nt with Teledyne DALSA Trigger-to-Image Relia bility framework

Comprehensive e vent notifications
Timing control logic for camera triggers and strobe signals
External trigger la ten c y less than 100 nsec
Supports multi-b oa r d / m ulti-camera synchronization
Quadrature (phase A & B) shaft encoder inputs for extern a l w eb

synchronization: RS-422 input maximum frequency is 5 MHz
4 opto-coupled general inputs (RS-422/TTL/12V/24V).

Can be used as opto-coupled extern a l trigger inputs programmable as
active high or low (ed ge or level trigger).

4 TTL general outputs. Can be used a s Strobe ou tputs.
I/O available on a DH60-27P connector (J1)

Processing

Dependant on user

loaded firmware

configuration

Output Lookup Ta ble
Bayer Mosaic Filter
Bi-Color Conversion (for TDALSA P4)

Table 22: Board Specifications

Host System Requirements

Xtium-CL PX4 Dimensions

Approximately 4 in. (10 cm) wide by 4 in. (10 cm) high

General System Requirements for the Xtium-CL PX4

• PCI Express Gen2 x4 slot compatible;
(will work in Gen1 x4 slot with reduced bandwidth to host)

• On some computers the Xtium-CL PX4 may function installed in a x16 slot. The computer
documentation or direct testing by the user is required.

• Xtium-CL PX4 operates correctly when installed in a multi-processor system (including
Hyper-Threading multi-core processors).

Operating System Support

Windows XP, Windows 7 and Windows 8, each in either 32-bit or 64-bit

Environment

Ambient Temperature: 10° to 50°C (operation)

-40° to 75°C (storage)

Relative Humidity: 5% to 90% non-condensing (opera ting)

0% to 95% (storage)

MTBF @40°C 36.4 years

Table 23: Environment Specifications

Note: Ensure adequate airflow for proper functioning of the board across the entire temperature
range of 10 – 50°C . Airflow mea s uring 80 LFM (linear feet per minute) a c r os s th e s urface of the
board is recommended.

Power Requirements during Acquisi tions

+3.3V: 1A

+12V: 0.33A

Table 24: Power Specifications

Xtium-CL PX4 User's Manual Technical Specifications • 61

EMI Certifications

Figure 20: EMI Certifications

62 • Technical Specifications Xtium-CL PX4 User's Manual

Connector and Switch Locations

Xtium-CL PX4 Board Layout Drawing

Figure 21: Board Layout

Connector / LED Description List

The following table list s components on the Xtium-CL PX4 board. Detailed information concerning
the connectors/LEDs follows this summary table.

Location Description Location Description

J1 External Signals connector

DH60-27P

J2 Camera Link 2 Connector J7 PC power to camera interface

J3 Camera Link 1 Connector D1 Boot-up/PCIe Status LED

P2 PCIe x4 computer bus connector

(Gen2 compliant slot prefe rr ed)

Table 25: Board Connector List

J5 Multi Board Sync

and/or J1

(refer to text)

D3, D4 Camera status LEDs

J4, J6, P1 Reserved

Xtium-CL PX4 User's Manual Technical Specifications • 63

Camera Link 2

LED/connector

Xtium-CL PX4

Camera Link 1

LED/connector

I/O – DH60-27P

female connector

Board

Status

LED

Connector and Switch Specifications

Xtium-CL PX4 End Bracket Detail

Figure 22: End Bracket Details

The hardware installation process is completed with the connection of a supported camera to the
Xtium-CL PX4 board using Camera Link cables (see “Camera Link Cables” on page 84).

• The Xtium-CL PX4 board supports a camera with one or two Camera Link connectors (one
Base, one Medium or one Full – see “Data Port Summary” on page 83 for information on
Camera Link configurations).

• Connect the camera to the J3 connector with a Camera Link cable. When using a Medium or
Full camera, connect the second camera connector to J2.

Note: If the camera is powered by the Xtium-CL PX4, refer to "J7: Power Connector" on page 78
for power connec tions.

Contact Teledyne DALSA or browse our web site www.teledynedalsa.com/mv for information on
Xtium-CL PX4 supported cameras.

64 • Technical Specifications Xtium-CL PX4 User's Manual

Status LED Functional Description

D1 Boot-up/PCIe status LED

Color State Description

Red Solid FPGA firmwar e not loaded
Green Solid Normal FPGA firmware loaded, Gen2 speed, link width x4
Green Flashing Normal FPGA firmware loaded, Gen1 speed, link width x4

Yellow Solid Normal FPGA firmware loaded, Gen2 speed, link width not x 4
Yellow Flashing Normal FPGA firmware loaded, Gen1 speed, link width not x4

Blue Solid Safe FPGA firmware loaded, Gen2 speed
Blue Flashing Safe FPGA firmware loaded, Gen1 speed
Red Flashing PCIe Training Issue – Board will not be detected by computer

Table 26: D1 Boot-up/PCIe Status LED

Camera Link LEDs
(D4 = Camera Link connector #1, D3 = Camera Link connector #2)

Color State Description

Red Solid No Camera Link pixel clock detected
Green Solid Camera Link pixel clock detected. No line valid detected.

Note: for D3, when configuring for Full CameraLink, both pixel clock on

nd

Green Slow Flashing

~1 Hz

Green Fast Flashing

~8 Hz

the 2
Camera Link pixel clock and line valid signal detected

Note: for D3, when configuring for Full CameraLink, both line valid on the
2

Acquisition in pr ogress

cable must be detected.

nd

cable must be detected.

Table 27: Camera Link LED Status

Xtium-CL PX4 User's Manual Technical Specifications • 65

J3: Camera Link Connector 1

Name Pin # Type Description

BASE_X0- 25 Input Neg. Base Data 0

BASE_X0+ 12 Input Pos. Base Data 0

BASE_X1- 24 Input Neg. Base Data 1

BASE_X1+ 11 Input Pos. Base Data 1

BASE_X2- 23 Input Neg. Base Data 2

BASE_X2+ 10 Input Pos. Base Data 2

BASE_X3- 21 Input Neg. Base Data 3

BASE_X3+ 8 Input Pos. Base Data 3

BASE_XCLK- 22 Input Neg. Base Clock

BASE_XCLK+ 9 Input Pos. Base Clock

SERTC+ 20 Output Pos. Serial Data to Camera

SERTC- 7 Output Neg. Serial Data to Camera

SERTFG- 19 Input Neg. Serial Data to Frame Grabber

SERTFG+ 6 Input Pos. Serial Data to Frame Grabber

CC1- 18 Output Neg. Camera Control 1
CC1+ 5 Output Pos. Camera Control 1
CC2+ 17 Output Pos. Camera Control 2

CC2- 4 Output Neg. Camera Control 2

CC3- 16 Output Neg. Camera Control 3
CC3+ 3 Output Pos. Camera Control 3
CC4+ 15 Output Pos. Camera Control 4

CC4- 2 Output Neg. Camera Control 4

PoCL 1,26 +12 V (see note following table )

GND 13, 14 Ground

Table 28: Camera Link Connector 1

Notes on PoCL support:

 Refer to Sapera’s parameter CORACQ_PRM_POCL_ENABLE to enable PoCL and

CORACQ_PRM_SIGNAL_STATUS/CORACQ_VAL_SIGNAL_POCL_ACTIVE to verify if the POCL is
active. See also Sapera++ reference parameter SapAcquisition::SignalPoCLActive for the
current state.

 PoCL state is maintained as long as the board is not reset

66 • Technical Specifications Xtium-CL PX4 User's Manual

J2: Camera Link Connector 2

Medium and Full Camera Link sources require cables connected to both J2 and J3.

Name Pin # Type Description

MEDIUM _X0- 25 Input Neg. Medium Data 0

MEDIUM _X0+ 12 Input Pos. Medium Data 0

MEDIUM _X1- 24 Input Neg. Medium Data 1

MEDIUM _X1+ 11 Input Pos. Medium Data 1

MEDIUM _X2- 23 Input Neg. Medium Data 2

MEDIUM _X2+ 10 Input Pos. Medium Data 2

MEDIUM _X3- 21 Input Neg. Medium Data 3

MEDIUM _X3+ 8 Input Pos. Medium Data 3

MEDIUM _XCLK- 22 Input Neg. Medium Clock

MEDIUM _XCLK+ 9 Input Pos. Medium Clock

TERM 20 Term Resistor
TERM 7 Term Resistor

FULL_X0- 19 Input Neg. Full Data 0

FULL _X0+ 6 Input Pos. Full Data 0

FULL _X1- 18 Input Neg. Full Data 1

FULL _X1+ 5 Input Pos. Full Data 1

FULL _X2- 17 Input Neg. Full Data 2

FULL _X2+ 4 Input Pos. Full Data 2

FULL _X3- 15 Input Neg. Full Data 3

FULL _X3+ 2 Input Pos. Full Data 3

FULL _XCLK- 16 Input Neg. Full Clock

FULL _XCLK+ 3 Input Pos. Full Clock

PoCL 1,26 +12 V (see note following table)

GND 13, 14 Ground

Table 29: Camera Link Connector 2

Notes on PoCL support:

 Refer to Sapera’s parameter CORACQ_PRM_POCL_ENABLE to enable PoCL and

CORACQ_PRM_SIGNAL_STATUS/CORACQ_VAL_SIGNAL_POCL_ACTIVE_2 to verify if the POCL
is active. See also Sapera++ ref erence parameter S apAcquisition::SignalPoCLActive for the
current state.

 PoCL state is maintained as long as the board is not reset

Xtium-CL PX4 User's Manual Technical Specifications • 67

Camera Link Camera Control Signal Overview

Four LVDS pairs are for general-purpose camera control, defined as camera inputs / frame grabber
outputs by the Camera Link Base camera specification. These controls are on J3 conn e ct o r.

• Camera Control 1 (CC1)

• Camera Control 2 (CC2)

• Camera Control 3 (CC3)

• Camera Control 4 (CC4)

Each camera manufacture is free to define the signals input on any one or all 4 control signals.
These control signals are used either as camera control pulses or as a static logic state. Control
signals not required by the camera are simply assigned as not used. Refer to your camera's user
manual for information on what control signals are required.

Note 1: The Xtium-CL PX4 pulse controller has a minimu m resolution of 20ns.
Note 2: The internal line trigger frequency has a 2µs resolution.

The Xtium-CL PX4 can assign any camera control signal to the appropriate Camera Link control.
The following screen shot shows the Sapera CamExpert dialog where Camera Link controls are
assigned.

Figure 23: CamExpert - Camera Link Controls

68 • Technical Specifications Xtium-CL PX4 User's Manual

649Ω

0.01uF

3.3V

68.1K

From User
Interface
Connector

EMI

Filter

J1: External Sig nals Connector (Female DH60-27P)

Description Pin # Pin # Description

Ground 1 15 General Input 3

RS-422 Shaft Encoder Phase A (-) 2 16 General Input 4

RS-422 Shaft Encoder Phase A (+)

(see note 3)

Ground 4 18 Reserved

RS-422 Shaft Encoder Phase B (-) 5 19 Reserved

RS-422 Shaft Encoder Phase B (+) 6 20 Reserved

General Input Common Ground 7 21 General Output 3

External Trigger Inpu t 1 / General Input 1

(Opto-coupled — see note 1)

External Trigger Inpu t 2 / General Input 2 9 23 Reserved

Ground 10 24 Reserved

Strobe 1 / General Output 1

(See note 2)

General Output 2 12 26 Reserved

Ground 13 27 Reserved

Power Output 12 Volts, 350mA m a x

(from Aux Power Connector, see J7 below)

3 17 Reserved

8 22 General Output 4

11 25 Reserved

14

Table 30: DH60-27P Connector Signals

Note 1: Genera l I nputs / External Trigger Inputs Specifications

Each of the four General Inputs are opto-coupled and able to connect to single ended source
signals. General Input 1 and 2 can also act as External Trigger Inputs. See “Board Inform at ion”
user settings. These inputs generate individual interrupts and are read by the Sapera application.
The following figure is typical for each Genera Input.

 Note: Only General I nput 1 can be connected to a differential source signal. ECO #22579

needed.

Figure 24: General Inputs Electrical Diagram

Input Deta ils:

• The switch point is software programmable to suppo rt TTL, RS-422, 12V or 24V input signals.

• Maximum input signal frequency is 100 KHz.

• Each input has a 649-ohm series resistor on the op to-coupler input.

• The 0.01uF capacitor provide high frequency noise filtering.

• Maximum input voltage is 26V.

• Minimum current is dependent on input voltage applied: I

Xtium-CL PX4 User's Manual Technical Specifications • 69

(min) = (V

optoin

- 0.5)/649Ω

optoin

Opto-Coupler

t(oc)

Debouncer

1..255 us
t(d)

External Trigger

t(et)

Validated Trigger

t(vt) = t(et) + t(oc) + t(d)

Input Level Switch Point Propagation Delay

(rising edge signal ↑ )

Propagation Delay

(falling edge signal ↓ )

TTL/RS-422

12V
24V

1.6V 1.75 µs 5.5 µs
6V 2.6 µs 2.6 µs

12V 1.9 µs 3.1 µs

For External Trigger u s ag e:

• Input signal is “debounced” to ensure that no voltage glitch is detected as a valid transition.
This debounce circ uit time constant can be programmed from 1
than the programmed value is blocked and therefore not seen by the board. If no debounce
value is specified (value of 0µs), the minimum value of 1µs will be used.

• Refer to Sapera parameters:
CORACQ_PRM_EXT_TRIGGER_SOURCE
CORACQ_PRM_EXT_TRIGGER_ENABLE
CORACQ_PRM_EXT_TRIGGER_LEVEL
CORACQ_PRM_EXT_FRAME_TRIGGER_LEVEL
CORACQ_PRM_EXT_TRIGGER_DETECTION
CORACQ_PRM_EXT_TRIGGER_DURATION

• See also *.cvi file entries:
External Trigger Level, External Frame Trigger Level, External Trigger Enable, External Trigger
Detection.

• External Trigger Input 2 used for two pulse external trigger with variable frame length line scan
acquisition.

µs to 255µs. Any pulse smaller

Trigger Signal Total Delay

Figure 25: External Trigger Input Validation & Delay

Let t(et) = time of external trigger in µs
t(oc) = time opto-coupler takes to change state (time varies dependent on

input voltage)
t(d) = user set debounce duration fr om 1 to 25 5µs
t(vt) = time of validated trigger in µs

Table 31: External Trigger Timing Specifications

Note: Teledyne DALSA recomm e nds using the fastest transition to m inimize the time it takes for
the opto-coupler to ch ange state.

If the duration of the external trigger is > t(oc) + t(d), then a valid acquisition trigger is detec ted.
It is possible to emulate an external trigger using the software trigger which is generated by a

function call from an application.

70 • Technical Specifications Xtium-CL PX4 User's Manual

J1: External Signals Connector

(DH60-27P)

Reserved
Reserved

4

External Signals Xtium-CL PX4

2627:

:

V (+)

3

V (+)

Compatible

Driver

Compatible

Driver

2

V (+)

Compatible

Driver

1

V (+)

Compatible

Driver

User Signal Ground

Reserved25 :

Reserved24 :

Reserved23 :

General Output 422 :

General Output 321 :

Reserved
Reserved

1920:

:

Reserved18 :

Reserved17 :

General Input 416 :

General Input 315 :

Power (12 Volts)14 :

Ground13 :

General Output 212 :

General Output 1 / Strobe11 :

Ground10 :

General Input 2 / Trigger 29 :

General Input 1 / Trigger 18 :

Input Common Ground7 :

Shaft Encoder B (+)6 :

Shaft Encoder B (-)5 :

Ground4 :

Shaft Encoder A (+)3 :

Shaft Encoder A (-)2 :

Ground1 :

OL

Block Diagram: Connecting External Drivers to General Inputs on J1

External Driver Elec trical Requirements

The Xtium-CL allows user selected (software programmable) input switching points to support TTL,
RS-422, 12V or 24V input signals. The following table defines the external signal voltage
requirements from the driver circuits connected to the Xtium external inputs.

Input Level Description MIN MAX

TTL/RS-422

12V

24V

Output Voltage High (V

Output Voltage Low (V

Output Voltage High (V

Output Voltage Low (V

Output Voltage High (V

Output Voltage Low (V

OH)

OL

OH)

OH)

OL

)

)

)

2.4 V 5.5 V
0 V 0.8 V
9 V 13.2 V
0 V 3 V

18 V 26.4 V

0 V 6 V

Xtium-CL PX4 User's Manual Technical Specifications • 71

75Ω

Buffer

LVTTL

To User
Interface
Connector

3.3V

Output

Enable

EMI

Filter

Note 2: General Outputs /Strobe Output Specifications

Each of the four General Outputs are TTL (3.3V) compatible. General Output 1 also functions as the
Strobe Output controlled by Sapera strobe control functions. See “Board Information” user
settings. The following figure is typical for each General Output.

Figure 26: General Outputs Electrical Diagram

Output Details:

• Each output has a 75-ohm series resistor

• The 2 diodes protects the LVTTL buffer against overvoltage

• Each output is a tri-state driver, enabled by software

• Minimum guaranteed output current is +/- 24mA @ 3.3V

• Maximum short circuit output current is 44mA

• Minimum voltage for output level high is 2.4V, while maximum voltage for output low is 0.55V

• Maximum output switching frequency is limited b y driver and register access on the PCIe bus.

For Strobe Usage:

• Refer to Sapera Strobe Methods parameters:
CORACQ_PRM_STROBE_ENABLE
CORACQ_PRM_STROBE_POLARITY
CORACQ_PRM_STROBE_LEVEL
CORACQ_PRM_STROBE_METHOD
CORACQ_PRM_STROBE_DELAY
CORACQ_PRM_STROBE_DURATION

• See also *.cvi file entries:
Strobe Enable, Strobe Polarity, Strobe Level, Strobe Method, Strobe Delay, Strobe Duration.

72 • Technical Specifications Xtium-CL PX4 User's Manual

J1: External Signals Connector

(DH60-27P)

Reserved
Reserved

4

To External Devices Xtium-CL PX4

2627:

:

Vcc

3

Vcc

Compatible

Receiver

Compatible

Receiver

2

Vcc

Compatible

Receiver

1

Vcc

Compatible

Receiver

User Signal Ground

Reserved25 :

Reserved24 :

Reserved23 :

General Output 422 :

General Output 321 :

Reserved
Reserved

1920:

:

Reserved18 :

Reserved17 :

General Input 416 :

General Input 315 :

Power (12 Volts)14 :

Ground13 :

General Output 212 :

General Output 1 / Strobe11 :

Ground10 :

General Input 2 / Trigger 29 :

General Input 1 / Trigger 18 :

Input Common Ground7 :

Shaft Encoder B (+)6 :

Shaft Encoder B (-)5 :

Ground4 :

Shaft Encoder A (+)3 :

Shaft Encoder A (-)2 :

Ground1 :

Block Diagram: Connecting External Recei v er s to the Genera l Outputs

External Receiver Electrical Requirements

External receiver circuits connec ted to the Xtium General Outputs must be compatible to TTL
signals.

Input Level Description MIN MAX

TTL

Input Voltage High (V

Input Voltage Low (V

IH)

IL

)

2.0 V –
– 0.8 V

Xtium-CL PX4 User's Manual Technical Specifications • 73

From User
Interface
Connector

100Ω

PhaseB+

PhaseB-

100Ω

PhaseA+

PhaseA-

Phase B

Phase A

Note 3: RS-422 Shaft Encoder Input Specifications

Dual Quadrature Shaft Encoder Inputs (pha se A and phase B) connect to differential signals (RS-

422) or single ended signals. The figure below shows the simplified representation of these inputs.

Figure 27: RS-422 Shaft Encoder Input Electrical Diagram

• RS-422 differential line receiver used is am26lv32.

• Input signals must meet the following

• Maximum differential input voltage is +/- 7V.

• Minimum differential voltage level is +/- 200mV.

• Both inputs have a 100-ohm differential resistor.

• Maximum input signal frequency is 10 MHz.

• The Xtium-CL provides ESD filtering on-board.

• See "Line Trigger Source Selection for Line scan Applications" on page 39 for more information.

• Refer to Sapera parameters:

CORACQ_PRM_SHAFT_ENCODER_ENABLE CORACQ_PRM_SHAFT_ENCODER_DROP
or refer to CORACQ_PRM_EXT_LINE_TRIGGER_ENABLE
CORACQ_PRM_EXT_LINE_TRIGGER_DETECTION
CORACQ_PRM_EXT_LINE_TRIGGER_LEVEL (fixed at RS-422)
CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE

• See also *.cvi file entries:
Shaft Encoder Enable , Shaft Encoder Pulse Drop,
or see External Line Trigger Enable, External Line Trigger Detection, External Line Trigger Level,
External Line Trigger Source.

• For TTL single ended signals, connect a bias voltage to the RS-422 (-) input to ensure correct
detection of the logic state of the signal connecte d to the RS-422 (+) input. See the following
section for connection methods.

74 • Technical Specifications Xtium-CL PX4 User's Manual

J1: External Signals Connector

(DH60-27P)

Reserved
Reserved

External Signals Xtium-CL PX4

2627:

:

2

V (+)

RS-422

Compatible

Driver

1

V (+)

RS-422

Compatible

Driver

User Signal Ground

Reserved25 :

Reserved24 :

Reserved23 :

General Output 422 :

General Output 321 :

Reserved
Reserved

1920:

:

Reserved18 :

Reserved17 :

General Input 416 :

General Input 315 :

Power (12 Volts)14 :

Ground13 :

General Output 212 :

General Output 1 / Strobe11 :

Ground10 :

General Input 2 / Trigger 29 :

General Input 1 / Trigger 18 :

Input Common Ground7 :

Shaft Encoder B (+)6 :

Shaft Encoder B (-)5 :

Ground4 :

Shaft Encoder A (+)3 :

Shaft Encoder A (-)2 :

Ground1 :

RS-422 (+) input

RS-422 (-) input

FG/system GND

DC

Bias Voltage

+2V

GND

Frame Grabber System

Interfacing TTL Output to RS-422 Inputs

via a Line Buffer/Driver

TTL signal source & Buffer Driver

(example: 74ACT244)

100 ohm

Note 3.1: Interfacing to an RS-422 Driver Ou tpu t

Note 3.2: Interfacing to a TTL (also called Push-Pull) Output

• The graphic shows a single-ended driver signal interfaced to the RS-422 input.

• RS-422 (-) input is biased to a DC voltage of +2 volts.

• This guarantees that the TTL signal connec ted to the RS-422 (+) input will be detected as a

logic high or low relative to the (-) input.

Xtium-CL PX4 User's Manual Technical Specifications • 75

Figure 28:External RS-422 Signals Connection Diagram

Figure 29: Interfacing TTL to RS-422 Shaft Encoder Inputs

RS-422 (+) input

RS-422 (-) input

FG/system GND

DC

Bias Voltage

Vcc/2

GND

Frame Grabber System

Interfacing Line Driver/Open Emitter Output to RS-422 Inputs

Generic Line Driver/Open Emitter

Output

Vcc

Pull-down resistor needed if it is not
already present in the Shaft Encoder.
Value depends on the characteristics

of the Shaft Encoder Output

100 ohm

RS-422 (+) input

RS-422 (-) input

FG/system GND

DC

Bias Voltage

Vcc/2

GND

Frame Grabber System

Interfacing Open Collector Output to RS-422 Inputs

Generic Open Collector Output

Vcc

Vcc

Pull-up resistor needed if it is not
already present in the Shaft Encoder.
Value depends on the characteristics

of the Shaft Encoder Output.

100 ohm

• The TTL shaft encoder ground, the bias voltage ground, and the Xtium-CL PX4 computer
system ground must be connected together.

• DC voltage for the RS-422 (-) input can be generated by a resister voltage divider.

• Use a single battery cell if this is more suitable to your system.

Note 3.3: Interfacing to a L ine Driver (also called Open Emitter) Output

Note 3.4: Interfacing to an Open Collector Output

76 • Technical Specifications Xtium-CL PX4 User's Manual

J5: Multi-Board Sync / Bi-directional General I/Os

There are 8 bi-directional General I/Os that can be interconnected between multiple boards. These
bi-direc tional I/Os can be read/written by Sapera application. Bi-directional General I/Os no.1 and
no.2 also can also act as the multi-board syn c I/ Os.

The multi-board sync feature permits interconnecting multiple Xtium boards to synchronize
acquisitions to one or two triggers or events. The trigger source origin can be either an external
signal or a software control signal. The board sending the trigger(s) is the Master board, while the
one or more boards receiving the control signal(s) from the Master board are the Slaves.

Setup of the master and slave boards is either by setting para meters via a Sapera application or by
using CamExpert to configure two camera files (.ccf). For testing purposes, two instances of
CamExpert (one for each board) can be run on the system where the frame grabbers are installed.

Hardware Preparation

 Interconnect two, three, or four Xtium boards via their J5 connector using the OR-YXCC-

BSYNC20 cable (for 2 boards) or the OR-YXCC-BSYNC40 cable (see Board Sync Cable Assembly
OR-YXCC-BSYNC40 for 3 or 4 boards).

Configuration via Sapera Application Programming

 Sync Master Board Software Setup: Choose one Xtium as “Sync Master”. The Sapera

parameter CORACQ_PRM_BOARD_SYNC_OUTPUT1_SOURCE and/or
CORACQ_PRM_BOARD_SYNC_OUTPUT2_SOURCE select the signal(s) to send to the “Sync
Slave” boards.

 Other “Sync Master” board parameters are set as for any external trigger application, such as

External Trigger enable, detection, and level. See Sapera documentation for more details.

 Sync Slave Board Software Setup: The Sapera parameter

CORACQ_PRM_EXT_TRIGGER_SOURCE and/or CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE
are set to Board Sync #1 or #2.

Configuration via Sapera CamExpert

 Start the first instance of CamExpert and select one installed Xtium board to be the master.

As shown in the following image, this board is configured to use an external trigger on input
#1.

 The Sync Master Xtium board is also configured to output the external trigger on board sync

#1, as shown in the following image.

Xtium-CL PX4 User's Manual Technical Specifications • 77

 The Sync Slave Xtium board is configured to receive its trigger on the board sync signal. As

an example the following image shows the Xtium board configured for an external sync on
board sync #2.

 Test Setup: Start the acquisition on all slave boards. The acqu isition process is now waiting for

the control signal from the master board. Trigger master board acquisition and the acquisition
start signal is sent to each slave board.

J7: Power Connector

DC Power Details

Warning: Never remove or install any hardware component with the computer power on.
Never connect a power cable to J7 w hen the computer is powered on.

• Connect a computer 6-pin PCI Express power connector to J7 to supply DC power to the
Camera Link connectors for PoCL operation and/or to supply power to connector J1. Older
computers may need a power cable adapter (see Power Cable Assembly OR-YXCC-PWRY00).

• The 12 Volt can supply up to 8W of power to the cameras (4W per connector) and 6W to J1.
Note that J1 has a 500 mA re-settable fuse on the board. If the fuse trips open, turn off the
host computer power. When the computer is powered again, the fuse is automatically reset.

78 • Technical Specifications Xtium-CL PX4 User's Manual

Cables & Accessories

The following cables and accessories are available for purchase. Contact sales at Teledyne DALSA.

DH40-27S Cable to Blunt End (OR-YXCC-27BE2M1, Rev B1)

Cable assembly consists of a 2000 mm (~6 ft.) blunt end cable to mate to Xtium external
connector J1. Note: The applicable wiring color code table is included with the printed Product
Notice shipped with the cable package — no other wiring table should be used.

Important: Cable part number OR-YXCC-27BE2M0 rev.3 is obsolete and should not be used with
any Xtium series boards.

Figure 30: DH60-27P Cable No. OR-YXCC-27BE2M1 Detail

Figure 31: Photo of cable OR-YXCC-27BE2M1

Xtium-CL PX4 User's Manual Technical Specifications • 79

DH40-27S Connector Kit for Custom Wiring

Teledyne DALSA makes available a k it comprised of the DH40-27S connector plus a screw lock
housing package, for clients interested in assembling their own custom I/O cable. Order part
number “OR-YXCC-H270000”, (package as shown below).

Table 32: OR-YXCC-H270000 Custom Wiring Kit

80 • Technical Specifications Xtium-CL PX4 User's Manual

Board Sync Cable Assembly OR -YXCC-BSYNC40

This cable connects 3 to 4 Xtium boards for the board sync function as described in section J5:
Multi-Board Sync / Bi-directional General I/Os. For a shorter 2 board cable, order cable assembly
OR-YXCC-BSYNC20.

Figure 32: Photo of cable OR-YXCC-BSYNC40

Xtium-CL PX4 User's Manual Technical Specifications • 81

Power Cable Assembly OR-YXCC-PWRY00

When the Xtium-CL PX4 supplies power to cameras via PoCL and/or when power is supplied to
external devices via the J1 I/O connector, PC power must be connected to the Xtium external
power source connector (J7).

Recent computer power supplies provide multiple 6-pin power source connectors for PCI Express
video cards, where one is connected to J7 on the Xtium-CL. But if the computer is an older model,
this power supply adapter converts 2 standard 4-pin large power connectors to a 6-pin power
connector.

Figure 33: Photo of cable assembly OR-YXCC-PWRY00

This is an industry standard adapter cable which ca n be purchased from Teledyne DALSA.

82 • Technical Specifications Xtium-CL PX4 User's Manual

Camera Link Interface

Camera Link Overview

Camera Link is a communication interface for vision applications developed as an extension of
National Semiconduc t or's Channel Link technology. The advan t ages of the Camera Link interface
are that it provides a standard digital camera connection specification, a standard data
communication protocol, and simpler cabling between camera and frame grabber.

The Camera Link interface simplifies the usage of increasingly diverse cameras and high signal
speeds without complex custom cabling. Fo r additional information concerning Camera Link, see

http://en.wikipedia.org/wiki/Camera_Link.

Rights and Trademarks

Note: The following text is extracted from the Camera L ink Specification 1.1 (January 2004).

The Automated Imaging Association (AIA), as sponsor of the Camera Link committee, owns the U.S. trademark
registration for the Camera Link logo as a certification mark for the mutual benefit of the industry. The AIA will
issue a license to any company, member or non-member, to use the Camera Link logo with any products that the
company will self-certify to be compliant with the Camera Link standard. Licensed users of the Camera Link logo
will not be required to credit the AIA with ownership of the registered mark.

3M™ is a trademark of the 3M Company.
Channel Link™ is a tra de mark of National Semiconductor.
Flatlink™ is a trademark of Texas Instruments.
Panel Link™ is a trademark of Silicon Image.

Data Port Summary

The Camera Link interface has three configurations. A single Camera Link connection is limited t o
28 bits requiring some cameras to have multiple connections or channels. The naming conventions
for the three configurations are:

• Base: Single Channel Link interface, single cable connector

• Medium: Two Channel Link interface, two cable connectors

• Full: Three Channel Link interface, two cable connectors

A single Camera Link port is defined as having a n 8-bit data word. The "Full" specification supports
eight ports labeled as A to H.

Xtium-CL PX4 User's Manual Camera Link Interface • 83

Camera Signal Summary

Video Data

Four enable signals are defined as:

• FVAL Frame Valid (FVAL) is defined HIGH for valid lines

• LVAL Line Valid (LVAL) is defined HIGH for valid pixels

• DVAL Data Valid (DVAL) is defined HIGH when data is valid

• Spare A spare has been defined for future use

The camera provides the four enables on each Channel Link. All unused data bits must be set to a
known value by the camera.

Camera Controls

Four LVDS pairs are reserved for general-purpose camera control, defined as camera inputs and
frame grabber outputs.

• Camera Control 1 (CC1)

• Camera Control 2 (CC2)

• Camera Control 3 (CC3)

• Camera Control 4 (CC4)

Note: the Xtium-CL P X4 by default implements the control lin e s a s follows,
(using Teledyne DALSA termin olo gy):
(CC1) EXYNC
(CC2) PRIN
(CC3) FORWARD
(CC4) HIGH

Communication

Two LVDS pairs are allocated for asynchronous serial communication to and from the ca mera and
frame grabber. Cameras and frame grabbers sho uld support at least 9600 baud.

• SerTFG Differential pair with serial communications to the frame grabber

• SerTC Differential pair with serial communicat io n s to the camera

The serial interface protocol is one start bit, one stop bit, no parity, and no handshak ing.

Camera Link Cables

For a dditional information on Camera Link cables and their specifications, visit the following web
sites:

3 M http://www.3m.com/interconnects /

(enter Camera Link as the search keyword)

Nortech Systems http://www.nortechsys.com/intercon/CameraLinkMain.htm

Table 33: Camera Link Cables Suppliers

84 • Camera Link Interface Xtium-CL PX4 User's Manual

Contact Information

Sales Information

Visit our web site:
Email:

Canadian Sa les

www.teledynedalsa.com/mv
mailto:[e-mail]

Teledyne DALSA — Head office
605 McMurray Road
Waterloo, Ontario, Canada, N2V 2E9

Tel: [phone]
Fax: [phone]

Teledyne DALSA — Mon tr e a l office
880 McCaffrey
St. Laurent, Quebec, Canada, H4T 2C7

Tel: [phone]
Fax: [phone]

USA Sales European Sales

Teledyne DALSA — Biller ica office
700 Technology Park Drive
Billerica, Ma. 01821

Tel: [phone]
Fax: [phone]

Teledyne DALSA GMBH
Felix-Wankel-Str. 1
82152 Krailling, German y

Tel: +49 – 89 89 – 54 57 3-80
Fax: +49 – 89 89 – 54 57 3-46

Asian Sales

Teledyne DALSA Asia Pacific
Ikebukuro East 13F
3-4-3 Higashi Ikebukuro,
Toshima-ku, Tokyo, Japan

Tel: [phone]
Fax: [phone]

Shanghai Industrial Investment Building
Room G, 20F, 18 North Cao Xi Road,
Shanghai, China 200030

Tel: [phone]
Fax: [phone]

Technical Support

Submit any support question or request via our web site:

Technical support form v ia ou r web page:
Support requests for imaging product installations,
Support requests for imaging ap plications

Camera support information

Product literature and driv er updates

Xtium-CL PX4 User's Manual Contact Information • 85

http://www.teledynedalsa.com/mv/support

E

Index

A

Acquisition and Control Unit 43
acquisition bandwidth 29
Acquisition ev ents 43
acquisition module 43
acquisition parameters 34
ACUPlus 7
administrator 16
AUTORUN 10

B

Block Diagram 36
BoardInfo.txt 18, 26

C

cables 64
calibration information 27
camera configu ration file 30
camera control 17, 68
Camera file 35, 40, 42
Camera Link 8, 64, 68, 83
Camera Link cabling 17
Camera Link control 68
camera power 64
camera timing 30
CamExpert 35, 40, 42
CamExpert parameters 31
communication ports 8
computer administrator 10
Contiguous Memor y 20
CORACQ_PRM_EXT_LINE_TRIGGER_DETECTIO N 74
CORACQ_PRM_EXT_LINE_TRIGGER_ENABLE 74
CORACQ_PRM_EXT_LINE_TRIGGER_LEVEL 74
CORACQ_PRM_EXT_LINE_TRIGGER_SOURCE 74
CORACQ_PRM_EXT_TRIGGER_DETECTION 70
CORACQ_PRM_EXT_T RI G GER_ENABLE 70
CORACQ_PRM_EXT_T RI G GER_LEVEL 70
CORACQ_PRM_SHAFT_ENCODER_DROP 74
CORACQ_PRM_SHAFT_ENCODER_ENABLE 74
CORACQ_PRM_SHAFT_ENCODER_LEVEL 74
CORACQ_PRM_STROBE _DELAY 72
CORACQ_PRM_STROBE_DURATION 72
CORACQ_PRM_STROBE_ENABLE 72
CORACQ_PRM_STROBE _LEVEL 72
CORACQ_PRM_STROBE_METHOD 72
CORACQ_PRM_STROBE_POLARITY 72

D

Data Overflow event 43
Data Transfer Engine 8
Device Manager 11, 18, 26
device report 18
driver upgrade 16

Embedded Windows answer files 59
End of Frame event 44
End of Transfer event 44
External Signals Connector 39, 41
External Signals Connector Br acket Assembly 39

F

failure - firmwa r e upgrade 26
Firmware Loader 11
firmware revis ion 18
firmware selection 7
Found New Hardware Wizard 10
frame buffer 20, 41
Frame Lost event 44
Frame Sync 42
FRAME_RESET 41

H

HyperTerminal 8, 17

I

image processing 6
Imaging drivers 25
installer response file 13, 14

L

launch.exe 10
Line Scan 7, 40
Log Viewer program 27
LVDS pairs 68

M

MDR-26 64
multi-board sync 77

N

National Semiconductor 83

O

out-of-memory error 20

P

PCI bus latency 43
PCI Bus Number 24
PCI configura tion registers 23
PCI configuration space 23, 26, 28
PCI conflict 26
Phase A 39
physical dimensions 61

Q

Quadrature Shaft Encoder 8

86 • Index Xtium-CL PX4 User's Manual

S

Sapera buffers allocation 20
Sapera CamExpert 28
Sapera CD-ROM 10, 16
Sapera configuration program 17, 20
Sapera LT Development Libr a r y 10
Sapera LT User’s manual 10
Sapera messaging 20
scatter gather buffers 21
Scatter-Gather 8
serial communication port 17
serial port speeds 17
shaft encoder 8, 39
software trigger 28, 70
Static electricity 10
system COM port 17

T

technical support 16, 18, 25, 27
transfer module 44
trigger 8, 39, 41

V

viewer program 27
virtual frame buffer 41
visual LED indicators 8

W

Web inspection 39
Windows Embedded 7 59
Windows HyperTermina l 17
Windows operating system m em ory 21
workstation 16

X

X64-CL serial port 17

Xtium-CL PX4 User's Manual Index • 87