Dallas Semiconductor DS2417X, DS2417P-T-R, DS2417P Datasheet

1 of 15 062299

FEATURES

§ Real-Time Clock with fully compatible

1-Wire MicroLAN interface

§ Uses the same binary time/date representation

as the DS2404 but with 1 second resolution

§ Clock accuracy ± 2 minutes per month

at 25°C

§ Programmable interrupt output for system

wakeup

§ Communicates at 16.3k bits per second

§ Unique, factory-lasered and tested 64-bit reg-

istration number (8-bit family code + 48-bit serial number + 8-bit CRC tester) assures absolute traceability because no two parts are alike

§ 8-bit family code specifies device communi-

cation requirements to bus master

§ Built-in multidrop controller ensures com-

patibility with other MicroLAN products

§ Operates over a wide VDD voltage range of

2.5V to 5.5V from -40°C to +85°C

§ Low power, 200 nA typically with oscillator

running

§ Compact, low cost 6-pin TSOC surface

mount package

PIN ASSIGNMENT

6-PIN TSOC PACKAGE

TOP VIEW

1 2 3

6 5 4

SIDE VIEW

See Mech. Drawings

Section

PIN DESCRIPTION

Pin 1 GND Pin 2 1-Wire Pin 3

INT

Pin 4 V

Pin 5 X1 Pin 6 X2

ORDERING INFORMATION

DS2417P 6-pin TSOC package DS2417V Tape & Reel of DS2417P DS2417X Chip Scale Pkg., Tape & Reel

DESCRIPTION

The DS2417 1-Wire Time Chip with Interrupt offers a simple solution for storing and retrieving vital time information with minimal hardware. The DS2417 contains a unique lasered ROM and a real-time clock/calendar implemented as a binary counter. Only one pin is required for communication with the device. Utilizing a backup energy source, the data is nonvolatile and allows for stand-alone operation. The DS2417 features can be used to add functions such as calendar, time and date stamp, and logbook to any type of electronic device or embedded application that uses a microcontroller.

OVERVIEW

The DS2417 has two main data components: 1) 64-bit lasered ROM, and 2) real-time clock counter (Figure 1). The real-time clock utilizes an on-chip oscillator that is connected to an external 32.768 kHz crystal. The hierarchical structure of the 1-Wire protocol is shown in Figure 2. The bus master must first provide one of four ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM. The protocol for these ROM functions is described in Figure 7. After a ROM function command

DS2417

1-WireTM Time Chip With Interrupt

PRELIMINARY

www.dalsemi.com

DS2417

2 of 15

is successfully executed, the real-time clock functions become accessible and the master may then provide one of the real-time clock function commands. The protocol for these commands is described in Figure 5. All data is read and written least significant bit first.

DETAILED PIN DESCRIPTION

PIN SYMBOL DESCRIPTION

1 GND

Ground Pin

2 1-Wire Data input/output Open drain. 3

INT

Interrupt pin Open drain.

4 V

Power input pin. 2.5V to 5.5V.

5, 6 X1, X2

Crystal pins. Connections for a standard 32.768 kHz quartz crystal, EPSON part number C-002RX or C-004R (be sure to request 6 pF load capacitance). NOTE: X1 and X2 are very high impedance nodes. It is recommended that they and the crystal be guard-ringed with ground and that high frequency signals be kept away from the crystal area. See Figure 10 and Application Note 58 for details.

BLOCK DIAGRAM Figure 1

X1 X2

32.768 kHz

OSC./DIVIDER

1-WIRE

ROM

CONTROL

FUNCTION

64-BIT

ROM

LASERED

CLOCK

FUNCTION

CONTROL

RTC COUNTER (32-BIT)

OSCILLATOR

CONTROL

READ/WRITE BUFFER

1 Hz

INT. GENERATOR

INT\

64-BIT LASERED ROM

Each DS2417 contains a unique ROM code that is 64 bits long. The first eight bits are a 1-Wire family code. The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See Figure 3.) The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and XOR gates as shown in Figure 4. The polynomial is X8 + X5 + X4 + 1. Additional information about the Dallas Semiconductor 1-Wire Cyclic Redundancy Check is available in the Book of DS19xx iButton Standards. The shift register bits are initialized to zero. Then starting with the least significant bit of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the eight bits of CRC should return the shift register to all zeros. The

INT

DS2417

3 of 15

64-bit ROM and ROM Function Control section allow the DS2417 to operate as a 1-Wire device and follow the 1-Wire protocol detailed in the section "1-Wire Bus System".

HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 2

DS2417

Command Level

Available Commands

Data Fields Affected

1-Wire Bus

Other

Devices

Bus

Master

DS2417 specific

Function Commands

(see Figure 5)

Write Clock Read Clock

RTC Counter, Device Control RTC Counter, Device Control

Read ROM Match ROM Search ROM Skip ROM

64-bit ROM 64-bit ROM 64-bit ROM N/A

1-Wire ROM Function

Commands (see Figure 7)

64-BIT LASERED ROM Figure 3

MSB LSB

8-Bit CRC Code 48-Bit Serial Number 8-Bit Family Code (27h)

MSB LSB MSB LSB MSB LSB

1-WIRE CRC GENERATOR Figure 4

8TH

STAGE

7TH

STAGE

6TH

STAGE

5TH

STAGE

4TH

STAGE

3RD

STAGE

2ND

STAGE

1ST

STAGE

INPUT DATA

Polynomial = X8 + X5 + X4 + 1

DS2417

4 of 15

TIMEKEEPING

A 32.768 kHz crystal oscillator is used as the time base for the real-time clock counter. The oscillator can be turned on or off under software control. The oscillator must be on for the real time clock to function. The real-time clock counter is double buffered. This allows the master to read time without the data changing while it is being read. To accomplish this, a snapshot of the counter data is transferred to a read/write buffer, which the user accesses.

DEVICE CONTROL BYTE

The DS2417 can generate interrupt pulses to trigger activities that have to occur at regular intervals. The selection of this interval and the on/off control of the 32.768 kHz crystal oscillator are done through the device control byte. This byte can be read and written through the Clock Function commands.

Device Control Byte

7 6 5 4 3 2 1 0

IE IS2 IS1 IS0

OSC

OSC 0 0

Bit 0 - 1

0 No function

Bits 0 and 1 are hard-wired to read all 0’s.

Bit 2 - 3

OSC Oscillator Enable/Disable

These bits control/report whether the 32.768 kHz crystal oscillator is running. If the oscillator is running, both OSC bits will read 1. If the oscillator is turned off these bits will all read 0. When writing the device control byte both occurrences of the OSC bit should have identical data. Otherwise the value in bit address 3 (bold) takes precedence.

Bit 4 - 6

IS Interval Select

These bits determine the time between interrupt pulses. The values available are shown below.

IS2 IS1 IS0 Interrupt Interval

0 0 0 1s 0 0 1 4s 0 1 0 32s = 0.53 min 0 1 1 64s = 1.07 min 1 0 0 2048s = 34.13 min 1 0 1 4096s = 68.27 min 1 1 0 65536s = 18.20 hours 1 1 1 131072s= 36.41 hours

Bit 7

IE Interrupt Enable

This bit controls whether the interrupt pulse will be generated at the selected interval. To enable interrupts this bit needs to be 1.

DS2417

5 of 15

REAL-TIME CLOCK

The real-time clock is a 32-bit binary counter. It is incremented once per second. The real-time clock can accumulate 136 years of seconds before rolling over. Time/date is represented by the number of seconds since a reference point, which is determined by the user. For example, 12:00 a.m., January 1, 1970 could be a reference point.

CLOCK FUNCTION COMMANDS

The “Clock Function Flow Chart” (Figure 5) describes the protocols necessary for accessing the real-time clock. With only four bytes of real-time clock and one control byte the DS2417 does not provide random access. Reading and writing always starts with the device control byte followed by the least significant byte of the time data.

READ CLOCK [66h]

The read clock command is used to read the device control byte and the contents of the real-time clock counter. After having received the most significant bit of the command code the device copies the actual contents of the real-time clock counter to the read/write buffer. Now the bus master reads data beginning with the device control byte followed by the least significant byte through the most significant byte of the real-time clock. After this the bus master may continue reading from the DS2417. The data received will be the same as in the first pass through the command flow. The read clock command can be ended at any point by issuing a Reset Pulse.

WRITE CLOCK [99h]

The write clock command is used to set the real-time clock counter and to write the device control byte. After issuing the command, the bus master writes first the device control byte, which becomes immediately effective. After this the bus master sends the least significant byte through the most significant byte to be written to the real-time clock counter. The new time data is copied from the read/write buffer to the real-time clock counter and becomes effective as the bus master generates a reset pulse. If enabled, an interrupt pulse will be generated either immediately or delayed, depending on the actual time and the selected interval duration (see Figure 11). If the oscillator is intentionally stopped the real-time clock counter behaves as a four-byte non-volatile memory.

+ 10 hidden pages