Dallas Semiconductor DS18S20Z, DS18S20 Datasheet

1-Wire

r

2

3

4

7

PRELIMINARY

DS18S20

High Precision

®

Digital Thermomete

FEATURES

 Unique 1–Wire interface requires only one

port pin for communication

 Multidrop capability simplifies distributed

temperature sensing applications

 Requires no external components
 Can be powered from data line. Power supply

range is 3.0V to 5.5V

 Zero standby power required
 Measures temperatures from –55°C to

+125°C. Fahrenheit equivalent is –67°F to
+257°F

 ±0.5°C accuracy from –10°C to +85°C
 Temperature is read as a 9–bit digital value
 Converts temperature to digital word in

750 ms (max.)

 User–definable, nonvolatile temperature

alarm settings

 Alarm search command identifies and

addresses devices whose temperature is
outside of programmed limits (temperature
alarm condition)

 Functionally compatible with DS1820 1-Wire

digital thermometer

 Applications include thermostatic controls,

industrial systems, consumer products,
thermometers, or any thermally sensitive
system

PIN ASSIGNMENT

DALLAS

DS18S20

1 2 3

NC
NC

V

DD

DQ

VDD

GND

DQ

8-Pin SOIC (150 mil)

PIN DESCRIPTION

GND - Ground
DQ - Data In/Out
V
NC - No Connect

- Power Supply Voltage

DD

BOTTOM VIEW

1 2 3

DS18S20 To-92

Package

1

8

6
5

DS18S20Z

NC
NC
NC
GND

DESCRIPTION

The DS18S20 Digital Thermometer provides 9–bit temperature readings which indicate the temperature
of the device.

Information is sent to/from the DS18S20 over a 1–Wire interface, so that only one wire (and ground)
needs to be connected from a central microprocessor to a DS18S20. Power for reading, writing, and
performing temperature conversions can be derived from the data line itself with no need for an ex ternal
power source.

Because each DS18S20 contains a unique silicon serial number, multiple DS18S20s can exist on the
same 1–Wire bus. This allows for placing temperature sensors in many different places. Applications
where this feature is useful include HVAC environmental controls, sensing temperatur es inside buildings,
equipment or machinery, and process monitoring and control.

1 of 27 050400

DS18S20

DETAILED PIN DESCRIPTION

PIN

8-PIN SOIC

5 1 GND Ground.
42DQData Input/Output pin. For 1-Wire operation: Open drain.

33VDDOptional VDD pin. See “Parasite Power” section for details of

DS18S20Z (8-pin SOIC): All pins not specified in this table are not to be connected.

PIN

TO92 SYMBOL DESCRIPTION

(See “Parasite Power” section.)

connection. VDD must be grounded for operation in parasite
power mode.

OVERVIEW

The block diagram of Figure 1 shows the major components of the DS18S20. The DS18S20 has three
main data components: 1) 64–bit lasered ROM, 2) temperature sensor, 3) nonvolatile temperature alarm
triggers TH and TL. The device derives its power from the 1–Wire communication line by storing energy
on an internal capacitor during periods of time when the signal line is high and continues to operate off
this power source during the low times of the 1–Wire line until it returns high to replenish the parasite
(capacitor) supply. As an alternative, the DS18S20 may also be powered from an external 3 volt – 5 volt
supply.

Communication to the DS18S20 is via a 1–Wire port. With the 1–Wire port, the memory and control
functions will not be available before the ROM function protocol has been established. The master must
first provide one of five ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4)
Skip ROM, or 5) Alarm Search. These commands operate on the 64–bit lasered ROM portion of each
device and can single out a specific de vice if many are present on th e 1–Wire line as well as indi cate to
the bus master how many and what types of devices are present. After a ROM functi on sequence has
been successfully executed, the memory and control functions are accessible and the master may then
provide any one of the six memory and control function commands.

One control function command instructs the DS 18S20 t o perform a temperature measurement. The result
of this measurement will be placed in the DS18S20’s scratch-pad memory, and may be read by issuing a
memory function command which reads the contents of the scratchpad memory. The temperature alarm
triggers TH and TL consist of 1-byte EEPROM each. If the alarm search command is not applied to the
DS18S20, these registers may be used as general purpose user memory. Writing TH and TL is done
using a memory function command. Read access to these registers is through the scratchpad. All data is
read and written least significant bit first.

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DS18S20 BLOCK DIAGRAM Figure 1

DQ

DS18S20

MEMORY AND

CONTROL LOGIC

INTERNAL V

POWER

V

DD

SUPPLY

SENSE

64-BIT ROM

AND

1-WIRE PORT

SCRATCHPAD

8-BIT CRC

GENERATOR

TEMPERATURE

SENSOR

HIGH TEMPERATURE

TRIGGER, TH

LOW TEMPER ATUR E

TRIGGER, TH

PARASITE POWER

The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry “steals” power
whenever the DQ or V
and voltage requirements are met (see the section titled “1–Wire Bus System”). The advantages of
parasite power are twofold: 1) by parasiting off this pin, no local power source is needed for remote
sensing of temperature, and 2) the ROM may be read in absence of normal power.

In order for the DS18S20 to be able to perform accurate temperature conv ersions, sufficient power must
be provided over the DQ line when a temperature conversion is taking place. Since the operating current
of the DS18S20 is up to 1.5 mA, the DQ line will not have sufficient drive due to the 5k pullup resistor.
This problem is particularly acute if several DS18S20s are on the same DQ and attempting to convert
simultaneously.

pins are high. DQ will provide sufficient power as long as the specified timing

DD

There are two ways to assure that the DS18S20 has sufficient supply current during its active conversion
cycle. The first is to provide a strong pullup on the DQ line whenever temperature conversions or copies
to the E

2

memory are taking place. This may be accomplished by using a MOSFET to pull the DQ line

directly to the power supply as shown in Figure 2. The DQ line must be switched over to the strong

2

pull-up within 10 µs maximum after issuing any protocol that involves copying to the E

memory or
initiates temperature conversions. When using the parasite power mode, the VDD pin must be tied to
ground.

Another method of supplying current to the DS18S20 is through the use of an external power suppl y tied
to the V

pin, as shown in Figure 3. The advantage to this is that the strong pullup is not required on the

DD

DQ line, and the bus master need not be tied up holding that line high during temperature conversions.
This allows other data traffic on the 1–Wire bus during the conversion time. In addition, any number of
DS18S20s may be placed on the 1–Wire bus, and if they all use external power, they may all
simultaneously perform temperature conversions by issuing the Skip ROM command and then issuing the
Convert T command. Note that as long as the external power supply is active, the GND pin may not be
floating.

The use of parasite power is not recommended above 100°C, since it may not be able to sustain
communications given the higher leakage currents the DS18S20 exhibits at these temperatures. For
applications in which such temperatures are likely, it is strongly recommended that V

be applied to the

DD

DS18S20.

3 of 27

DS18S20

µµµµ

µµµµ

For situations where the bus master does not know whether the DS18S20s on the bus are parasite
powered or supplied with external VDD, a provision is made in the DS18S20 to signal the power supply
scheme used. The bus master can determine if any DS18S20s are on the bus which require th e strong
pullup by sending a Skip ROM protocol, then issuing the read power supply command. After this
command is issued, the master then issues read time slots. The DS18S20 will send back “0” on the
1-Wire bus if it is parasite powered; it will send back a “1” if it is powered from the V

pin. If the

DD

master receives a “0,” it knows that it must supply the strong pullup on the DQ line du ring temperature
conversions. See “Memory Command Functions” section for more detail on this command protocol.

STRONG PULL-UP FOR SUPPLYING DS18S20 DURING TEMPERATURE
CONVERSION Figure 2

+3V - +5V

DS18S20

+3V - +5V

USING V

P

P

TO SUPPLY TEMPERATURE CONVERSION CURRENT Figure 3

DD

+3V - +5V

4.7k

4.7k

DS18S20

GND V

I/O

GND V

I/O

TO OTHER
1-WIRE DEVICES

DD

EXTERNAL +3V - +5V
SUPPLY

DD

4 of 27

DS18S20

OPERATION – MEASURING TEMPERATURE

The core functionality of the DS18S20 is its direct-to-digital temperature sensor. The direct readout of
temperature data is 9 bits wide, equating to a resolution of 0.5°C; if higher resolution is desired, an
algorithm is described later in this section to achieve that need. Following the issuance of the Convert T
[44h] command, a temperature conversion is performed and the thermal data is stored in the scratchpad
memory in a 16-bit, sign-extended two’s complement format. The temperature information can be
retrieved over the 1-Wire interface b y issuing a Read Scratchpad [BEh] command once the conversion
has been performed. The data is transferred over the 1 -W ire bus, LSB first. The MS B of the temp eratur e
register contains the “sign” (S) bit, denoting whether the temperature is positive or negative.

Table 2 describes the exact relationship of output data to measured. For Fahrenh eit usage, a lookup table
or conversion routine must be used.

Temperature/Data Relationships Table 2

262524232221202-1LSB

MSb

SSSSSSSSMSB

TEMPERATURE DIGITAL OUTPUT

+85°C 0000 0101 0101 0000 0550h*

+125°C 0000 0000 1111 1010 00FAh

+25.0°C 0000 0000 0011 0010 0032h

+0.5°C 0000 0000 0000 0001 0001h

0°C 0000 0000 0000 0000 0000h

-0.5°C 1111 1111 1111 1111 FFFFh

-25.0°C 1111 1111 1100 1110 FFCEh

-55°C 1111 1111 1001 0010 FF92h
*The power on reset register value is +85°C

Higher resolutions may be obtained by the following procedure. First, read the temperature,
COUNT_REMAIN, and COUNT_PER_C registers from the scratchpad. Truncate the 0.5°C bit (the
LSB) from the temperature value. This value is TEMP_READ. The actual temperature may then be
calculated by using the following:

(unit = °C)

(Binary)

LSb

DIGITAL

OUTPUT

(Hex)

REMAINCOUNTCPERCOUNT

READTEMPETEMPERATUR

25.0_

+−=

−

___

CPERCOUNT

__

OPERAT ION – AL ARM SIGNALING

After the DS18S20 has performed a temperature conversion, the temperature value is compared to the
trigger values stored in TH and TL. Since these registers are 8–bit only, the 0.5°C bit is ignored for
comparison. The most significant bit of TH or TL directly corresponds to the sign bit of the 16–bit
temperature register. If the result of a temperature measur ement is higher than TH or lower th an TL, an
alarm flag inside the device is set. This flag is updated with every temperature measurement. As long as

5 of 27

DS18S20

the alarm flag is set, the DS18S20 will respond to the alarm search command. This allows many
DS18S20s to be connected in parallel doing simultaneous temperature measurements. If somewhere the
temperature exceeds the limits, the alarming device(s) can be identified and read immediately without
having to read non–alarming devices.

64-BIT LASERED ROM

Each DS18S20 contains a unique ROM code that is 64–bits long. The first 8 bits are a 1–Wire famil y
code (DS18S20 code is 10h). The next 48 bits are a unique serial number. The last 8 bits are a CRC of
the first 56 bits. (See Figure 4.) The 64–bit ROM and ROM Function Control section allow the DS18S20
to operate as a 1–Wire device and follow the 1–Wire protocol detailed in the section “1–Wire Bus
System.” The functions required to control sections of the DS18S20 are not accessible until the ROM
function protocol has been satisfied. This protocol is described in the ROM function protocol flowchart
(Figure 5). The 1–Wire bus master must first provide one of five ROM function commands: 1) Read
ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM, or 5) Alarm Search. After a ROM functions
sequence has been successfully executed, the fun ctions specific to the DS18S20 are accessible and the
bus master may then provide one of the six memory and control function commands.

CRC GENERATION

The DS18S20 has an 8–bit CRC stored in the most significant byte of the 64–bit ROM. The bus master
can compute a CRC value from the first 56–bits of the 64–bit ROM and compare it to the value stored
within the DS18S20 to determine if the ROM data has been received error–free by the bus master. The
equivalent polynomial function of this CRC is:

CRC = X8 + X5 + X4 + 1

The DS18S20 also generates an 8–bit CRC value using the same polynomial function shown above and
provides this value to the bus master to validate the transfer of data bytes. In each case where a CRC is
used for data transfer validation, the bus master must calculate a CRC value using the polynomial
function given above and compare the calculated value to either the 8–bit CRC value stored in the 64–bit
ROM portion of the DS18S20 (for ROM reads) or the 8–bit CRC value computed within the DS18S20
(which is read as a ninth byte when the scratchpad is read). The comparison of CRC values and decision
to continue with an operation are determined entirely by the bus master. There is no circuitry inside the
DS18S20 that prevents a command sequence from proceeding if the CRC stored in or calculated by the
DS18S20 does not match the value generated by the bus master.

The 1–Wire CRC can be generated using a polynomial generator consisting of a shift register and XOR
gates as shown in Figure 6. Additional information about the Dallas 1–Wire Cyclic Redundancy Check is
available in Application Note 27 entitled “Understanding and Using Cyclic Redundancy Checks with
Dallas Semiconductor Touch Memory Products.”

The shift register bits are initialized to “0”. Then starting with the least significant bit of the family code,
one bit at a time is shifted in. After the eighth bit of the family code has been entered, then the serial
number is entered. After the 48th bit of the serial number has been entered, the shift register contains the
CRC value. Shifting in the 8 bits of CRC should return the shift register to all “0s”.

64-BIT LASERED ROM Figure 4

8-BIT CRC CODE 48-BIT SERIAL NUMBER 8-BIT FAMILY CODE (10h)

MSB MSBLSB LSB LSBMSB

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ROM FUNCTIONS FLOW CHART Figure 5

C

C

DS18S20

33h
READ ROM
COMMAND

Y

DS18S20 T

FAMILY CODE

1 BYTE

MASTER T

RESET PULSE

DS18S20 T
PRESENCE

MASTER TX ROM

FUNCTION COMMAND

NNN

X

55h

MATCH ROM

COMMAND

MASTER T

BIT 0

X

X

PULSE

N

F0h

SEARCH ROM

COMMAND

ECh

ALARM

SEARCH

COMMAND

SKIP ROM

COMMAND

YYY

X

ALARM

CONDITION ?

N

CCh

N

Y

Y

DS18S20 TX BIT 0

DS18S20 TX BIT 0

MASTER TX BIT 0

DS18S20 T

SERIAL NUMBER

6 BYTES

DS18S20 T

CRC BYTE

X

X

BIT 0

MATCH?

Y

MASTER T

BIT 1

BIT 1

MATCH?

Y

MASTER T

BIT 63

BIT 63

H?

MAT

Y

NN

X

NN

DS18S20 TX BIT 63

X

DS18S20 TX BIT 63
MASTER TX BIT 63

NN

BIT 0

MATCH?

Y

DS18S20 TX BIT 1
DS18S20 TX BIT 1

MASTER TX BIT 1

BIT 1

MAT

H?

Y

BIT 63

MATCH?

Y

MASTER TX MEMORY OR CONTROL

FUNCTION COMMAND

7 of 27

1-WIRE CRC CODE Figure 6

DS18S20

INPUT

XOR XOR

(MSB) (LSB)

XOR

MEMORY

The DS18S20’s memory is organized as shown in Figure 7. The memory consists of a scratchpad RAM
and a nonvolatile, electrically erasable (E2) RAM, which stores the high and low temperature triggers, TH
and TL. The scratchpad helps insure data integrity when communicating over the 1–Wire bus. Data is
first written to the scratchpad where it can be read back. After the data has been verified, a copy
scratchpad command will transfer the data to the nonvolatile (E2) RAM. This process insures data
integrity when modifying the memory. The DS18S20 EEPROM is rated for a minimum of 50,000 writes
and 10 years data retention at T = +55°C.

The scratchpad is organized as 8 bytes of memory. The first 2-bytes contain the measured temperature
information. The third and fourth bytes are volatile copies of TH and TL and are refreshed with every
power–on reset. The next 2 bytes are not used; upon reading back, however, they will appear as all logic
“1s”. The seventh and eighth bytes are count registers, which may be used in obtaining higher
temperature resolution (see “Operation–measuring Temperature” section). There is a ninth byte which
may be read with a Read Scratchpad command. This byte contains a cyclic redundancy check (CRC)
byte which is the CRC over all of the 8 previous bytes. This CRC is implemented in the fashion
described in the section titled “CRC Generation."

DS18S20 MEMORY MAP Figure 7

SCRATCHPAD

BYTE

TEMPERATURE LSB

TEMPERATURE MSB

TH/USER BYTE 1

TL/USER BYTE 2

RESERVED

RESERVED

COUNT REMAIN

COUNT PER °C

0

1

2

3

4

5

6

7

2

E

RAM

TH/USER BYTE 1

TL/USER BYTE 2

CRC

8

8 of 27

DS18S20

OS

1-WIRE BUS SYSTEM

The 1–Wire bus is a system which has a single bus master and one or more slaves. The DS18S20
behaves as a slave. The discussion of this bus system is broken down into three topics: hardware
configuration, transaction sequence, and 1–Wire signaling (signal types and timing).

HARDWARE CONFIGURATION

The 1–Wire bus has only a single line by definition; it is important that each devi ce on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1–Wire bus must have open
drain or 3–state outputs. The 1–Wire port of the DS18S20 (DQ pin) is open drain with an internal circuit
equivalent to that shown in Figure 8. A multidrop bus consists of a 1–Wire bus with multiple slaves
attached. The 1–Wire bus requires a pullup resistor of approximately 5 kΩ.

HARDWARE CONFIGURATION Figure 8

+3V - +5V

BUS MASTER

R

X

4.7k

DS18S20 1-WIRE PORT

R

X

5 µA

M

100ΩΩΩΩ

FET

T

X

Typ.

T

X

RX = RECEIVE
T

= TRANSMIT

X

The idle state for the 1–Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. Infinite recovery time can occur between
bits so long as the 1–Wire bus is in the inactive (high) state during the recovery period. If this does not
occur and the bus is left low for more than 480 µs, all components on the bus will be reset.

TRANSACTION SEQUENCE

The protocol for accessing the DS18S20 via the 1–Wire port is as follows:

• Initialization

• ROM Function Command

• Memory Function Command

• Transaction/Data

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