Dallas Semiconductor DS18B20Z, DS18B20X, DS18B20 Datasheet

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PRELIMINARY

DS18B20

Programmable Resolution

®

1-Wire

Digital Thermomete

FEATURES

 Unique 1-Wire interface requires only one

port pin for communication

 Multidrop capability simplifies distributed

temperature sensing applications

 Requires no external components
 Can be powered from data line. Power supply

range is 3.0V to 5.5V

 Zero standby power required
 Measures temperatures from -55°C to

+125°C. Fahrenheit equivalent is -67°F to
+257°F

 ±0.5°C accuracy from -10°C to +85°C
 Thermometer resolution is programmable

from 9 to 12 bits

 Converts 12-bit temperature to digital word in

750 ms (max.)

 User-definable, nonvolatile temperature alarm

settings

 Alarm search command identifies and

addresses devices whose temperature is
outside of programmed limits (temperature
alarm condition)

 Applications include thermostatic controls,

industrial systems, consumer products,
thermometers, or any thermally sensitive
system

PIN ASSIGNMENT

DALLAS

DS1820

1 2 3

NC
NC

V

DD

DQ

VDD

GND

DQ

8-Pin SOIC (150 mil)

PIN DESCRIPTION

GND - Ground
DQ - Data In/Out
V
NC - No Connect

- Power Supply Voltage

DD

BOTTOM VIEW

1 2 3

DS18B20 To-92

Package

1

8

6
5

DS18B20Z

NC
NC
NC
GND

DESCRIPTION

The DS18B20 Digital Thermometer provides 9 to 12-bit (configurable) temperature readings which
indicate the temperature of the device.

Information is sent to/from the DS18B20 over a 1-Wire interface, so that only one wire (and ground)
needs to be connected from a central microprocessor to a DS18B20. Power for reading, writing, and
performing temperature conversions can be derived from the data line itself with no need for an ex ternal
power source.

Because each DS18B20 contains a unique silicon serial number, multiple DS18B20s can exist on the
same 1-Wire bus. This allows for placing temperature sensors in many differ ent places. Applications
where this feature is useful include HVAC environmental controls, sensing temperatur es inside buildings,
equipment or machinery, and process monitoring and control.

1 of 27 050400

DS18B20

DETAILED PIN DESCRIPTION Table 1

PIN

8PIN SOIC

5 1 GND Ground.
42DQData Input/Output pin. For 1-Wire operation: Open

33VDDOptional VDD pin. See “Parasite Power” section for

DS18B20Z (8-pin SOIC): All pins not specified in this table are not to be connected.

PIN

TO92 SYMBOL DESCRIPTION

drain. (See “Parasite Power” section.)

details of connection. VDD must be grounded for
operation in parasite power mode.

OVERVIEW

The block diagram of Figure 1 shows the major components of the DS18B20. The DS18B20 has four
main data components: 1) 64-bit lasered ROM, 2) temperature sensor, 3 ) nonvolatile temperature alarm
triggers TH and TL, and 4) a configuration register. The device derives its power from the 1-Wire
communication line by storing energy on an internal capacitor during periods of time when the signal line
is high and continues to operate off this power source during the low times of the 1-Wire line until it
returns high to replenish the parasite (capacitor) supply. As an alternative, the DS18B20 ma y also be
powered from an external 3 volt - 5.5 volt supply.

Communication to the DS18B20 is via a 1-Wire port. With the 1-Wire port, the memory and control
functions will not be available before the ROM function protocol has been established. The master must
first provide one of five ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4)
Skip ROM, or 5) Alarm Search. These commands operate on the 64-bit lasered ROM portion of each
device and can single out a specific d evice if many are present on the 1-W ire line as well as indicate to
the bus master how many and what types of devices are present. After a ROM functi on sequence has
been successfully executed, the memory and control functions are accessible and the master may then
provide any one of the six memory and control function commands.

One control function command instructs the DS18B20 to perform a temperature m e asurement. Th e result
of this measurement will be placed in the DS18B20’s scratch-pad memory, and may be read by issuing a
memory function command which reads the contents of the scratchpad memory. The temperature alarm
triggers TH and TL consist of 1 byte EEPROM each. If the alarm search command is not applied to the
DS18B20, these registers may be used as general purpose user memory. The scratchpad also contains a
configuration byte to set the desired resolution of the temperature to digital conversion. Writing TH, TL,
and the configuration byte is done using a memory function command. Read access to these registers is
through the scratchpad. All data is read and written least significant bit first.

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DS18B20 BLOCK DIAGRAM Figure 1

G

64-BIT ROM

DQ

AND

1-WIRE PORT

DS18B20

MEMORY AND

CONTROL LOGIC

TEMPERATURE SENSOR

INTERNAL V

V

DD

POWER
SUPPLY

DD

SCRATCHPAD

8-BIT CRC
ENERATOR

HIGH TEMPERATURE

TRIGGER, TH

LOW TEMPERATURE

CONFIGURATION

REGISTER

PARASITE POWER

The block diagram (Figure 1) shows the parasite-powered circuitry. This circuitry “steals” power
whenever the DQ or V
and voltage requirements are met (see the section titled “1-Wire Bus System”). The advantages of
parasite power are twofold: 1) by parasiting off this pin, no local power source is needed for remote
sensing of temperature, and 2) the ROM may be read in absence of normal power.

In order for the DS18B20 to be able to perform accurate temperature conv ersions, sufficient power must
be provided over the DQ line when a temperature conversion is taking place. Since the operating current
of the DS18B20 is up to 1.5 mA, the DQ line will not have sufficient drive due to the 5k pullup resistor.
This problem is particularly acute if several DS18B20s are on the same DQ and attempting to convert
simultaneously.

pins are high. DQ will provide sufficient power as long as the specified timing

DD

There are two ways to assure that the DS18B20 has sufficient supply current during its active conversion
cycle. The first is to provide a strong pullup on the DQ line whenever temperature conversions or copies

2

to the E

memory are taking place. This may be accomplished by using a MOSFET to pull the DQ line

directly to the power supply as shown in Figure 2. The DQ line must be switched over to the strong pull­up within 10 µs maximum after issuing any protocol that involves copying to the E2 memory or initiates
temperature conversions. When using the parasite power mode, the VDD pin must be tied to ground.

Another method of supplying current to the DS18B20 is through the use of an ex ternal power suppl y tied
to the VDD pin, as shown in Figure 3. The advantage to this is that the strong pullup is not required on the
DQ line, and the bus master need not be tied up holding that line high during temperature conversions.
This allows other data traffic on the 1-Wire bus during the conversion time. In addition, any number of
DS18B20s may be placed on the 1-Wire bus, and if they all use external power, they may all
simultaneously perform temperature conversions by issuing the Skip ROM command and then issuing the
Convert T command. Note that as long as the external power supply is active, the GND pin may not be
floating.

The use of parasite power is not recommended above 100°C, since it may not be able to sustain
communications given the higher leakage currents the DS18B20 exhibits at these temperatures. For
applications in which such temperatures are likely, it is strongly recommended that V

be applied to the

DD

DS18B20.

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DS18B20

For situations where the bus master does not know whether the DS18B20s on the bus are parasite
powered or supplied with external VDD, a provision is made in the DS18B20 to signal the power supply
scheme used. The bus master can determine if any DS18B20s are on the bus which require the strong
pullup by sending a Skip ROM protocol, then issuing the read power supply command. After this
command is issued, the master then issues read time slots. The DS18B20 will send back “0” on the
1-Wire bus if it is parasite powered; it will send back a “1” if it is powered from the V

pin. If the

DD

master receives a “0,” it knows that it must supply the strong pullup on the DQ line du ring temperature
conversions. See “Memory Command Functions” section for more detail on this command protocol.

STRONG PULLUP FOR SUPPLYING DS18B20 DURING TEMPERATURE
CONVERSION Figure 2

+3V - +5.5V

DS18B20

+3V - +5.5V

V

DD

µP

4.7k

GND

I/O

USING V

µP

TO SUPPLY TEMPERATURE CONVERSION CURRENT Figure 3

DD

TO OTHER

1-WIRE

EXTERNAL
+3V - +5.5V

+3V - +5.5V

4.7k
I/O

DS18B20

V

DD

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DS18B20

OPERATION - MEASURING TEMPERATURE

The core functionality of the DS18B20 is its direct-to-digital temperature sensor. The resolution of the
DS18B20 is configurable (9, 10, 11, or 12 bits), with 12-bit readings the factory default state. This
equates to a temperature resolution of 0.5°C, 0.25°C, 0.125°C, or 0.0625°C. Following the issuan ce of
the Convert T [44h] command, a temperature conversion is performed and the thermal data is stored in
the scratchpad memory in a 16-bit, sign-extended two’s complement format. The temperature
information can be retrieved over the 1-Wire interface by issuing a Read Scratchpad [BEh] command
once the conversion has been performed. The data is transferred over the 1-Wire bus, LSB first. The
MSB of the temperature register contains the “sign” (S) bit, denoting whether the temperature is positive
or negative.

Table 2 describes the exact relationship of output data to measured temperature. The table assumes 12-bit
resolution. If the DS18B20 is configured for a lower resolution, insignificant bits will contain zeros. For
Fahrenheit usage, a lookup table or conversion routine must be used.

Temperature/Data Relationships Table 2

232221202-12-22-32-4LSB

MSb

SSSSS262524MSB

TEMPERATURE DIGITAL OUTPUT

+125°C 0000 0111 1101 0000 07D0h

+85°C 0000 0101 0101 0000 0550h*

+25.0625°C 0000 0001 1001 0001 0191h

+10.125°C 0000 0000 1010 0010 00A2h

+0.5°C 0000 0000 0000 1000 0008h

0°C 0000 0000 0000 0000 0000h

-0.5°C 1111 1111 1111 1000 FFF8h

-10.125°C 1111 1111 0101 1110 FF5Eh

-25.0625°C 1111 1110 0110 1111 FF6Fh

-55°C 1111 1100 1001 0000 FC90h
*The power on reset register value is +85°C.

(unit = °C)

(Binary)

LSb

DIGITAL

OUTPUT

(Hex)

OPERATION - ALARM SIGNALING

After the DS18B20 has performed a temperature conversion, the temper ature value is compared to the
trigger values stored in TH and TL. Since these registers are 8-bit only, bits 9-12 are ignored for
comparison. The most significant bit of TH or TL directly corresponds to the sign bit of the 16-bit
temperature register. If the result of a temperature measur ement is higher than TH or lower th an TL, an
alarm flag inside the device is set. This flag is updated with every temperature measurement. As long as
the alarm flag is set, the DS18B20 will respond to the alarm search command. This allows many
DS18B20s to be connected in parallel doing simultaneous temperature measurements. If somewhere the
temperature exceeds the limits, the alarming device(s) can be identified and read immediately without
having to read non-alarming devices.

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DS18B20

64-BIT LASERED ROM

Each DS18B20 contains a unique ROM code that is 64-bits long. The first 8 bits are a 1-Wire family
code (DS18B20 code is 28h). The next 48 bits are a unique serial number. The last 8 bits are a CRC of
the first 56 bits. (See Figure 4.) The 64-bit ROM and ROM Function Control section allow the DS18B20
to operate as a 1-Wire device and follow the 1-Wire protocol detailed in the section “1-Wire Bus
System.” The functions required to control sections of the DS18B20 are not accessible until the ROM
function protocol has been satisfied. This protocol is described in the ROM function protocol flowchart
(Figure 5). The 1-Wire bus master must first provide one of five ROM function commands: 1) Read
ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM, or 5) Alarm Search. After a ROM function
sequence has been successfully executed, the functions specific to the DS18B20 are ac cessible and the
bus master may then provide one of the six memory and control function commands.

CRC GENERATION

The DS18B20 has an 8-bit CRC stored in the most significant byte of the 64-bit ROM. The bus master
can compute a CRC value from the first 56-bits of the 64-bit ROM and compare it to the value stored
within the DS18B20 to determine if the ROM data has been received error-fre e by the bus master. The
equivalent polynomial function of this CRC is:

CRC = X8 + X5 + X4 + 1

The DS18B20 also generates an 8-bit CRC value using the same polynomial function shown above and
provides this value to the bus master to validate the transfer of data bytes. In each case where a CRC is
used for data transfer validation, the bus master must calculate a CRC value using the polynomial
function given above and compare the calculated value to either the 8-bit CRC value stored in the 64-bit
ROM portion of the DS18B20 (for ROM reads) or the 8-bit CRC value computed within the DS18B20
(which is read as a ninth byte when the scratchpad is read). The comparison of CRC values and decision
to continue with an operation are determined entirely by the bus master. There is no circuitry inside the
DS18B20 that prevents a command sequence from proceeding if the CRC stored in or calculated by the
DS18B20 does not match the value generated by the bus master.

The 1-Wire CRC can be generated using a polynomial generator consisting of a shift register and XOR
gates as shown in Figure 6. Additional information about the Dallas 1-Wire Cyclic Redundanc y Check is
available in Application Note 27 entitled “Understanding and Using Cyclic Redundancy Checks with
Dallas Semiconductor Touch Memory Products.”

The shift register bits are initialized to 0. Then starting with the least significant bit of the family code,
1 bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number is
entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC
value. Shifting in the 8 bits of CRC should return the shift register to all 0s.

64-BIT LASERED ROM Figure 4

8-BIT CRC CODE 48-BIT SERIAL NUMBER

MSB LSB MSB LSB MSB LSB

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8-BIT FAMILY CODE

(28h)

ROM FUNCTIONS FLOW CHART Figure 5

DS18B20

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1-WIRE CRC CODE Figure 6

(

)

(

)

DS18B20

INPUT

MSB

LSB

MEMORY

The DS18B20’s memory is organized as shown in Figure 8. The memory consists of a scratchpad RAM
and a nonvolatile, electrically erasable (E2) RAM, which stores the high and low temperature triggers TH
and TL, and the configuration register. The scratchpad helps insure data integrity when communicating
over the 1-Wire bus. Data is first written to the scratchpad using the Write Scratchpad [4Eh] command.
It can then be verified by using the Read Scratchpad [BEh] command. After the dat a has been verifi ed, a
Copy Scratchpad [48h] command will transfer the data to the nonvolatile (E2) RAM. This process insures
data integrity when modifying memory. The DS18B20 EEPROM is rated for a minimum of 50,000
writes and 10 years data retention at T = +55°C.

The scratchpad is organized as eight bytes of memory. The first 2 bytes contain the LSB and the MSB of
the measured temperature information, respectively. The third and fourth bytes are volatile copies of T H
and TL and are refreshed with every power-on reset. The fifth byte is a volatile copy of the configuration
register and is refreshed with every power-on reset. The configuration register will be explained in more
detail later in this section of the datasheet. The sixth, seventh, and eighth bytes are used for internal
computations, and thus will not read out any predictable pattern.

It is imperative that one writes TH, TL, and config in succession; i.e. a write is not valid if one writes
only to TH and TL, for example, and then issues a reset. If any of these bytes must be written, all three
must be written before a reset is issued.

There is a ninth byte which may be read with a Read Scratchpad [BEh] command. This b yte contains a
cyclic redundancy check (CRC) byte which is the CRC over all of the eight previous bytes. This CRC is
implemented in the fashion described in the section titled “CRC Generation”.

Configuration Register

The fifth byte of the scratchpad memory is the configuration register.

It contains information which will be used by the device to determine the resolution of the temperature to
digital conversion. The bits are organized as shown in Figure 7.

DS18B20 CONFIGURATION REGISTER Figure 7

0R1R0111 1 1

MSb LSb

Bits 0-4 are don’t cares on a write but will always read out “1”.
Bit 7 is a don’t care on a write but will always read out “0”.

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DS18B20

R0, R1: Thermometer resolution bits. Table 3 below defines the resolution of the digital thermometer,
based on the settings of these 2 bits. There is a direct tradeoff between resolution and conversion time, as
depicted in the AC Electrical C haracteristics. The factory default of these EEPROM bits is R0=1 and
R1=1 (12-bit conversions).

Thermometer Resolution Configuration Table 3

R1 R0 Thermometer

Resolution

0 0 9 bit 93.75 ms (t
0 1 10 bit 187.5 ms (t
1 0 11 bit 375 ms (t
1 1 12 bit 750 ms (t

DS18B20 MEMORY MAP Figure 8

SCRATCHPAD

BYTE

TEMPERATURE LSB

TEMPERATURE MSB

TH/USER BYTE 1

TL/USER BYTE 2

CONFIG

0

1

2

3

4

Max Conversion

Time

2

E

RAM

TH/USER BYTE 1

TL/USER BYTE 2

CONFIG

conv

conv

conv

conv

/8)
/4)
/2)
)

RESERVED

RESERVED

RESERVED

CRC

5

6

7

8

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